mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-20 01:20:54 +00:00
2819 commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Arnd Bergmann
|
4a17dc417a |
Renesas ARM DT updates for v5.19 (take two)
- I2C, sound, USB, CANFD, timer, watchdog, (Q)SPI, cpufreq, and
thermal support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVK
development board,
- Initial support for the R-Car V4H SoC and the Renesas White Hawk
development board stack,
- DMA, RTC, and USB support for the RZ/N1D SoC,
- Initial support for the RZ/V2M SoC an the RZ/V2M Evaluation Kit
Board,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYnTmCAAKCRCKwlD9ZEnx
cNXAAP4zWJnWNezZM//dRYwLHALSOE5x22y+MJyiDYDPO2Z0FgD+LcVO1AV+FEqN
/vFkQRBThrdcARFqc44lSYGj2f2+kgg=
=L6Mz
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ1hYMACgkQmmx57+YA
GNkGMRAAxCV75SY+uFRw3LMWPW65C07dTxA7K7KNZxFJTL09I4YykZ1mA7yLfDie
Awyaf51Xl7n6EaczqFBYOTmdHW6v3GRbaetbZMPLPVgqTBWfIHKcUfxDGQZ28h2W
vcwtecEqmSQcKmiWohqpz0gYNA/FIIPa2jO1tp7AtnOLx/W7/Qzw8zYsWH8ozSYe
xPq28aGoq1HCsqd56/X5i2O1oCWYWO6QPwL7yhe0ylkqww5rffyFb69+8CznwIvv
GAW5qPG0EG1ORDTZGqe/n/AsZWhs8EsDC8IkKeDLkC6zHEj124Vqdl+YKfv/tdNk
Z5Ng7EGFU88XGqBFaiFp58Olw3YkvsSswOKJFXUkgA+Zql3O1Pz/LpLhteqIPczZ
xJsfBCBvrZhAlqVHIZQpge2mWLhyaHBqc7aytIhzdMCOLjylGeHyCS9J0tCI3S1H
FyEM0hpFojaZh8dAAzFVGAEJi2KxwKVjJey82epRtMkNeUbOGlLAXRSlLT149Fqi
NdbL7py/rsibmtQJg/pNXvxwzf56zmAkJg3OVc7Kzw/uO9X5Iwrt9VsLN4L2rb13
0eAKr8/72za82u4dpEHiHbCQgl3E2g+zyhYTaEskB68p/fxw7P87R/cZg+ws2c/S
7kyfJAlndj7FZ/RajblY+EDAaa5J7bchXRkpeMcm7Yx+Eg2KKSU=
=3n4A
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.19 (take two)
- I2C, sound, USB, CANFD, timer, watchdog, (Q)SPI, cpufreq, and
thermal support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVK
development board,
- Initial support for the R-Car V4H SoC and the Renesas White Hawk
development board stack,
- DMA, RTC, and USB support for the RZ/N1D SoC,
- Initial support for the RZ/V2M SoC an the RZ/V2M Evaluation Kit
Board,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (40 commits)
arm64: dts: renesas: Add initial device tree for RZ/V2M EVK
arm64: dts: renesas: Add initial DTSI for RZ/V2M SoC
arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHY
ARM: dts: r9a06g032: Add USB PHY DT support
ARM: dts: r9a06g032: Add internal PCI bridge node
ARM: dts: r9a06g032: Describe the RTC
arm64: dts: renesas: Add interrupt-names to CANFD nodes
arm64: dts: renesas: r9a07g043: Add SPI Multi I/O Bus controller node
arm64: dts: renesas: r9a07g043: Create thermal zone to support IPA
arm64: dts: renesas: r9a07g043: Add TSU node
arm64: dts: renesas: r9a07g043: Add OPP table
arm64: dts: renesas: r9a07g043: Add RSPI{0,1,2} nodes
arm64: dts: renesas: r9a07g054: Fix external clk node names
arm64: dts: renesas: r9a07g044: Fix external clk node names
ARM: dts: r9a06g032: Fix the NAND controller node
ARM: dts: r9a06g032: Fill the UART DMA properties
ARM: dts: r9a06g032: Describe the DMA router
ARM: dts: r9a06g032: Add the two DMA nodes
arm64: dts: renesas: Remove empty rgb output endpoints
...
Link: https://lore.kernel.org/r/cover.1651828603.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Arnd Bergmann
|
2367ee1ab9 |
Samsung DTS ARM64 changes for v5.19, part two
1. Cleanups: unused and undocumented dma-channels and dma-requests. 2. Add clock controllers to ExynosAutov9. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmJ01mIQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD19wrD/0TEcs2zVyKKwtBdzH9UoAcBzAHsFrs/B+8 x/PbErDa1QWr0N+ChCcuPJF/QoWMYDoXIPkfA3QOJNI4CZXIoQTFUnrO3dINYsUm /HoVKP8tXjCd9bMTcKT1uryBqv+/Iyqekb+XapP+NRySWCSaJ/D7+RQbtr24Pl9X 6YPBlUgpbqtBsOfxjMD63Ryj67BsrH7MzKsZWcmp1294x5pXu1qc8EQCnJoFY9A/ XfrZEnZmsV7niNO60ohM/o7JDPorLdUXW93VRdaU4RM6Za6GSes/S/0fyTtN3jQs bn+w3QZh2OyEPVia1rEDBuRUUECLgvjc+kfEFEf+MgiQ8AxIRMac8mvPIf9W3LLi E5piweN+ZvijIkvuC8wpOFdlgzbEq6nhEkrckO9CNhx1NltgtDHIPEwXZamgR+30 vuBry1JxKagFSGpqju78D5s5Jd1o+r1ByEg7oL1HSLJdcCKd6YEklGakPeXbMyR2 QQSbbMK2NiODpQcjmEo4FxpGta6rlKZibnKbKTpRm/QSyzRITSQvc8l7yZnHD47S Ato0qXbwlRmuReXX+P1+yP8wSl6aSPurWbOrobwL/ziTWXXDJjlp6Qr9rhvhreNs VZ3ERh8JIUYgOuFT7O9GS325a5JSNtX6uL2ZtH6QKn/d3s/8x962QiaU84ULDCSG RAL8jS3gbQ== =LPf7 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ1hHUACgkQmmx57+YA GNkg2A/5AZtnjtY2TXwA4bCulEmSkrb6CD5jjJwvGLJU3bDokK4X8bkxHFlqirxM RhPrGPCDMvATNVNVkerGJoDtOvCxh5b9zx7s6YtJiQ7D2kn0exeL9sviQow8W4oz H9uL+zyFSJr9QC8evN7yMcQz1A7+o3BhXqHH9raeeZb0X2o89Q+fvrUWqRmtTLul jfmbx5Gmakfj7RFV52abwqOvW7CO5gLmhCev9Namq8GbHplCe6kABrxULwZSp5Jo WcMeCNo7MaNuesSq/wwTiRaFc5FNkB/WJC8SHIq/wpGzr5u/sUIqhVr+Brm/E1+G MoGcOE55gYNCdyKOjDAEA7tGWPH+MQYJKo2g32ahNw2jsKCRxknxvvAy+uLrSpPV Jm0fd9dWDn9zqrLymAnlEo7ljHFcdQLFDZmTSYRUQ8Fm+BWxQNANL8kt7kv3D0BQ GUPD0JLrMVCOKtg5r16pMWEu4UOQT+VR1j7tXc1UKKpQ0RsIMIDl2Z9iWrjLYIme GjFRAzaqNxe27A3uVZaenPphL9fXqgVxOSMKhIRMJK6k8MdxeUU8xsuF0Se+A7Zu 62Dv6+qiBckciVUFdSzGRXCxXX6m/ZIIkiBh4q7W6jRBs1S3DyiTysNyBiZxVXkE p4XSYgyk+T2ps9Y17gRa3Plv9xl+L8MwGmrXqT/WLpo1YgkPMSQ= =TVub -----END PGP SIGNATURE----- Merge tag 'samsung-dt64-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.19, part two 1. Cleanups: unused and undocumented dma-channels and dma-requests. 2. Add clock controllers to ExynosAutov9. * tag 'samsung-dt64-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: switch UFS clock node in ExynosAutov9 arm64: dts: exynos: switch USI clocks in ExynosAutov9 arm64: dts: exynos: add initial CMU clock nodes in ExynosAutov9 dt-bindings: clock: add Exynos Auto v9 SoC CMU bindings dt-bindings: clock: add clock binding definitions for Exynos Auto v9 arm64: dts: fsd: drop useless 'dma-channels/requests' properties arm64: dts: exynos: drop useless 'dma-channels/requests' properties arm64: dts: exynos: move XTCXO clock frequency to board in Exynos Auto v9 Link: https://lore.kernel.org/r/20220506081438.149192-5-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Geert Uytterhoeven
|
d7f49cb451 |
Renesas RZ/V2M DT Binding Definitions
Clock definitions for the Renesas RZ/V2M (R9A09G011) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYnOhkgAKCRCKwlD9ZEnx cCbbAQCUh1AapeMlmEvhNIPN7NH5tE6EdpHJcTRrHXOhU1uT5QD/RLavj37xoyU0 W519FwTA0oYGsXCq2yXjQ08DwlrkUg0= =nWXL -----END PGP SIGNATURE----- Merge tag 'renesas-r9a09g011-dt-binding-defs-tag' into renesas-arm-dt-for-v5.19 Renesas RZ/V2M DT Binding Definitions Clock definitions for the Renesas RZ/V2M (R9A09G011) SoC, shared by driver and DT source files. |
||
|
Arnd Bergmann
|
0fd8954b9e |
STM32 DT for v5.19, round 1
Highlights:
----------
-MCU:
-Fix pinctrl node names to match with pinctrl yaml.
- MPU:
-General:
- Fix pinctrl node names to match with pinctrl yaml.
- Add Protonics boards support based on STM32MP151A SoC:
- PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with
TI and Micrel 10BaseT Phys and wifi support.
- PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity
and CO2 sensors.
- PRTT1A - 10BaseT1L multi functional controller.
- ST boards:
- Add RTC support on stm32mp13.
- Add button and heartbit support on stm32mp13 DK board.
- Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based
on OP-TEE OS and SCMI protocol.
- DH boards:
- Use MCO2 to generate PHY clock and ETHRX clock in order to release
internal PLL for a better SD card usage.
- Add 1ms PHY post-reset on Avenger96 board to match with PHY
requirements.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmJyVdEdHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIX04BAAiNspmlnFNXz9+PXr
W1blnkVWudUAK6OR8gDCaKJF9VGgas+qEUFrH29xdIsCsCD4GjoVKVSDRBUtxUHQ
V/UtyYgaM+B/Bp628E1R+Xq5HBzjZqiUkMt08TitsvOd6Ep1mZ1MgwsLCD31XGWN
cOmNhSeNdRZGmnIU1EVEEZyQg2k45b570JPN6lOm9C8Jo09qTRn17Z9Fzzs+1rqq
OD9RNiiSb8zHDhOGl9j19yhTmgPqZgjRNuuKHQ0s1v2ZHKNYZipkWLu2031JNsOY
hIgs3tKfGWErVhjcKz5KH8x8pWtxnrbDloS3RCqh2AlHpOkbrb1XpAy7ssW3sqI8
F+v/riNXtAoGedTrursKrtwr0D3H67VNvwXXKcjnnCV1BiX/CuCHkUpIVt0kNBhr
MYhVlZJyZHtN1qMbhhCc65TEkup2eopIPdQYt7aNpE/VNKGtqEJly3RvW2wNGFOT
JWHSXFdDGiSEVXRKY4/fYaxd4JqwVeZ/qQJgeMeJIq+ZrUFuCbqpsV9ipgtS1fUL
7Tj/UfQr8BYDBAmCmSoItsQWYHXIFDLsmhtFRQSoaUQQSfg7Iywdckr4HnjYWsqV
DwT4AkZScUSPuQuuUsHl5JMQLDOh5EnR+R27KKz4Q60VMVtiM21QZTogBNZxyG/7
Wvor5EuQ2lvfdesxpQCwug2f/gU=
=F34o
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJz4sMACgkQmmx57+YA
GNmLihAAo1FbtHGXHU3yqY6pYSKiK2noO7slG3jAIMoNCtcbAW78/4jFMqqByeUJ
Wa76sRbONd8+NWV/zXqXFXpPwK/R2dIk+PcvkAC6LYq2N0IJ2ot+TBk2y5BDC/YF
F7X3obHpkGJuMhXKJHVf6aQirnhpEdYWEB1FybKAYcSjAR1hQ/eQG8dtpp10a2Ij
gjocRb99XvTdU+ZoMuExdno0YZ4A+DSn8Q+L+rSknXMDhjlY+t+PF2bWYxBRImPk
mODtM+G6Qsn7kkDN17NsPjC7E9hQA4eNSVgxw39Atsb0Ery5rBKqr7GjOfzHQJpq
n1StMx7lbhnDaeFaXdkKYiAdWPtR5qdrRUsth3/Rv7z8XiJ+o4NuJEd4sI4vrgWd
Or6ebHBMfDWMYK+BYHsqwZU+duuJNB6B0KI8lT8nDZEya34sS9y8al5jKtLfZR0c
PjjV+Uc204UNLGPMF90vVFte/dAGJCMBio99mBUKWcRnZlaaYXy1AsnnU8gWD9Fq
nkwXwrjcJJ+lfB/r7lf2ZkRiW8dpPxNQ/jVmdtQ2UYG+ZUBu5LIIRf7F5V56gdqg
xZstBGgBHtHXGsOhv3DM7cc0JzwUjlv11g45P2Vb5cE3C6Vglq6KI7Kro8WP7mT6
R5aPER0EwfxvyJTUK6J70TozjQsFNoN20dYE49daxwyrV8RfaEM=
=gddr
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT for v5.19, round 1
Highlights:
----------
-MCU:
-Fix pinctrl node names to match with pinctrl yaml.
- MPU:
-General:
- Fix pinctrl node names to match with pinctrl yaml.
- Add Protonics boards support based on STM32MP151A SoC:
- PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with
TI and Micrel 10BaseT Phys and wifi support.
- PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity
and CO2 sensors.
- PRTT1A - 10BaseT1L multi functional controller.
- ST boards:
- Add RTC support on stm32mp13.
- Add button and heartbit support on stm32mp13 DK board.
- Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based
on OP-TEE OS and SCMI protocol.
- DH boards:
- Use MCO2 to generate PHY clock and ETHRX clock in order to release
internal PLL for a better SD card usage.
- Add 1ms PHY post-reset on Avenger96 board to match with PHY
requirements.
* tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (24 commits)
ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
dt-bindings: arm: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
dt-bindings: reset: stm32mp15: rename RST_SCMI define
dt-bindings: clock: stm32mp15: rename CK_SCMI define
dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure"
dt-bindings: rcc: Add optional external ethernet RX clock properties
ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk
ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk
ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131
ARM: dts: stm32: add support for Protonic PRTT1x boards
ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
dt-bindings: net: silabs,wfx: add prt,prtt1c-wfm200 antenna variant
dt-bindings: arm: stm32: Add compatible strings for Protonic T1L boards
dt-bindings: arm: stm32: correct blank lines
dt-bindings: arm: stm32: narrow DH STM32MP1 SoM boards
ARM: dts: stm32: enable RTC support on stm32mp135f-dk
ARM: dts: stm32: add RTC node on stm32mp131
ARM: dts: stm32: Fix PHY post-reset delay on Avenger96
ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
...
Link: https://lore.kernel.org/r/5818c943-882d-7e50-430d-ae3299a108ee@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
Phil Edworthy
|
96055bf71a |
dt-bindings: clock: Add r9a09g011 CPG Clock Definitions
Define RZ/V2M (R9A09G011) Clock Pulse Generator module clock outputs
(CPG_CLK_ON* registers), and reset definitions (CPG_RST_* registers)
in Section 48.5 ("Register Description") of the RZ/V2M Hardware User's
Manual (Rev. 1.10, Sep. 2021).
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220503115557.53370-3-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
||
|
Chanho Park
|
680e1c8370 |
dt-bindings: clock: add clock binding definitions for Exynos Auto v9
Add device tree clock binding definitions for below CMU blocks. - CMU_TOP - CMU_BUSMC - CMU_CORE - CMU_FYS2 - CMU_PERIC0 / C1 - CMU_PERIS Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20220504075154.58819-2-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
||
|
Alexandre Torgue
|
5f5d7decf0 |
dt-bindings: reset: stm32mp15: rename RST_SCMI define
As we only have one SCMI instance, it's not necessary to add an index to the name. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Rob Herring <robh@kernel.org> |
||
|
Alexandre Torgue
|
9b0df59252 |
dt-bindings: clock: stm32mp15: rename CK_SCMI define
As we only have one SCMI instance, it's not necessary to add an index to the name. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Rob Herring <robh@kernel.org> |
||
|
Geert Uytterhoeven
|
a4744a1de6 |
Renesas R-Car V4H DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car V4H (R8A779G0) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYmZeygAKCRCKwlD9ZEnx cPnfAQDX43S1p/rL4PVxtumI9NHgZe8O3M1wwoJCW8ZdnM2fRwEA0mT7QDr4MpJr f9kF/Zh24WgK17cN+tCb3+hWDLCdewE= =oJ8Z -----END PGP SIGNATURE----- Merge tag 'renesas-r8a779g0-dt-binding-defs-tag' into renesas-arm-dt-for-v5.19 Renesas R-Car V4H DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car V4H (R8A779G0) SoC, shared by driver and DT source files. |
||
|
Yoshihiro Shimoda
|
f2afa78d5a |
dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220425064201.459633-3-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
Yoshihiro Shimoda
|
90715507cb |
dt-bindings: power: Add r8a779g0 SYSC power domain definitions
Add power domain indices for R-Car V4H (r8a779g0). Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220425064201.459633-2-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
||
|
Biju Das
|
eb27897854 |
dt-bindings: clock: Add R9A07G043 CPG Clock and Reset Definitions
Define RZ/G2UL (R9A07G043U) Clock Pulse Generator Core Clock and module
clock outputs, as listed in Table 7.1.4.2 ("Clock List r0.51") and also
add Reset definitions referring to registers CPG_RST_* in Section 7.2.3
("Register configuration") of the RZ/G2UL Hardware User's Manual (Rev.
0.51, Nov. 2021).
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220402073037.23947-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
||
|
Linus Torvalds
|
6a34fdcca4 |
RTC for 5.18
Subsystem:
- remove uie_unsupported, all users have been converted to clear
RTC_FEATURE_UPDATE_INTERRUPT and provide a reason
- RTCs with an alarm with a resolution of a minute are now letting the core
handle rounding down the alarm time
- fix use-after-free on device removal
New driver:
- OP-TEE RTC PTA
Drivers:
- sun6i: Add H616 support
- cmos: Fix the AltCentury for AMD platforms
- spear: set range
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEBqsFVZXh8s/0O5JiY6TcMGxwOjIFAmJGJ0wACgkQY6TcMGxw
OjKAXQ/9EId70uY/kUQv2Ay2+NysfSFYpDoerf1V55vGyN+n/pxX14bUxTx0Ivse
47ROcWSP94MSw9cExNvujkpY/V6xaQI3/jxWC60f5ngHzAwIArmmDdWMSLDmRJYi
mg07Hp9bSTIgXVzBdlAJc6vSRDmznKB44TTrz6GvulLJROAy9jNJwefuxwsV9Ftl
I6PcRtYGn5poPpp7yLi1IZ1m0gWJJVze9IsJWJjTRSzh9xAYnjOsMR5H8fyMLjh9
1KjiHwV1c5En4HtrMrYPXOdeLTgNfCdfHaLRRhZRSE+dTK4551TbYbeG2GtKWkdR
Xvybwik2kghde8+/sh6hhg59NGkfMkzLByc41P0VWfDEscyi3z+YXot2OOV+FfkI
XpDPab+a2IQaGFYEa4sGVloFP4e9er5uRHRPkT6bX07plACMwV1wLSRqCK/RriV6
HYImdP7/aA4t/OlmVdliyiyOZfO+oHX/z8hhkNbTJc5HpvgViDEKKEsOEef6OcRh
j+p8ej6iaVt1wjYpfghHYanFzVPi98zGH0QMS9GmHbS+VetGYxzUVyKgzAsOMwYA
RwTunNkQQqgiz+C4n2s/PDD4ZuNDFDFaEE+3RReaw/9LGkR007TCxwcNBEGde+B6
1W4B9tNMGLI/hHulv7WYNrP/5Y/QPEuPiu+FxhwpNm5tDg1Ur70=
=7E0a
-----END PGP SIGNATURE-----
Merge tag 'rtc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux
Pull RTC updates from Alexandre Belloni:
"The bulk of the patches are about replacing the uie_unsupported struct
rtc_device member by a feature bit.
Subsystem:
- remove uie_unsupported, all users have been converted to clear
RTC_FEATURE_UPDATE_INTERRUPT and provide a reason
- RTCs with an alarm with a resolution of a minute are now letting
the core handle rounding down the alarm time
- fix use-after-free on device removal
New driver:
- OP-TEE RTC PTA
Drivers:
- sun6i: Add H616 support
- cmos: Fix the AltCentury for AMD platforms
- spear: set range"
* tag 'rtc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (56 commits)
rtc: check if __rtc_read_time was successful
rtc: gamecube: Fix refcount leak in gamecube_rtc_read_offset_from_sram
rtc: mc146818-lib: Fix the AltCentury for AMD platforms
rtc: optee: add RTC driver for OP-TEE RTC PTA
rtc: pm8xxx: Return -ENODEV if set_time disallowed
rtc: pm8xxx: Attach wake irq to device
clk: sunxi-ng: sun6i-rtc: include clk/sunxi-ng.h
rtc: remove uie_unsupported
rtc: xgene: stop using uie_unsupported
rtc: hym8563: switch to RTC_FEATURE_UPDATE_INTERRUPT
rtc: hym8563: let the core handle the alarm resolution
rtc: hym8563: switch to devm_rtc_allocate_device
rtc: efi: switch to RTC_FEATURE_UPDATE_INTERRUPT
rtc: efi: switch to devm_rtc_allocate_device
rtc: add new RTC_FEATURE_ALARM_WAKEUP_ONLY feature
rtc: spear: fix spear_rtc_read_time
rtc: spear: drop uie_unsupported
rtc: spear: set range
rtc: spear: switch to devm_rtc_allocate_device
rtc: pcf8563: switch to RTC_FEATURE_UPDATE_INTERRUPT
...
|
||
|
Linus Torvalds
|
9512433987 |
There's one large change in the core clk framework here. We change how
clk_set_rate_range() works so that the frequency is re-evaulated each time the
rate is changed. Previously we wouldn't let clk providers see a rate that was
different if it was still within the range, which could be bad for power if the
clk could run slower when a range expands. Now the clk provider can decide to
do something differently when the constraints change. This broke Nvidia's clk
driver so we had to wait for the fix for that to bake a little more in -next.
The rate range patch series also introduced a kunit suite for the clk framework
that we're going to extend in the next release. It already made it easy to find
corner cases in the rate range patches so I'm excited to see it cover more clk
code and increase our confidence in core framework patches in the future. I
also added a kunit test for the basic clk gate code and that work will continue
to cover more basic clk types: muxes, dividers, etc.
Beyond the core code we have the usual set of clk driver updates and additions.
Qualcomm again dominates the diffstat here with lots more SoCs being supported
and i.MX follows afer that with a similar number of SoCs gaining clk drivers.
Beyond those large additions there's drivers being modernized to use
clk_parent_data so we can move away from global string names for all the clks
in an SoC. Finally there's lots of little fixes all over the clk drivers for
typos, warnings, and missing clks that aren't critical and get batched up
waiting for the next merge window to open. Nothing super big stands out in the
driver pile. Full details are below.
Core:
- Make clk_set_rate_range() re-evaluate the limits each time
- Introduce various clk_set_rate_range() tests
- Add clk_drop_range() to drop a previously set range
New Drivers:
- i.MXRT1050 clock driver and bindings
- i.MX8DXL clock driver and bindings
- i.MX93 clock driver and bindings
- NCO blocks on Apple SoCs
- Audio clks on StarFive JH7100 RISC-V SoC
- Add support for the new Renesas RZ/V2L SoC
- Qualcomm SDX65 A7 PLL
- Qualcomm SM6350 GPU clks
- Qualcomm SM6125, SM6350, QCS2290 display clks
- Qualcomm MSM8226 multimedia clks
Updates:
- Kunit tests for clk-gate implementation
- Terminate arrays with sentinels and make that clearer
- Cleanup SPDX tags
- Fix typos in comments
- Mark mux table as const in clk-mux
- Make the all_lists array const
- Convert Cirrus Logic CS2000P driver to regmap, yamlify DT binding and add
support for dynamic mode
- Clock configuration on Microchip PolarFire SoCs
- Free allocations on probe error in Mediatek clk driver
- Modernize Mediatek clk driver by consolidating code
- Add watchdog (WDT), I2C, and pin function controller (PFC) clocks on
Renesas R-Car S4-8
- Improve the clocks for the Rockchip rk3568 display outputs (parenting, pll-rates)
- Use of_device_get_match_data() instead of open-coding on Rockchip rk3568
- Reintroduce the expected fractional-divider behaviour that disappeared
with the addition of CLK_FRAC_DIVIDER_POWER_OF_TWO_PS
- Remove SYS PLL 1/2 clock gates for i.MX8M*
- Remove AUDIO MCLK ROOT from i.MX7D
- Add fracn gppll clock type used by i.MX93
- Add new composite clock for i.MX93
- Add missing media mipi phy ref clock for i.MX8MP
- Fix off by one in imx_lpcg_parse_clks_from_dt()
- Rework for the imx pll14xx
- sama7g5: One low priority fix for GCLK of PDMC
- Add DMA engine (SYS-DMAC) clocks on Renesas R-Car S4-8
- Add MOST (MediaLB I/F) clocks on Renesas R-Car E3 and D3
- Add CAN-FD clocks on Renesas R-Car V3U
- Qualcomm SC8280XP RPMCC
- Add some missing clks on Qualcomm MSM8992/MSM8994/MSM8998 SoCs
- Rework Qualcomm GCC bindings and convert SDM845 camera bindig to YAML
- Convert various Qualcomm drivers to use clk_parent_data
- Remove test clocks from various Qualcomm drivers
- Crypto engine clks on Qualcomm IPQ806x + more freqs for SDCC/NSS
- Qualcomm SM8150 EMAC, PCIe, UFS GDSCs
- Better pixel clk frequency support on Qualcomm RCG2 clks
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmJDd+gRHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSVB4A//QWPv7tssTuHvVDOPz2q9rJFbjG6/fsuY
d8i30y4uTSCWO2eErVUNKxRmrR5/DFJZ20cqv5aTXbiUk5BrmCiD0hyb8RZIU4jD
Kw+1pEvnbBWR6s5TK0spMS9Nz9Uq8DBwoeczHAVQrRZu0I8AkOvWlVH7GncejYOP
KJJSiuByXHRLxudrLWTwwkz3xoDTZBeBcqNbBnatgXnPgSzBh0Uz+0q8r9V9Hugw
+TwXoTVt+XDrX2ihPzZlfm9xoOTOP6GoP+FYCo8gCfW4N0VjUDr3+D95rJoI2gp/
O9UyAx1+tMLlkVxuHcX1npHDPX6Nrqan68DBV4LQRdhSO3dfVD95AE16GzMrD+2t
nuIzT+rst42UUzipCK/8pHLd/YCcPmIsH4C25ZnaF/I59kI/seF3zbekMTY7hS8D
q9sTZYj1X32aHGTtN6QK6QJIscGHYfnSG3M8VLOnhmWDKmW+6AWJ2MVZdcCqDgnS
AXnx1p7gwd/lHV8P+e1YoiUyh5a3tJ2CFFdQCu0tPwL0xLehHyfjKqtjYZjL2+hl
6pF8KxEy6BiMEZWqXmIUJK6xWFO9VpQ2uPxtV8pCTIAXmOOPenWhH7lkeTtIDRc0
hzJURj9HEcpEDakC4/16yfr+YnEn/vjhhZ8a4Vymsnl2IsI71C17vDmRer875Bp/
KPMBn6I1naQ=
=fP8L
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"There's one large change in the core clk framework here. We change how
clk_set_rate_range() works so that the frequency is re-evaulated each
time the rate is changed. Previously we wouldn't let clk providers see
a rate that was different if it was still within the range, which
could be bad for power if the clk could run slower when a range
expands. Now the clk provider can decide to do something differently
when the constraints change. This broke Nvidia's clk driver so we had
to wait for the fix for that to bake a little more in -next.
The rate range patch series also introduced a kunit suite for the clk
framework that we're going to extend in the next release. It already
made it easy to find corner cases in the rate range patches so I'm
excited to see it cover more clk code and increase our confidence in
core framework patches in the future. I also added a kunit test for
the basic clk gate code and that work will continue to cover more
basic clk types: muxes, dividers, etc.
Beyond the core code we have the usual set of clk driver updates and
additions. Qualcomm again dominates the diffstat here with lots more
SoCs being supported and i.MX follows afer that with a similar number
of SoCs gaining clk drivers. Beyond those large additions there's
drivers being modernized to use clk_parent_data so we can move away
from global string names for all the clks in an SoC. Finally there's
lots of little fixes all over the clk drivers for typos, warnings, and
missing clks that aren't critical and get batched up waiting for the
next merge window to open. Nothing super big stands out in the driver
pile. Full details are below.
Core:
- Make clk_set_rate_range() re-evaluate the limits each time
- Introduce various clk_set_rate_range() tests
- Add clk_drop_range() to drop a previously set range
New Drivers:
- i.MXRT1050 clock driver and bindings
- i.MX8DXL clock driver and bindings
- i.MX93 clock driver and bindings
- NCO blocks on Apple SoCs
- Audio clks on StarFive JH7100 RISC-V SoC
- Add support for the new Renesas RZ/V2L SoC
- Qualcomm SDX65 A7 PLL
- Qualcomm SM6350 GPU clks
- Qualcomm SM6125, SM6350, QCS2290 display clks
- Qualcomm MSM8226 multimedia clks
Updates:
- Kunit tests for clk-gate implementation
- Terminate arrays with sentinels and make that clearer
- Cleanup SPDX tags
- Fix typos in comments
- Mark mux table as const in clk-mux
- Make the all_lists array const
- Convert Cirrus Logic CS2000P driver to regmap, yamlify DT binding
and add support for dynamic mode
- Clock configuration on Microchip PolarFire SoCs
- Free allocations on probe error in Mediatek clk driver
- Modernize Mediatek clk driver by consolidating code
- Add watchdog (WDT), I2C, and pin function controller (PFC) clocks
on Renesas R-Car S4-8
- Improve the clocks for the Rockchip rk3568 display outputs
(parenting, pll-rates)
- Use of_device_get_match_data() instead of open-coding on Rockchip
rk3568
- Reintroduce the expected fractional-divider behaviour that
disappeared with the addition of CLK_FRAC_DIVIDER_POWER_OF_TWO_PS
- Remove SYS PLL 1/2 clock gates for i.MX8M*
- Remove AUDIO MCLK ROOT from i.MX7D
- Add fracn gppll clock type used by i.MX93
- Add new composite clock for i.MX93
- Add missing media mipi phy ref clock for i.MX8MP
- Fix off by one in imx_lpcg_parse_clks_from_dt()
- Rework for the imx pll14xx
- sama7g5: One low priority fix for GCLK of PDMC
- Add DMA engine (SYS-DMAC) clocks on Renesas R-Car S4-8
- Add MOST (MediaLB I/F) clocks on Renesas R-Car E3 and D3
- Add CAN-FD clocks on Renesas R-Car V3U
- Qualcomm SC8280XP RPMCC
- Add some missing clks on Qualcomm MSM8992/MSM8994/MSM8998 SoCs
- Rework Qualcomm GCC bindings and convert SDM845 camera bindig to
YAML
- Convert various Qualcomm drivers to use clk_parent_data
- Remove test clocks from various Qualcomm drivers
- Crypto engine clks on Qualcomm IPQ806x + more freqs for SDCC/NSS
- Qualcomm SM8150 EMAC, PCIe, UFS GDSCs
- Better pixel clk frequency support on Qualcomm RCG2 clks"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (227 commits)
clk: zynq: Update the parameters to zynq_clk_register_periph_clk
clk: zynq: trivial warning fix
clk: Drop the rate range on clk_put()
clk: test: Test clk_set_rate_range on orphan mux
clk: Initialize orphan req_rate
dt-bindings: clock: drop useless consumer example
dt-bindings: clock: renesas: Make example 'clocks' parsable
clk: qcom: gcc-msm8994: Fix gpll4 width
dt-bindings: clock: fix dt_binding_check error for qcom,gcc-other.yaml
clk: rs9: Add Renesas 9-series PCIe clock generator driver
clk: fixed-factor: Introduce devm_clk_hw_register_fixed_factor_index()
clk: visconti: prevent array overflow in visconti_clk_register_gates()
dt-bindings: clk: rs9: Add Renesas 9-series I2C PCIe clock generator
clk: sifive: Move all stuff into SoCs header files from C files
clk: sifive: Add SoCs prefix in each SoCs-dependent data
riscv: dts: Change the macro name of prci in each device node
dt-bindings: change the macro name of prci in header files and example
clk: sifive: duplicate the macro definitions for the time being
clk: qcom: sm6125-gcc: fix typos in comments
clk: ti: clkctrl: fix typos in comments
...
|
||
|
Stephen Boyd
|
cf683abd39 |
Merge branches 'clk-sifive' and 'clk-visconti' into clk-next
* clk-sifive: clk: sifive: Move all stuff into SoCs header files from C files clk: sifive: Add SoCs prefix in each SoCs-dependent data riscv: dts: Change the macro name of prci in each device node dt-bindings: change the macro name of prci in header files and example clk: sifive: duplicate the macro definitions for the time being * clk-visconti: clk: visconti: prevent array overflow in visconti_clk_register_gates() |
||
|
Stephen Boyd
|
c64dd8ea8e |
Merge branches 'clk-range', 'clk-uniphier', 'clk-apple' and 'clk-qcom' into clk-next
- Make clk_set_rate_range() re-evaluate the limits each time - Introduce various clk_set_rate_range() tests - Add clk_drop_range() to drop a previously set range - Support for NCO blocks on Apple SoCs * clk-range: clk: Drop the rate range on clk_put() clk: test: Test clk_set_rate_range on orphan mux clk: Initialize orphan req_rate clk: bcm: rpi: Run some clocks at the minimum rate allowed clk: bcm: rpi: Set a default minimum rate clk: bcm: rpi: Add variant structure clk: Add clk_drop_range clk: Always set the rate on clk_set_range_rate clk: Use clamp instead of open-coding our own clk: Always clamp the rounded rate clk: Enforce that disjoints limits are invalid clk: Introduce Kunit Tests for the framework clk: Fix clk_hw_get_clk() when dev is NULL * clk-uniphier: clk: uniphier: Fix fixed-rate initialization * clk-apple: clk: clk-apple-nco: Allow and fix module building MAINTAINERS: Add clk-apple-nco under ARM/APPLE MACHINE clk: clk-apple-nco: Add driver for Apple NCO dt-bindings: clock: Add Apple NCO * clk-qcom: (61 commits) clk: qcom: gcc-msm8994: Fix gpll4 width dt-bindings: clock: fix dt_binding_check error for qcom,gcc-other.yaml clk: qcom: Add display clock controller driver for SM6125 dt-bindings: clock: add QCOM SM6125 display clock bindings clk: qcom: Fix sorting of SDX_GCC_65 in Makefile and Kconfig clk: qcom: gcc: Add emac GDSC support for SM8150 clk: qcom: gcc: sm8150: Fix some identation issues clk: qcom: gcc: Add UFS_CARD and UFS_PHY GDSCs for SM8150 clk: qcom: gcc: Add PCIe0 and PCIe1 GDSC for SM8150 clk: qcom: clk-rcg2: Update the frac table for pixel clock clk: qcom: clk-rcg2: Update logic to calculate D value for RCG clk: qcom: smd: Add missing MSM8998 RPM clocks clk: qcom: smd: Add missing RPM clocks for msm8992/4 dt-bindings: clock: qcom: rpmcc: Add RPM Modem SubSystem (MSS) clocks clk: qcom: gcc-ipq806x: add CryptoEngine resets dt-bindings: reset: add ipq8064 ce5 resets clk: qcom: gcc-ipq806x: add CryptoEngine clocks dt-bindings: clock: add ipq8064 ce5 clk define clk: qcom: gcc-ipq806x: add additional freq for sdc table clk: qcom: clk-rcg: add clk_rcg_floor_ops ops ... |
||
|
Stephen Boyd
|
4222744d40 |
Merge branches 'clk-starfive', 'clk-ti', 'clk-terminate' and 'clk-cleanup' into clk-next
- Audio clks on StarFive JH7100 RISC-V SoC - Terminate arrays with sentinels and make that clearer - Cleanup SPDX tags - Fix typos in comments * clk-starfive: clk: starfive: Add JH7100 audio clock driver clk: starfive: jh7100: Support more clock types clk: starfive: jh7100: Make hw clock implementation reusable dt-bindings: clock: Add starfive,jh7100-audclk bindings dt-bindings: clock: Add JH7100 audio clock definitions clk: starfive: jh7100: Handle audio_div clock properly clk: starfive: jh7100: Don't round divisor up twice * clk-ti: clk: ti: Drop legacy compatibility clocks for dra7 clk: ti: Drop legacy compatibility clocks for am4 clk: ti: Drop legacy compatibility clocks for am3 clk: ti: Update component clocks to use ti_dt_clk_name() clk: ti: Update pll and clockdomain clocks to use ti_dt_clk_name() clk: ti: Add ti_dt_clk_name() helper to use clock-output-names clk: ti: Use clock-output-names for clkctrl clk: ti: Add ti_find_clock_provider() to use clock-output-names clk: ti: Optionally parse IO address from parent clock node clk: ti: Preserve node in ti_dt_clocks_register() clk: ti: Constify clkctrl_name * clk-terminate: clk: actions: Make sentinel elements more obvious clk: clps711x: Terminate clk_div_table with sentinel element clk: hisilicon: Terminate clk_div_table with sentinel element clk: loongson1: Terminate clk_div_table with sentinel element clk: actions: Terminate clk_div_table with sentinel element * clk-cleanup: clk: zynq: Update the parameters to zynq_clk_register_periph_clk clk: zynq: trivial warning fix clk: qcom: sm6125-gcc: fix typos in comments clk: ti: clkctrl: fix typos in comments clk: COMMON_CLK_LAN966X should depend on SOC_LAN966 clk: Use of_device_get_match_data() clk: bcm2835: Remove unused variable clk: tegra: tegra124-emc: Fix missing put_device() call in emc_ensure_emc_driver clk: cleanup comments clk: socfpga: cleanup spdx tags |
||
|
Stephen Boyd
|
9babf95203 |
Merge branches 'clk-mvebu', 'clk-const', 'clk-imx' and 'clk-rockchip' into clk-next
- Mark mux table as const in clk-mux - Make the all_lists array const * clk-mvebu: clk: mvebu: use time_is_before_eq_jiffies() instead of open coding it * clk-const: clk: Mark clk_core_evict_parent_cache_subtree() 'target' const clk: Mark 'all_lists' as const clk: pistachio: Declare mux table as const u32[] clk: qcom: Declare mux table as const u32[] clk: mmp: Declare mux tables as const u32[] clk: hisilicon: Remove unnecessary cast of mux table to u32 * clk: mux: Declare u32 *table parameter as const clk: nxp: Declare mux table parameter as const u32 * clk: nxp: Remove unused variable * clk-imx: (28 commits) dt-bindings: clock: drop useless consumer example clk: imx: Select MXC_CLK for i.MX93 clock driver clk: imx: remove redundant re-assignment of pll->base MAINTAINERS: clk: imx: add git tree and dt-bindings files clk: imx: pll14xx: Support dynamic rates clk: imx: pll14xx: Add pr_fmt clk: imx: pll14xx: explicitly return lowest rate clk: imx: pll14xx: name variables after usage clk: imx: pll14xx: consolidate rate calculation clk: imx: pll14xx: Use FIELD_GET/FIELD_PREP clk: imx: pll14xx: Drop wrong shifting clk: imx: pll14xx: Use register defines consistently clk: imx8mp: remove SYS PLL 1/2 clock gates clk: imx8mn: remove SYS PLL 1/2 clock gates clk: imx8mm: remove SYS PLL 1/2 clock gates clk: imx: add i.MX93 clk clk: imx: support fracn gppll clk: imx: add i.MX93 composite clk dt-bindings: clock: add i.MX93 clock definition dt-bindings: clock: Add imx93 clock support ... * clk-rockchip: clk: rockchip: re-add rational best approximation algorithm to the fractional divider clk/rockchip: Use of_device_get_match_data() clk: rockchip: Add CLK_SET_RATE_PARENT to the HDMI reference clock on rk3568 clk: rockchip: drop CLK_SET_RATE_PARENT from dclk_vop* on rk3568 clk: rockchip: Add more PLL rates for rk3568 |
||
|
Stephen Boyd
|
f9fca892af |
Merge branches 'clk-xilinx', 'clk-kunit', 'clk-cs2000' and 'clk-renesas' into clk-next
- Kunit tests for clk-gate implementation - Convert Cirrus Logic CS2000P driver to regmap, yamlify DT binding and add support for dynamic mode * clk-xilinx: clk: zynqmp: replace warn_once with pr_debug for failed clock ops * clk-kunit: clk: gate: Add some kunit test suites * clk-cs2000: clk: cs2000-cp: convert driver to regmap clk: cs2000-cp: freeze config during register fiddling clk: cs2000-cp: make clock skip setting configurable clk: cs2000-cp: add support for dynamic mode clk: cs2000-cp: Make aux output function controllable dt-bindings: clock: cs2000-cp: document cirrus,dynamic-mode dt-bindings: clock: cs2000-cp: document cirrus,clock-skip flag dt-bindings: clock: cs2000-cp: document aux-output-source dt-bindings: clock: convert cs2000-cp bindings to yaml * clk-renesas: dt-bindings: clock: renesas: Make example 'clocks' parsable clk: rs9: Add Renesas 9-series PCIe clock generator driver clk: fixed-factor: Introduce devm_clk_hw_register_fixed_factor_index() dt-bindings: clk: rs9: Add Renesas 9-series I2C PCIe clock generator clk: renesas: r8a779f0: Add PFC clock clk: renesas: r8a779f0: Add I2C clocks clk: renesas: r8a779f0: Add WDT clock clk: renesas: r8a779f0: Fix RSW2 clock divider clk: renesas: rzg2l-cpg: Add support for RZ/V2L SoC dt-bindings: clock: renesas: Document RZ/V2L SoC dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions clk: renesas: r8a779a0: Add CANFD module clock clk: renesas: r9a07g044: Update multiplier and divider values for PLL2/3 clk: renesas: r8a7799[05]: Add MLP clocks clk: renesas: r8a779f0: Add SYS-DMAC clocks |
||
|
Stephen Boyd
|
407c04d6ad |
Merge branches 'clk-microchip', 'clk-si', 'clk-mtk', 'clk-at91' and 'clk-st' into clk-next
- Clock configuration on Microchip PolarFire SoCs - Free allocations on probe error in Mediatek clk driver - Modernize Mediatek clk driver by consolidating code * clk-microchip: clk: microchip: Add driver for Microchip PolarFire SoC dt-bindings: clk: microchip: Add Microchip PolarFire host binding * clk-si: clk-si5341: replace snprintf in show functions with sysfs_emit clk: si5341: fix reported clk_rate when output divider is 2 * clk-mtk: (32 commits) clk: mediatek: Warn if clk IDs are duplicated clk: mediatek: mt8195: Implement remove functions clk: mediatek: mt8195: Implement error handling in probe functions clk: mediatek: mt8195: Hook up mtk_clk_simple_remove() clk: mediatek: Unregister clks in mtk_clk_simple_probe() error path clk: mediatek: mtk: Implement error handling in register APIs clk: mediatek: pll: Implement error handling in register API clk: mediatek: mux: Implement error handling in register API clk: mediatek: mux: Reverse check for existing clk to reduce nesting level clk: mediatek: gate: Implement error handling in register API clk: mediatek: cpumux: Implement error handling in register API clk: mediatek: mtk: Clean up included headers clk: mediatek: Add mtk_clk_simple_remove() clk: mediatek: Implement mtk_clk_unregister_composites() API clk: mediatek: Implement mtk_clk_unregister_divider_clks() API clk: mediatek: Implement mtk_clk_unregister_factors() API clk: mediatek: Implement mtk_clk_unregister_fixed_clks() API clk: mediatek: pll: Clean up included headers clk: mediatek: pll: Implement unregister API clk: mediatek: pll: Split definitions into separate header file ... * clk-at91: clk: at91: clk-master: remove dead code clk: at91: sama7g5: fix parents of PDMCs' GCLK clk: at91: sama7g5: Allow MCK1 to be exported and referenced in DT clk: at91: allow setting PMC_AUDIOPINCK clock parents via DT * clk-st: clk: stm32mp1: Add parent_data to ETHRX clock clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clock |
||
|
Linus Torvalds
|
dfdc1de642 |
Staging driver update for 5.18-rc1
Here is the big set of staging driver updates for 5.18-rc1.
Loads of tiny cleanups for almost all staging drivers in here, nothing
major at all. Highlights include:
- remove the ashmem Android driver. It is long-dead and if
there are any legacy userspace applications still using it,
the Android kernel images will maintain it, the community
shouldn't care about it anymore
- wfx wifi driver major cleanups. Should be ready to merge out
of staging soon, and will coordinate with the wifi maintainers
after -rc1 is out
- major cleanups and unwinding of the layers of the r8188eu
driver. It's amazing just how many unneeded layers of
abstraction is in there, just when we think it's done, another
is found...
- lots of tiny coding style cleanups in many other staging
drivers.
There will be merge conflict with a fbtft change and the spi driver
changes in your tree, but it's pretty obvious what to do (the function
shouldn't return anything.)
All have been in linux-next for a while with no reported problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYkG1cA8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+ylndwCfVhxKnbTYKtOs6UEr5pgPCoQCioUAn0Y2i0TG
4aFeeKUyL8VGdAitL+tp
=E6v7
-----END PGP SIGNATURE-----
Merge tag 'staging-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging
Pull staging driver updates from Greg KH:
"Here is the big set of staging driver updates for 5.18-rc1.
Loads of tiny cleanups for almost all staging drivers in here, nothing
major at all. Highlights include:
- remove the ashmem Android driver. It is long-dead and if there are
any legacy userspace applications still using it, the Android
kernel images will maintain it, the community shouldn't care about
it anymore
- wfx wifi driver major cleanups. Should be ready to merge out of
staging soon, and will coordinate with the wifi maintainers after
-rc1 is out
- major cleanups and unwinding of the layers of the r8188eu driver.
It's amazing just how many unneeded layers of abstraction is in
there, just when we think it's done, another is found...
- lots of tiny coding style cleanups in many other staging drivers.
All have been in linux-next for a while with no reported problems"
* tag 'staging-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (455 commits)
staging: r8188eu: remove unnecessary memset in r8188eu
staging: greybus: introduce pwm_ops::apply
staging: rts5208: Resolve checkpatch.pl issues.
staging: sm750fb: fix naming style
staging: fbtft: Consider type of init sequence values in fbtft_init_display()
staging: fbtft: Constify buf parameter in fbtft_dbg_hex()
staging: mmal-vchiq: clear redundant item named bulk_scratch
mips: dts: ralink: add MT7621 SoC
staging: r8188eu: remove some unused local ieee80211 macros
staging: r8188eu: make rtl8188e_process_phy_info static
staging: r8188eu: remove unused function prototype
staging: r8188eu: remove three unused receive defines
staging: r8188eu: remove unnecessary initializations
staging: rtl8192e: Fix spelling mistake "RESQUEST" -> "REQUEST"
MAINTAINERS: remove the obsolete file entry for staging in ANDROID DRIVERS
staging: r8188eu: proper error handling in rtw_init_drv_sw
staging: r8188eu: call _cancel_timer_ex from _rtw_free_recv_priv
staging: vt6656: Removed unused variable vt3342_vnt_threshold
staging: vt6656: Removed unused variable bb_vga_0
staging: remove ashmem
...
|
||
|
Linus Torvalds
|
02e2af20f4 |
Char/Misc and other driver updates for 5.18-rc1
Here is the big set of char/misc and other small driver subsystem updates for 5.18-rc1. Included in here are merges from driver subsystems which contain: - iio driver updates and new drivers - fsi driver updates - fpga driver updates - habanalabs driver updates and support for new hardware - soundwire driver updates and new drivers - phy driver updates and new drivers - coresight driver updates - icc driver updates Individual changes include: - mei driver updates - interconnect driver updates - new PECI driver subsystem added - vmci driver updates - lots of tiny misc/char driver updates There will be two merge conflicts with your tree, one in MAINTAINERS which is obvious to fix up, and one in drivers/phy/freescale/Kconfig which also should be easy to resolve. All of these have been in linux-next for a while with no reported problems. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYkG3fQ8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ykNEgCfaRG8CRxewDXOO4+GSeA3NGK+AIoAnR89donC R4bgCjfg8BWIBcVVXg3/ =WWXC -----END PGP SIGNATURE----- Merge tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc and other driver updates from Greg KH: "Here is the big set of char/misc and other small driver subsystem updates for 5.18-rc1. Included in here are merges from driver subsystems which contain: - iio driver updates and new drivers - fsi driver updates - fpga driver updates - habanalabs driver updates and support for new hardware - soundwire driver updates and new drivers - phy driver updates and new drivers - coresight driver updates - icc driver updates Individual changes include: - mei driver updates - interconnect driver updates - new PECI driver subsystem added - vmci driver updates - lots of tiny misc/char driver updates All of these have been in linux-next for a while with no reported problems" * tag 'char-misc-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (556 commits) firmware: google: Properly state IOMEM dependency kgdbts: fix return value of __setup handler firmware: sysfb: fix platform-device leak in error path firmware: stratix10-svc: add missing callback parameter on RSU arm64: dts: qcom: add non-secure domain property to fastrpc nodes misc: fastrpc: Add dma handle implementation misc: fastrpc: Add fdlist implementation misc: fastrpc: Add helper function to get list and page misc: fastrpc: Add support to secure memory map dt-bindings: misc: add fastrpc domain vmid property misc: fastrpc: check before loading process to the DSP misc: fastrpc: add secure domain support dt-bindings: misc: add property to support non-secure DSP misc: fastrpc: Add support to get DSP capabilities misc: fastrpc: add support for FASTRPC_IOCTL_MEM_MAP/UNMAP misc: fastrpc: separate fastrpc device from channel context dt-bindings: nvmem: brcm,nvram: add basic NVMEM cells dt-bindings: nvmem: make "reg" property optional nvmem: brcm_nvram: parse NVRAM content into NVMEM cells nvmem: dt-bindings: Fix the error of dt-bindings check ... |
||
|
Linus Torvalds
|
ff61bc81b3 |
Pin control bulk changes for the v5.18 kernel cycle
No core changes this time. Just new driver code and improvements!
New drivers:
- New driver for the Broadcom BCM4908 SoC.
- New subdriver for Tesla FSD (Full Self Driving) SoC, a
derivative of the Samsung Exynos pin control driver.
- New driver for the Amlogic Meson S4 SoC.
- New driver for the Sunplus SP7021 SoC.
- New driver for the Microsemi Ocelot family ServalT SoC.
- New subdriver for Intel Alder Lake-M SoC.
- New subdriver for Intel Ice Lake-N SoC, including PCH support.
- New subdriver for Renesas R8A779F0 SoC.
- New subdriver for Mediatek MT8186 SoC.
- New subdriver for NXP Freescale i.MX93 SoC.
- New driver for Nuvoton WPCM450 SoC.
- New driver for Qualcomm SC8280XP SoC.
Improvements:
- Wakeup support on Samsung Exynos850 and ExynosAutov9.
- Serious and voluminous maintenance cleanup and refactoring in
the Renesas drivers. Mainly sharing similar data between the
different SoC subdrivers.
- Qualcomm SM8450 EGPIO support.
- Drive strength support on the Mediatek MT8195.
- Add some missing groups and functions to the Ralink RT2880.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmJBsSwACgkQQRCzN7AZ
XXOoVhAAhHW2FSXB8ud1mdyuN3CswMSiWrZqC8nveznHMcddzsDvZsGsAP8x6fKi
1CgTXDQblA/plpxqORvBDA8Ji9+z9NAilIMds1ZcMbPjpY1l63uD5VhWq7tpPN1H
ALnJAhc4rl1fkJ01U5sTtHJ8xibjpN690ZCrfzNwdLOQAUvXJ22zuyuIcSBFiSMv
ij4E2fejOj0ZN7rzb8xTxcaSWUrj5Kci5Eaq6yi/clKHaOrrV5r/tX9yo7uWF3mi
6UX/1IioougtMF2bhsoodQE5E5XN8Hjm2+VWULxBCsKjI1gKY/NR2GXeaHHJve8B
do3Y45cU+zZSWVo4mmlf/Z3+4npIQlMFe8LvDmBvb3ZopcbapuGiOSzYxT6aZA/z
WtGDDIaECcNF/dJCHwRugAsG5OhT0AYyNblMxsmW+ARoTocMlYPG8Jq4KEmIoIEz
m+UArJEe8asQlk4ebK/e0x2hbywgfN02ILO8OygpXpwsHAyx7pjDk7SABkzrAQLg
vTpI1i7q1hsYyeTm9RXJJd2VTe9fpYLTgjTa5bnqBQNcsyEd5o9QtH/IwARS/NP7
nNlZLUIUsOa782O6N4oT5JGb96a3cMxHv+hAIKcwhxK/54IYrGh+/BAORnfoe0Vo
h6pwKoUVE+L70t0RfmVqYK0EX6zsWSnb1NNNJFM+uLLpfFnx+1U=
=TY4V
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"No core changes this time. Just new driver code and improvements!
New drivers:
- New driver for the Broadcom BCM4908 SoC.
- New subdriver for Tesla FSD (Full Self Driving) SoC, a derivative
of the Samsung Exynos pin control driver.
- New driver for the Amlogic Meson S4 SoC.
- New driver for the Sunplus SP7021 SoC.
- New driver for the Microsemi Ocelot family ServalT SoC.
- New subdriver for Intel Alder Lake-M SoC.
- New subdriver for Intel Ice Lake-N SoC, including PCH support.
- New subdriver for Renesas R8A779F0 SoC.
- New subdriver for Mediatek MT8186 SoC.
- New subdriver for NXP Freescale i.MX93 SoC.
- New driver for Nuvoton WPCM450 SoC.
- New driver for Qualcomm SC8280XP SoC.
Improvements:
- Wakeup support on Samsung Exynos850 and ExynosAutov9.
- Serious and voluminous maintenance cleanup and refactoring in the
Renesas drivers. Mainly sharing similar data between the different
SoC subdrivers.
- Qualcomm SM8450 EGPIO support.
- Drive strength support on the Mediatek MT8195.
- Add some missing groups and functions to the Ralink RT2880"
* tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (188 commits)
pinctrl: mediatek: common-v1: fix semicolon.cocci warnings
pinctrl: nuvoton: wpcm450: Fix build error without OF
pinctrl: qcom-pmic-gpio: Add support for pm8450
dt-bindings: pinctrl: aspeed: Update gfx node in example
dt-bindings: pinctrl: rt2880: add missing pin groups and functions
pinctrl: ingenic: Fix regmap on X series SoCs
pinctrl: nuvoton: Fix return value check in wpcm450_gpio_register()
pinctrl: nuvoton: wpcm450: off by one in wpcm450_gpio_register()
pinctrl: nuvoton: wpcm450: select GENERIC_PINCTRL_GROUPS
pinctrl: nuvoton: Fix sparse warning
pinctrl: mediatek: mt8186: Account for probe refactoring
pinctrl: mediatek: common-v1: Commonize spec_ies_smt_set callback
pinctrl: mediatek: common-v1: Commonize spec_pupd callback
pinctrl: mediatek: common-v1: Use common probe function
pinctrl: mediatek: common-v1: Add common probe function
pinctrl: mediatek: paris: Unify probe function by using OF match data
pinctrl/rockchip: Add missing of_node_put() in rockchip_pinctrl_probe
pinctrl: nomadik: Add missing of_node_put() in nmk_pinctrl_probe
pinctrl: berlin: fix error return code of berlin_pinctrl_build_state()
pinctrl: qcom: Introduce sc8280xp TLMM driver
...
|
||
|
Linus Torvalds
|
9bf3fc5007 |
Devicetree updates for v5.18:
- Add Krzysztof Kozlowski as co-maintainer for DT bindings providing much needed help. - DT schema validation now takes DTB files as input rather than intermediate YAML files. This decouples the validation from the source level syntax information. There's a bunch of schema fixes as a result of switching to DTB based validation which exposed some errors and incomplete schemas and examples. - Kbuild improvements to explicitly warn users running 'make dt_binding_check' on missing yamllint - Expand DT_SCHEMA_FILES kbuild variable to take just a partial filename or path instead of the full path to 1 file. - Convert various bindings to schema format: mscc,vsc7514-switch, multiple GNSS bindings, ahci-platform, i2c-at91, multiple UFS bindings, cortina,gemini-sata-bridge, cortina,gemini-ethernet, Atmel SHA, Atmel TDES, Atmel AES, armv7m-systick, Samsung Exynos display subsystem, nuvoton,npcm7xx-timer, samsung,s3c2410-i2c, zynqmp_dma, msm/mdp4, rda,8810pl-uart - New schemas for u-boot environment variable partition, TI clksel - New compatible strings for Renesas RZ/V2L SoC - Vendor prefixes for Xen, HPE, deprecated Synopsys, deprecated HiSilicon - Add/fix schemas for QEMU Arm 'virt' machine - Drop unused of_alias_get_alias_list() function - Add a script to check DT unittest EXPECT message output. Pass messages also now print by default at PR_INFO level to help test automation. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmI8s64QHHJvYmhAa2Vy bmVsLm9yZwAKCRD6+121jbxhwx3tD/4j56NE+aLkL636+I8tGFm3r+r6uLLT4SWh zDuiX3MP9OKfhJw43TjjURLwX5adBnG3nn505IXcAeiMRgEiciOpSa12w0mXyjMX QgVOcoaI3H2GBMEddJRo1PLTM/K5sYzZxAKLB827xoOk4mGNA0ZBAHvlB3W+yLE5 CE5yTaFoL4EMXuhWMtMrMlG1PQrbO3FpQ2DHBKrpxHPJmnHLk3c0YtMSTHGQnWbN AxT3S6RSsOLwLzZAXi2AlswqY82n5KtUf/RBrYi8rdr/xnIsCfMeXxafkP2Hyxkq L9RfKVn05c0LRtO1Eh8kYr+lmYmcWz/SIdJZXzpviIgE9MJapCAk0blBZ4S/FH0B EVGB1JkwCZFck6DBmkNJxAwR0iQOGWkJIkn6iBPNF0dHp58eE6adaXjhFH3uBEHk dXFaxPlvZ3P/Q2I/vmQ//m5tZMyjeCY2BlVYpkUJMOFfN26MIGHUmUlLnovLDqu4 lYgZG4V244uYzALLbURpbp+5dlPH/PL2gxvJJNqTS+/hXktQx1XnML4wD+xfJ4nT OY5DD7Z+KGBrdsMtxkFtIFvKD63E2gtAR5RZO0J/txlzhW7Wg6fJbhJZeRFhZKmN GAfud2s6rliyygByBL4ea50DSLLQpc/9HZtFmZ3NTILM6NbUR74sHt+1EZ1hee+M LaNsSscHuQ== =g1li -----END PGP SIGNATURE----- Merge tag 'devicetree-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Add Krzysztof Kozlowski as co-maintainer for DT bindings providing much needed help. - DT schema validation now takes DTB files as input rather than intermediate YAML files. This decouples the validation from the source level syntax information. There's a bunch of schema fixes as a result of switching to DTB based validation which exposed some errors and incomplete schemas and examples. - Kbuild improvements to explicitly warn users running 'make dt_binding_check' on missing yamllint - Expand DT_SCHEMA_FILES kbuild variable to take just a partial filename or path instead of the full path to 1 file. - Convert various bindings to schema format: mscc,vsc7514-switch, multiple GNSS bindings, ahci-platform, i2c-at91, multiple UFS bindings, cortina,gemini-sata-bridge, cortina,gemini-ethernet, Atmel SHA, Atmel TDES, Atmel AES, armv7m-systick, Samsung Exynos display subsystem, nuvoton,npcm7xx-timer, samsung,s3c2410-i2c, zynqmp_dma, msm/mdp4, rda,8810pl-uart - New schemas for u-boot environment variable partition, TI clksel - New compatible strings for Renesas RZ/V2L SoC - Vendor prefixes for Xen, HPE, deprecated Synopsys, deprecated HiSilicon - Add/fix schemas for QEMU Arm 'virt' machine - Drop unused of_alias_get_alias_list() function - Add a script to check DT unittest EXPECT message output. Pass messages also now print by default at PR_INFO level to help test automation. * tag 'devicetree-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (96 commits) dt-bindings: kbuild: Make DT_SCHEMA_LINT a recursive variable dt-bindings: nvmem: add U-Boot environment variables binding dt-bindings: ufs: qcom: Add SM6350 compatible string dt-bindings: dmaengine: sifive,fu540-c000: include generic schema dt-bindings: gpio: pca95xx: drop useless consumer example Revert "of: base: Introduce of_alias_get_alias_list() to check alias IDs" dt-bindings: virtio,mmio: Allow setting devices 'dma-coherent' dt-bindings: gnss: Add two more chips dt-bindings: gnss: Rewrite sirfstar binding in YAML dt-bindings: gnss: Modify u-blox to use common bindings dt-bindings: gnss: Rewrite common bindings in YAML dt-bindings: ata: ahci-platform: Add rk3568-dwc-ahci compatible dt-bindings: ata: ahci-platform: Add power-domains property dt-bindings: ata: ahci-platform: Convert DT bindings to yaml dt-bindings: kbuild: Use DTB files for validation dt-bindings: kbuild: Pass DT_SCHEMA_FILES to dt-validate dt-bindings: Add QEMU virt machine compatible dt-bindings: arm: Convert QEMU fw-cfg to DT schema dt-bindings: i2c: at91: Add SAMA7G5 compatible strings list dt-bindings: i2c: convert i2c-at91 to json-schema ... |
||
|
Linus Torvalds
|
aa5b537b0e |
RISC-V Patches for the 5.18 Merge Window, Part 1
* Support for Sv57-based virtual memory. * Various improvements for the MicroChip PolarFire SOC and the associated Icicle dev board, which should allow upstream kernels to boot without any additional modifications. * An improved memmove() implementation. * Support for the new Ssconfpmf and SBI PMU extensions, which allows for a much more useful perf implementation on RISC-V systems. * Support for restartable sequences. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmI96FcTHHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiQBFD/425+6xmoOru6Wiki3Ja0fqQToNrQyW IbmE/8AxUP7UxMvJSNzvQm8deXgklzvmegXCtnjwZZins971vMzzDSI83k/zn8I7 m5thVC9z01BjodV+pvIp/44hS6FesolOLzkVHksX0Zh6h0iidrc34Qf5HrqvvNfN CZ/4K1+E9ig5r9qZp4WdvocCXj+FzwF/30GjKoW9vwA599CEG/dCo+TNN9GKD6XS k+xiUGwlIRA+kCLSPFCi7ev9XPr1tCmQB7uB8Igcvr7Y3mWl8HKfajQVXBnXNRC3 ifbDxpx1elJiLPyf7Rza8jIDwDhLQdxBiwPgDgP9h9R4x0uF4efq8PzLzFlFmaE+ 9Z9thfykBb5dXYDFDje9bAOXvKnGk7Iqxdsz0qWo/ChEQawX1+11bJb0TNN8QTT9 YvlQfUXgb1dmEcj5yG2uVE1Y8L7YNLRMsZU3W3FbmPJZoavSOuU4x0yCGeLyv597 76af3nuBJ5v80Db97gu6St+HIACeevKflsZUf/8GS/p7d1DlvmrWzQUMEycxPTG9 UZpZak58jh7AqQ9JbLnavhwmeacY50vpZOw6QHGAHSN+8daCPlOHDG7Ver7Z+kNj +srJ7iKMvLnnaEjGNgavfxdqTOme1gv4LWs/JdHYMkpphqVN92xBDJnhXTPRVZiQ 0x39vK86qtB46A== =Omc6 -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-5.18-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Palmer Dabbelt: - Support for Sv57-based virtual memory. - Various improvements for the MicroChip PolarFire SOC and the associated Icicle dev board, which should allow upstream kernels to boot without any additional modifications. - An improved memmove() implementation. - Support for the new Ssconfpmf and SBI PMU extensions, which allows for a much more useful perf implementation on RISC-V systems. - Support for restartable sequences. * tag 'riscv-for-linus-5.18-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (36 commits) rseq/selftests: Add support for RISC-V RISC-V: Add support for restartable sequence MAINTAINERS: Add entry for RISC-V PMU drivers Documentation: riscv: Remove the old documentation RISC-V: Add sscofpmf extension support RISC-V: Add perf platform driver based on SBI PMU extension RISC-V: Add RISC-V SBI PMU extension definitions RISC-V: Add a simple platform driver for RISC-V legacy perf RISC-V: Add a perf core library for pmu drivers RISC-V: Add CSR encodings for all HPMCOUNTERS RISC-V: Remove the current perf implementation RISC-V: Improve /proc/cpuinfo output for ISA extensions RISC-V: Do no continue isa string parsing without correct XLEN RISC-V: Implement multi-letter ISA extension probing framework RISC-V: Extract multi-letter extension names from "riscv, isa" RISC-V: Minimal parser for "riscv, isa" strings RISC-V: Correctly print supported extensions riscv: Fixed misaligned memory access. Fixed pointer comparison. MAINTAINERS: update riscv/microchip entry riscv: dts: microchip: add new peripherals to icicle kit device tree ... |
||
|
Linus Torvalds
|
ed4643521e |
ARM: DT updates for 5.18
After a somewhat quiet 5.17 release, the size of the DT changes
is a bit larger again. There are nine new SoC that get added,
all of them related to existing platforms:
- Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB
- Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G tablet
- Microchip Lan966 networking SoC and it evaluation board
- Qualcomm Snapdragon 625/632 midrange phone SoCs, with the
LG Nexus 5X and Fairphone FP3 phones
- Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs,
along with their evaluation boards
- Samsung Exynos 850 phone SoC and reference board
- Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone
- Tesla FSD (Fully Self-Driving), an automotive SoC losely derived
from the Samsung Exynos family.
- TI K3/AM62 SoC and reference board
Support for additional functionality in existing dts files is added all
over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91, Allwinner,
i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and Broadcom.
Samsung has a rework for its pinctrl schema that is a bit tricky and
requires driver changes to be included here.
A few more platforms only have smaller cleanups and DT Schema fixes,
this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.
The new machines are really too many to list, but I'll do it anyway:
Allwinner:
- A20-Marsboard development board
Amlogic
- Amediatek X96-AIR (Amlogic S905X3)
- CYX A95XF3-AIR (Amlogic S905X3)
- Haochuangy H96-Max (Amlogic S905X3)
- Amlogic AQ222 (Amlogic S4)
- OSMC Vero 4K+ (Amlogic S905D)
Arm Juno
- Separate DT depending on SCMI firmware version
Aspeed:
- Quanta S6Q BMC (AST2600)
- ASRock ROMED8HM3 (AST2500)
Broadcom:
- Raspberry Pi Zero 2 W
Marvell MVEBU/Armada:
- Ctera C200 V1 NAS (kirkwood)
- Ctera C200 V2 NAS (armada-370)
Mstar
- DongShanPiOne, a low-end embedded board
- Miyoo Mini handheld game console
NXP i.MX:
- Numerous i.MX8M Mini based boards in even more variations, but
none based on other SoCs this time:
Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
Gateworks GW7903
Qualcomm:
- Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
- SHIFT6mq phone (Snapdragon 845)
- Samsung Galaxy Book2 (Snapdragon 850)
- Snapdragon 8 Gen 1 Hardware Development Kit
TI OMAP:
- SanCloud BeagleBone Enhanced WiFi
Rockchip:
- Pine64 PineNote ereader tablet (rk356x)
- Bananapi-R2-Pro (rk356x)
STM32:
- emtrion emSBS-Argon embedded board (stm32mp157c)
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmI7SvoACgkQmmx57+YA
GNkVrBAAkOb03vIWYdUwflcqjEXsV+Wop2innJE2KGuhXdwleTM9skRghBt2Ojpg
5doTbIUJZuUwPsJDRXe7tTt6ZJclr6XvO8/Us8iQ6OIS5V+EHVJEKWVGrgoZu/eU
LqZqbAZK43csnOid1Q/lDqh9eEGy5Xs8U7ivL+EIOuklYcE2110C0SVC9bsfWRES
u9Xx0b+LeIrp0lsyZFAbQTFGbx/pdvxwDZUjcC7coJRfJedKt6Z1NnnCSj9c0hAX
v9ZtRnPkgnOAzVINwsci2dtrcxBUPqYN9JxX4aW47BMftiASBv8y8xmeE7KVvAyq
9KOl/UtCUPTngH9oXCJm1MXe5rTN4YLs5fcBW6qz4/DwT1g8oSykCf0hs7t9vpKg
dH0iRjt55Nw3GbvvzKvUtfHikSmGiP5iLMZ+t9U7R2b/KYc6Mt74ystKY7sgElFc
3Pc1mus+RkBXZYnl4YKgSmkZkbMoauStuBG13lY6Fa3PHTExv3TnNSmin77KHbyX
257uN7hee0yxmLSiL7FzoJ3DIlmYMsc0oM9T2PArO+tRY/Unh45QSq6LObm06J53
9kPJhZOdYqvdEZNwrvSnFsDqg1B/KtJYupg59gI9O/+I0mRWuk7KD9EJzKerF1cq
SU+E3UciQeisixRb1HJVga/bfhLEDUZnOUw8RcLJx3O3Qz9neRk=
=v98T
-----END PGP SIGNATURE-----
Merge tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann:
"After a somewhat quiet 5.17 release, the size of the DT changes is a
bit larger again. There are nine new SoC that get added, all of them
related to existing platforms:
- Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB
- Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G
tablet
- Microchip Lan966 networking SoC and it evaluation board
- Qualcomm Snapdragon 625/632 midrange phone SoCs, with the LG Nexus
5X and Fairphone FP3 phones
- Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs, along
with their evaluation boards
- Samsung Exynos 850 phone SoC and reference board
- Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone
- Tesla FSD (Fully Self-Driving), an automotive SoC loosely derived
from the Samsung Exynos family.
- TI K3/AM62 SoC and reference board
Support for additional functionality in existing dts files is added
all over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91,
Allwinner, i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and
Broadcom.
Samsung has a rework for its pinctrl schema that is a bit tricky and
requires driver changes to be included here.
A few more platforms only have smaller cleanups and DT Schema fixes,
this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.
The new machines are really too many to list, but I'll do it anyway:
Allwinner:
- A20-Marsboard development board
Amlogic:
- Amediatek X96-AIR (Amlogic S905X3)
- CYX A95XF3-AIR (Amlogic S905X3)
- Haochuangy H96-Max (Amlogic S905X3)
- Amlogic AQ222 (Amlogic S4)
- OSMC Vero 4K+ (Amlogic S905D)
Arm Juno:
- Separate DT depending on SCMI firmware version
Aspeed:
- Quanta S6Q BMC (AST2600)
- ASRock ROMED8HM3 (AST2500)
Broadcom:
- Raspberry Pi Zero 2 W
Marvell MVEBU/Armada:
- Ctera C200 V1 NAS (kirkwood)
- Ctera C200 V2 NAS (armada-370)
Mstar:
- DongShanPiOne, a low-end embedded board
- Miyoo Mini handheld game console
NXP i.MX:
- Numerous i.MX8M Mini based boards in even more variations, but
none based on other SoCs this time:
Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
Gateworks GW7903
Qualcomm:
- Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
- SHIFT6mq phone (Snapdragon 845)
- Samsung Galaxy Book2 (Snapdragon 850)
- Snapdragon 8 Gen 1 Hardware Development Kit
TI OMAP:
- SanCloud BeagleBone Enhanced WiFi
Rockchip:
- Pine64 PineNote ereader tablet (rk356x)
- Bananapi-R2-Pro (rk356x)
STM32:
- emtrion emSBS-Argon embedded board (stm32mp157c)"
* tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (627 commits)
arm64: dts: n5x: drop invalid property and fix edac node name
arm64: dts: fsd: Add the MCT support
arm64: dts: stingray: Fix spi clock name
arm64: dts: ns2: Fix spi clock name
ARM: dts: rockchip: Update regulator name for PX3
ARM: dts: rockchip: Add #clock-cells value for rk805
arm64: dts: rockchip: Add #clock-cells value for rk805
arm64: dts: rockchip: Remove vcc13 and vcc14 for rk808
arm64: dts: rockchip: Fix SDIO regulator supply properties on rk3399-firefly
ARM: dts: at91: sama7g5: Add NAND support
ARM: dts: at91: sama7g5: add eic node
ARM: dts: at91: sama7g5: Remove unused properties in i2c nodes
ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15
arm64: dts: lg: align pl330 node name with dtschema
arm64: dts: lg: add dma-cells to pl330 node
arm64: dts: juno: align pl330 node name with dtschema
arm64: dts: broadcom: Fix sata nodename
arm64: dts: n5x: add sdr edac support
arm64: dts: agilex/stratix10: add clock-names to USB DWC2 node
dt-bindings: usb: dwc2: add disable-over-current
...
|
||
|
Linus Torvalds
|
b4bc93bd76 |
ARM driver updates for 5.18
There are a few separately maintained driver subsystems that we merge through
the SoC tree, notable changes are:
- Memory controller updates, mainly for Tegra and Mediatek SoCs,
and clarifications for the memory controller DT bindings
- SCMI firmware interface updates, in particular a new transport based
on OPTEE and support for atomic operations.
- Cleanups to the TEE subsystem, refactoring its memory management
For SoC specific drivers without a separate subsystem, changes include
- Smaller updates and fixes for TI, AT91/SAMA5, Qualcomm and NXP
Layerscape SoCs.
- Driver support for Microchip SAMA5D29, Tesla FSD, Renesas RZ/G2L,
and Qualcomm SM8450.
- Better power management on Mediatek MT81xx, NXP i.MX8MQ
and older NVIDIA Tegra chips
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmI4nOUACgkQmmx57+YA
GNlNNhAApPQw+FKQ6yVj2EZYcaAgik8PJAJoNQWYED52iQfm5uXgjt3aQewvrPNW
nkKx5Mx+fPUfaKx5mkVOFMhME5Bw9tYbXHm2/RpRp+n8jOdUlQpAhzIPOyWPHOJS
QX6qu4t+agrQzjbOCGouAJXgyxhTJFUMviM2EgVHbQHXPtdF8i2kyanfCP7Rw8cx
sVtLwpvhbLm849+deYRXuv2Xw9I3M1Np7018s5QciimI2eLLEb+lJ/C5XWz5pMYn
M1nZ7uwCLKPCewpMETTuhKOv0ioOXyY9C1ghyiGZFhHQfoCYTu94Hrx9t8x5gQmL
qWDinXWXVk8LBegyrs8Bp4wcjtmvMMLnfWtsGSfT5uq24JOGg22OmtUNhNJbS9+p
VjEvBgkXYD7UEl5npI9v9/KQWr3/UDir0zvkuV40gJyeBWNEZ/PB8olXAxgL7wZv
cXRYSaUYYt3DKQf1k5I4GUyQtkP/4RaBy6AqvH5Sx0lCwuY6G6ISK+kCPaaSRKnX
WR+nFw84dKCu7miehmW9qSzMQ4kiSCKIDqk7ilHcwv0J2oXDrlqVPKGGGTzZjUc8
+feqM/eSoYvDDEDemuXNSnl3hc1Zlvm7Apd5AN6kdTaNgoACDYdyvGuJ3CvzcA+K
1gBHUBvGS/ODA25KnYabr7wCMgxYqf7dXfkyKIBwFHwxOnRHtgs=
=Cfbk
-----END PGP SIGNATURE-----
Merge tag 'arm-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM driver updates from Arnd Bergmann:
"There are a few separately maintained driver subsystems that we merge
through the SoC tree, notable changes are:
- Memory controller updates, mainly for Tegra and Mediatek SoCs, and
clarifications for the memory controller DT bindings
- SCMI firmware interface updates, in particular a new transport
based on OPTEE and support for atomic operations.
- Cleanups to the TEE subsystem, refactoring its memory management
For SoC specific drivers without a separate subsystem, changes include
- Smaller updates and fixes for TI, AT91/SAMA5, Qualcomm and NXP
Layerscape SoCs.
- Driver support for Microchip SAMA5D29, Tesla FSD, Renesas RZ/G2L,
and Qualcomm SM8450.
- Better power management on Mediatek MT81xx, NXP i.MX8MQ and older
NVIDIA Tegra chips"
* tag 'arm-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (154 commits)
ARM: spear: fix typos in comments
soc/microchip: fix invalid free in mpfs_sys_controller_delete
soc: s4: Add support for power domains controller
dt-bindings: power: add Amlogic s4 power domains bindings
ARM: at91: add support in soc driver for new SAMA5D29
soc: mediatek: mmsys: add sw0_rst_offset in mmsys driver data
dt-bindings: memory: renesas,rpc-if: Document RZ/V2L SoC
memory: emif: check the pointer temp in get_device_details()
memory: emif: Add check for setup_interrupts
dt-bindings: arm: mediatek: mmsys: add support for MT8186
dt-bindings: mediatek: add compatible for MT8186 pwrap
soc: mediatek: pwrap: add pwrap driver for MT8186 SoC
soc: mediatek: mmsys: add mmsys reset control for MT8186
soc: mediatek: mtk-infracfg: Disable ACP on MT8192
soc: ti: k3-socinfo: Add AM62x JTAG ID
soc: mediatek: add MTK mutex support for MT8186
soc: mediatek: mmsys: add mt8186 mmsys routing table
soc: mediatek: pm-domains: Add support for mt8186
dt-bindings: power: Add MT8186 power domains
soc: mediatek: pm-domains: Add support for mt8195
...
|
||
|
Linus Torvalds
|
40037e4f8b |
sound updates for 5.18
It's been a fairly calm development cycle. There are a few
last-minute ALSA core fixes, most notably for covering PCM ioctl
races, but the most of rest are device-specific changes.
Below are some highlights:
* ALSA core:
- Fixes for PCM ioctl races that may lead to UAF
- Fix for oversized allocations in PCM OSS layer
* ASoC:
- Start of moving SoF to support multiple IPC mechanisms
- Use of NHLT ACPI table to reduce the amount of quirking required for
Intel systems
- Preliminary works forthcoming Intel AVS driver for legacy Intel DSP
firmwares
- Support for AMD PDM, Atmel PDMC, Awinic AW8738, i.MX cards with
TLV320AIC31xx, Intel machines with CS35L41 and ESSX8336, Mediatek
MT8181 wideband bluetooth, nVidia Tegra234, Qualcomm SC7280, Renesas
RZ/V2L, Texas Instruments TAS585M
* HD-audio:
- Driver re-binding fix for HD-audio
- Updates for Intel ADL and Tegra234, various platform quirks for
Dell, HP, Lenovo, ASUS, Samsung and Clevo machines
* USB-audio:
- Quirk updates for Scarlett2, RODE, Corsair devices
-----BEGIN PGP SIGNATURE-----
iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmI7AkUOHHRpd2FpQHN1
c2UuZGUACgkQLtJE4w1nLE/faBAAvPFODmyJlt16UG7bSlqwoSafWho+Bp4GSH4O
+pEm47+kULgkKOm9k2NK7sci6nOsNIabQsVhMeryCLgDlNlFqR4FQjIswbgtRWsO
lmu3TMw26I0vS2joNE+tpqCOyJuEGI/ekQru3aKAZx6JyBlXmrzuf7L4BNomVORr
fgBgpMg/tRcE9ceWjc1qHMggueAfkcjnI4ioFYxaWYXp4wyVX1mx3mVHEf6WQnff
ZXsgQLhupUKLvyBr2D1vkN6JcRyTahkBprbLEtZhKszR8hl6tFlnyILkzsiZ/B+K
oJAvtEoC6z2PW+suPSPPl2qnbyOJyX32m43iCXW8uSG1KG/K2JshZIJshMbVw3pV
rLK3XYr2zoE3VzzNUL+QyGYhLpdDPSNF+E19z7jfWU/wKwCUu8qWuejhf9uAlQgx
XtlrZuyCpnsNVyILqLM2Sgzvc1U8vJd68uYwhecchTmP0Aurld5NM2PiAagcvVpW
RtEMbTJbIBYbou3UPhxDjEdQOeT+KZUYrClEjb61pJQ9sHAbC4l0LoRyS4NEWCZH
J7Z5DNPqPf6CFU1AVpfktL4Dh+VtM7nb4DVyyyLWWZgG3NcXSVLLbUA8Uo9qoDV5
7tHnV+1MURBwEq1CUvZtb3sRC5tyNVkzXMMAJfcVWlv7JkoXs8pzwK9w685aP2zl
YDOfau8=
=5cCU
-----END PGP SIGNATURE-----
Merge tag 'sound-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"It's been a fairly calm development cycle. There are a few last-minute
ALSA core fixes, most notably for covering PCM ioctl races, but the
most of rest are device-specific changes.
Below are some highlights:
ALSA core:
- Fixes for PCM ioctl races that may lead to UAF
- Fix for oversized allocations in PCM OSS layer
ASoC:
- Start of moving SoF to support multiple IPC mechanisms
- Use of NHLT ACPI table to reduce the amount of quirking required
for Intel systems
- Preliminary works forthcoming Intel AVS driver for legacy Intel DSP
firmwares
- Support for AMD PDM, Atmel PDMC, Awinic AW8738, i.MX cards with
TLV320AIC31xx, Intel machines with CS35L41 and ESSX8336, Mediatek
MT8181 wideband bluetooth, nVidia Tegra234, Qualcomm SC7280,
Renesas RZ/V2L, Texas Instruments TAS585M
HD-audio:
- Driver re-binding fix for HD-audio
- Updates for Intel ADL and Tegra234, various platform quirks for
Dell, HP, Lenovo, ASUS, Samsung and Clevo machines
USB-audio:
- Quirk updates for Scarlett2, RODE, Corsair devices"
* tag 'sound-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (486 commits)
ALSA: hda/realtek: Add alc256-samsung-headphone fixup
ALSA: pci: fix reading of swapped values from pcmreg in AC97 codec
ALSA: pcm: Add stream lock during PCM reset ioctl operations
ALSA: pcm: Fix races among concurrent prealloc proc writes
ALSA: pcm: Fix races among concurrent prepare and hw_params/hw_free calls
ALSA: pcm: Fix races among concurrent read/write and buffer changes
ALSA: pcm: Fix races among concurrent hw_params and hw_free calls
ASoC: atmel: mchp-pdmc: print the correct property name
MAINTAINERS: Add Shengjiu to maintainer list of sound/soc/fsl
ASoC: SOF: Add a new dai_get_clk topology IPC op
ASoC: SOF: topology: Add ops for setting up and tearing down pipelines
ASoC: SOF: expose sof_route_setup()
ASoC: SOF: Add dai_link_fixup PCM op for IPC3
ASoC: SOF: Add trigger PCM op for IPC3
ASoC: SOF: Define hw_params PCM op for IPC3
ASoC: SOF: Introduce IPC3 PCM hw_free op
ASoC: SOF: pcm: expose the sof_pcm_setup_connected_widgets() function
ASoC: SOF: Introduce IPC-specific PCM ops
ASoC: SOF: Add bytes_ext control IPC ops for IPC3
ASoC: SOF: Add bytes_get/put control IPC ops for IPC3
...
|
||
|
Linus Torvalds
|
d6ccf45113 |
regulator: Updates for v5.18
Quite a quiet release for the regulator API, mainly a few new drivers
plus a lot of fixes for the Raspberry Pi panel driver. There's also a
SPI commit in here which I managed to apply to the wrong tree and then
didn't notice until there were too many commits on top of it, sorry
about that.
- Make it easier to use the virtual consumer test driver with DT
systems.
- Substantial overhaul providing various fixes and robustness
improvements for the Raspberry Pi panel driver.
- Support for Qualcomm PMX65 and SDX65, Richtek RT5190A, and Texas
Instruments TPS62864x
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmI4bYcACgkQJNaLcl1U
h9B0sQf+NvpOeni3N2z1vRS+b2k7r/qX0GU2X2Bs3FnulYRsLqGp9eg4dZvNCc1Z
XhVVqSWZUvI9TEpG5RRuGmTkb/3cwYzURkL1P4EXMrSNCmImRgZ9aTfF7Dc3wNg8
UcomWtsVEHMGNmfvU7Kazk4fVGtb+I1/lYf1i/jjB21108Qzk59CDdhEjQl0DMuZ
3ZNu7YC5MQN6QbjmEMdn3mSNilVyn67WBsCVePi4ebSK/GFZXUtxOtRWAQYTtej8
t0XOd5Z5iGpszohmKi78CdZvA4NtugPoavLbvpd1pRA/9A0PgMZq5vkmJdwW5Nwe
oMMMvJP1yBVLknl0pl7gTibdizoHzQ==
=U2e/
-----END PGP SIGNATURE-----
Merge tag 'regulator-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator updates from Mark Brown:
"Quite a quiet release for the regulator API, mainly a few new drivers
plus a lot of fixes for the Raspberry Pi panel driver.
There's also a SPI commit in here which I managed to apply to the
wrong tree and then didn't notice until there were too many commits on
top of it, sorry about that.
- Make it easier to use the virtual consumer test driver with DT
systems.
- Substantial overhaul providing various fixes and robustness
improvements for the Raspberry Pi panel driver.
- Support for Qualcomm PMX65 and SDX65, Richtek RT5190A, and Texas
Instruments TPS62864x"
* tag 'regulator-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (26 commits)
regulator: qcom-rpmh: Add support for SDX65
regulator: dt-bindings: Add PMX65 compatibles
regulator: vctrl: Use min() instead of doing it manually
regulator: rt5190a: Add support for Richtek RT5190A PMIC
regulator: Add bindings for Richtek RT5190A PMIC
regulator: Convert TPS62360 binding to json-schema
regulator: cleanup comments
regulator: virtual: add devicetree support
regulator: virtual: warn against production use
regulator: virtual: use dev_err_probe()
regulator: tps62864: Fix bindings for SW property
regulator: Add support for TPS6286x
regulator: Add bindings for TPS62864x
regulator/rpi-panel-attiny: Use two transactions for I2C read
regulator/rpi-panel-attiny: Use the regmap cache
regulator: rpi-panel: Remove get_brightness hook
regulator: rpi-panel: Add GPIO control for panel and touch resets
regulator: rpi-panel: Convert to drive lines directly
regulator: rpi-panel: Ensure the backlight is off during probe.
regulator: rpi-panel: Serialise operations.
...
|
||
|
Linus Torvalds
|
356a1adca8 |
arm64 updates for 5.18
- Support for including MTE tags in ELF coredumps
- Instruction encoder updates, including fixes to 64-bit immediate
generation and support for the LSE atomic instructions
- Improvements to kselftests for MTE and fpsimd
- Symbol aliasing and linker script cleanups
- Reduce instruction cache maintenance performed for user mappings
created using contiguous PTEs
- Support for the new "asymmetric" MTE mode, where stores are checked
asynchronously but loads are checked synchronously
- Support for the latest pointer authentication algorithm ("QARMA3")
- Support for the DDR PMU present in the Marvell CN10K platform
- Support for the CPU PMU present in the Apple M1 platform
- Use the RNDR instruction for arch_get_random_{int,long}()
- Update our copy of the Arm optimised string routines for str{n}cmp()
- Fix signal frame generation for CPUs which have foolishly elected to
avoid building in support for the fpsimd instructions
- Workaround for Marvell GICv3 erratum #38545
- Clarification to our Documentation (booting reqs. and MTE prctl())
- Miscellanous cleanups and minor fixes
-----BEGIN PGP SIGNATURE-----
iQFEBAABCgAuFiEEPxTL6PPUbjXGY88ct6xw3ITBYzQFAmIvta8QHHdpbGxAa2Vy
bmVsLm9yZwAKCRC3rHDchMFjNAIhB/oDSva5FryAFExVuIB+mqRkbZO9kj6fy/5J
ctN9LEVO2GI/U1TVAUWop1lXmP8Kbq5UCZOAuY8sz7dAZs7NRUWkwTrXVhaTpi6L
oxCfu5Afu76d/TGgivNz+G7/ewIJRFj5zCPmHezLF9iiWPUkcAsP0XCp4a0iOjU4
04O4d7TL/ap9ujEes+U0oEXHnyDTPrVB2OVE316FKD1fgztcjVJ2U+TxX5O4xitT
PPIfeQCjQBq1B2OC1cptE3wpP+YEr9OZJbx+Ieweidy1CSInEy0nZ13tLoUnGPGU
KPhsvO9daUCbhbd5IDRBuXmTi/sHU4NIB8LNEVzT1mUPnU8pCizv
=ziGg
-----END PGP SIGNATURE-----
Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Will Deacon:
- Support for including MTE tags in ELF coredumps
- Instruction encoder updates, including fixes to 64-bit immediate
generation and support for the LSE atomic instructions
- Improvements to kselftests for MTE and fpsimd
- Symbol aliasing and linker script cleanups
- Reduce instruction cache maintenance performed for user mappings
created using contiguous PTEs
- Support for the new "asymmetric" MTE mode, where stores are checked
asynchronously but loads are checked synchronously
- Support for the latest pointer authentication algorithm ("QARMA3")
- Support for the DDR PMU present in the Marvell CN10K platform
- Support for the CPU PMU present in the Apple M1 platform
- Use the RNDR instruction for arch_get_random_{int,long}()
- Update our copy of the Arm optimised string routines for str{n}cmp()
- Fix signal frame generation for CPUs which have foolishly elected to
avoid building in support for the fpsimd instructions
- Workaround for Marvell GICv3 erratum #38545
- Clarification to our Documentation (booting reqs. and MTE prctl())
- Miscellanous cleanups and minor fixes
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (90 commits)
docs: sysfs-devices-system-cpu: document "asymm" value for mte_tcf_preferred
arm64/mte: Remove asymmetric mode from the prctl() interface
arm64: Add cavium_erratum_23154_cpus missing sentinel
perf/marvell: Fix !CONFIG_OF build for CN10K DDR PMU driver
arm64: mm: Drop 'const' from conditional arm64_dma_phys_limit definition
Documentation: vmcoreinfo: Fix htmldocs warning
kasan: fix a missing header include of static_keys.h
drivers/perf: Add Apple icestorm/firestorm CPU PMU driver
drivers/perf: arm_pmu: Handle 47 bit counters
arm64: perf: Consistently make all event numbers as 16-bits
arm64: perf: Expose some Armv9 common events under sysfs
perf/marvell: cn10k DDR perf event core ownership
perf/marvell: cn10k DDR perfmon event overflow handling
perf/marvell: CN10k DDR performance monitor support
dt-bindings: perf: marvell: cn10k ddr performance monitor
arm64: clean up tools Makefile
perf/arm-cmn: Update watchpoint format
perf/arm-cmn: Hide XP PUB events for CMN-600
arm64: drop unused includes of <linux/personality.h>
arm64: Do not defer reserve_crashkernel() for platforms with no DMA memory zones
...
|
||
|
Zong Li
|
0493692b40 |
dt-bindings: change the macro name of prci in header files and example
We currently change the macro name for fu540 and fu740 by adding the prefix respectively, the dt-bindings should be modified as well. Signed-off-by: Zong Li <zong.li@sifive.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Link: https://lore.kernel.org/r/f9284873c2993a9952d9fe4f8dd5e89f20daab75.1646388139.git.zong.li@sifive.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Tony Lindgren
|
579cdf58b7 |
clk: ti: Drop legacy compatibility clocks for dra7
We no longer have users for the compatibility clocks and we can drop them. These are old duplicate clocks for what we using. Depends-on: |
||
|
Tony Lindgren
|
e65eb2efc6 |
clk: ti: Drop legacy compatibility clocks for am4
We no longer have users for the compatibility clocks and we can drop them. These are old duplicate clocks for what we using. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220203085618.16043-3-tony@atomide.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Tony Lindgren
|
8850c3eae2 |
clk: ti: Drop legacy compatibility clocks for am3
We no longer have users for the compatibility clocks and we can drop them. These are old duplicate clocks for what we using. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220203085618.16043-2-tony@atomide.com Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Guodong Liu
|
338e953f1b |
dt-bindings: pinctrl: mt8186: add pinctrl file and binding document
1. This patch adds pinctrl file for mt8186. 2. This patch adds mt8186 compatible node in binding document. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220216032124.28067-2-guodong.liu@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
||
|
Emil Renner Berthing
|
458dad7cac |
dt-bindings: clock: Add JH7100 audio clock definitions
Add all clock outputs for the StarFive JH7100 audio clock generator. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20220126173953.1016706-4-kernel@esmil.dk Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
|
Tom Rix
|
6853fece62 |
dt-bindings: clk: cleanup comments
For spdx, first line /* */ for *.h, change tab to space Replacements devider to divider Comunications to Communications periphrals to peripherals supportted to supported wich to which Documentatoin to Documentation Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220309222302.1114561-1-trix@redhat.com |
||
|
Martin Botka
|
8397c9c0c2 |
dt-bindings: clock: add QCOM SM6125 display clock bindings
Add device tree bindings for display clock controller for Qualcomm Technology Inc's SM6125 SoC. Signed-off-by: Martin Botka <martin.botka@somainline.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220303131812.302302-3-marijn.suijten@somainline.org |
||
|
Bhupesh Sharma
|
d1a16e3455 |
clk: qcom: gcc: Add emac GDSC support for SM8150
Add the EMAC GDSC defines and driver structures for SM8150. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220303084824.284946-4-bhupesh.sharma@linaro.org |
||
|
Bhupesh Sharma
|
2fb605a1a5 |
clk: qcom: gcc: Add UFS_CARD and UFS_PHY GDSCs for SM8150
Add the UFS_CARD and UFS_PHY GDSC defines & driver structures for SM8150. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220303082140.240745-2-bhupesh.sharma@linaro.org |
||
|
Bhupesh Sharma
|
2dc63e768c |
clk: qcom: gcc: Add PCIe0 and PCIe1 GDSC for SM8150
Add the PCIe0 and PCIe1 GDSC defines & driver structures for SM8150. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220302203045.184500-4-bhupesh.sharma@linaro.org |
||
|
ChiYuan Huang
|
b77e70f6b8
|
regulator: Add bindings for Richtek RT5190A PMIC
Add bindings for Richtek RT5190A PMIC. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/1646812903-32496-2-git-send-email-u0084500@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
|
Konrad Dybcio
|
5b2fa289c0 |
dt-bindings: clock: qcom: rpmcc: Add RPM Modem SubSystem (MSS) clocks
Add the missing clock definitions. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220226214126.21209-1-konrad.dybcio@somainline.org |
||
|
Ansuel Smith
|
887646c47d |
dt-bindings: reset: add ipq8064 ce5 resets
Add ipq8064 ce5 resets needed for CryptoEngine gcc driver. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Tested-by: Jonathan McDowell <noodles@earth.li> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220226135235.10051-14-ansuelsmth@gmail.com |
||
|
Ansuel Smith
|
b565d66403 |
dt-bindings: clock: add ipq8064 ce5 clk define
Add ipq8064 ce5 clk define needed for CryptoEngine in gcc driver. Define CE5_SRC is not used so it's OK to change and we align it to the QSDK naming. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Tested-by: Jonathan McDowell <noodles@earth.li> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220226135235.10051-12-ansuelsmth@gmail.com |
||
|
Konrad Dybcio
|
7b91b9d8cc |
dt-bindings: clock: add SM6350 QCOM Graphics clock bindings
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM6350 SoCs. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220222011534.3502-3-konrad.dybcio@somainline.org |
||
|
Konrad Dybcio
|
6914b82f37 |
dt-bindings: clock: add QCOM SM6350 display clock bindings
Add device tree bindings for display clock controller for Qualcomm Technology Inc's SM6350 SoC. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220222011534.3502-1-konrad.dybcio@somainline.org |
||
|
Arnd Bergmann
|
c76edea0e5 |
Amlogic Drivers updates for v5.18:
- Add support for Amlogic S4 in meson-secure-pwrc power domain driver -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmIlxcAACgkQd9zb2sjI SdG04Q/+OTU7F/FWaNzpdpFVnwlGbYA66TCH9TYV79m7L2j/FZ0D6rbZNhFtXW7J skclZS9Rkdllq90OpgkHgmPRNvygDw0m0OqOdjYhgCQbSn3f1lgXNYrxnFyVyoFT kXEDCw6lUFpJZ/wFlO01zSJRALgIJMLvWpkX/bsMs3n02hQOYkfdfNdRuVqOEx/e YblCM3RvfsII0etXh3pj/cAStdc5BcZ0pQStXqhRKQORtZ4zd1VIW7H3ouWdrQfi qIHZD85SlK9tPM9+PGgj0bfUXiiT5pBbr6kaVhseGJ5J58FdSvUkjfz+CffJRmgT 2e61rVyMbaYKMy3NBG3/OSVFuFCv7w65/z0FXW9cGxdtOoxNm65RKzPff3rdA/rT XOPSbHBrVqF22kMjgh7aMUbce8ve0Cqf4r8QK8Opqghyq+b8ndMp/qwehI5NENf2 xxvBPP6vEYgaIHgXKN+ZzKzLoYdaiEQFf3T4gSuIKnMqNfuUbbjBi2WUstJ4X2IC vtXLZ15XGvfe0oj+/EFwtqPEyHwpumCAYOlq+9iT34G5pllcAbnhNWMwlj4frBxG k8HBfyaJ9alIn6qe9qMAwjD4eBEgzuFgqJc5HDnb8YOcT4UmzxrzPVtdbXUHTgSX a2mj0ZMCDMXARKrGpmMpngdp9P6DmK4OHbWEGqo97APZCmExBg0= =I56h -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmInfxUACgkQmmx57+YA GNlE5g//W8rmP7MMQgJrSeoOaCHCcri2sByL5+lyz6E4PQx2paUfcgG0+hosW57g 6BcmAo5YrlG/SQBkmXuHS4vvWzWlac4f4tDDldXmdQYOzywlqdUVsHy6KyJaj7r/ cJGimvMzI7Lfhkub1zeSya3GGTtXGPx6Rj+JssSUSFW/yM7L0irp6K1iAEobHdNj 5ljHdhZQ8GRfHasj5ToPoigBk4fQbAg0iOhYnA28CP2NMv1dEoGCSh1i0xQvtiP3 3lGeL/6kHAg2j99lEkQqRaKD9kQHpiDxtMtzf1M8lmnOAMX5N6WlPffYCWA/J9tO C7E7Yo6cInos4USpjmhYFY+E6TTgaitVc4xU+wltpILidULaxLBRo4OcVtFdoOPn hnCZB65Q5DCqn2cuwkVZ5KPXC6yax9YfkiOH7BHBtAo+sKbtJyuaV0sH4ZPbrSmW NZafDpDsEhbO2vtsB9tki3eMeSu5/HAhJI/1aba+Lpdf9MvAOjelEH62N+mtwnWC EJMaYXWi4d8sNaEgJ2gj5H97/qzBMnG2COiL7KQuaYocGwJsRrkbXyoaBsnN58/K arhrzS7/4KPXtQ6UFx7i2Ri25vvoi9YkrjFz02ivl57zn8QFw5pc/ruKhJxfh24Y SsHbOs3gwWBhEPR6yLbeM/MU+kOwYzDu504gK9EQCWvcHGWMxJU= =zPvd -----END PGP SIGNATURE----- Merge tag 'amlogic-drivers-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/drivers Amlogic Drivers updates for v5.18: - Add support for Amlogic S4 in meson-secure-pwrc power domain driver * tag 'amlogic-drivers-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: soc: s4: Add support for power domains controller dt-bindings: power: add Amlogic s4 power domains bindings Link: https://lore.kernel.org/r/c7471989-d929-c744-c0c3-c8e86eaaa225@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
1a38f961c4 |
AT91 DT #2 for 5.18:
- Align one sam9x60ek regulator with reality at vdd_1v15 - Clean sama7g5 i2c nodes - Add EIC and NAND nodes to sama7g5 -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ5TRCVIBiyi/S+BG4fOrpwrNPNDAUCYiIzawAKCRAfOrpwrNPN DCk9AQCT+C8zZhkLzAxocmVpCFof63J9Rqu56ZGcK2AhSkGj3gD/UmNizVT9KRdT gKLHL3mxiU8Hw0sZZvyfKlYPaJwxFQ4= =m0+u -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIndLQACgkQmmx57+YA GNm3nA/+NhFxbecEs8Lv2WMsMKNrJ+tG4I0o993nP1AjMKhl8WYeYe81JHjkLIeo zKaIXvNdSeZ2f7hDIWgKOr34jwjLtuyEJVe/GFvg1T25UG1rsfMbD+lpS28/jUwY BoZv3fwKijjXML1lSRGQxfYVrJypQXExdS0XkJL3WMBdeiICvZUcVuJVcjOUWrLk jEUjUDyzulpwxowI0DOKFZBydO2GvT6YTGaCe6MbaLErRGc3wF6PjyzZTHz4Kfmw 4/OAuikvRF8nL0WU3fnlZAj/iMW35258WdbkF1JhjeDvSQ6uvQm7GaT/AKyWvDBu Jh/wsgRNt5GSdbSKJs3EOMpm+oGt/FBuZLVRoQB2HI0thwUWvpK2WJg7iCyzH5zF TD286uC6ZYqICIcexghnPJ8EBNAgptaetfQwRMh6J7fK83lW3lDENg80BJ19/tGC EVeC5wdz05QIPnW7tYcPzqWTKKP/fVeNf8LAoMlpXnGCGdahtkzWIM6OamECiGYC Cbf5cBbswlJkv/qVJuAeDoKZeDEKU1LjW1OchS7yW4UBZD/nyrMJBTSktfMf1U3+ 13Mm9vSlaNgBrA+sLTTwH+ShACKvN+w3K4MS933DLnTmN/stqzrf2DxKRQrpPs1t PwaEP50X6vKlaZzcf7Bd0Q643YaKr3De4UazwNig0Kr9wXMXSuw= =SwNp -----END PGP SIGNATURE----- Merge tag 'at91-dt-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 DT #2 for 5.18: - Align one sam9x60ek regulator with reality at vdd_1v15 - Clean sama7g5 i2c nodes - Add EIC and NAND nodes to sama7g5 * tag 'at91-dt-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama7g5: Add NAND support ARM: dts: at91: sama7g5: add eic node ARM: dts: at91: sama7g5: Remove unused properties in i2c nodes ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15 Link: https://lore.kernel.org/r/20220304160036.27392-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Codrin Ciubotariu
|
015044e961
|
ASoC: dt-bindings: Document Microchip's PDMC
Add DT bindings for the new Microchip PDMC embedded in sama7g5 SoCs. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220307122202.2251639-3-codrin.ciubotariu@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org> |