Commit graph

5565 commits

Author SHA1 Message Date
Sibi Sankar
61025b815e arm64: dts: qcom: sm8150: Add ADSP, CDSP, MPSS and SLPI smp2p
Add the SMP2P nodes for the remoteproc states for ADSP, CDSP, MPSS and
SLPI remoteprocs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/0101016e80793dfa-9d0f6e93-01db-4c95-a226-d64bb50238cb-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-16 15:45:57 -08:00
Douglas Anderson
fd91651664 arm64: dts: qcom: sc7180: Avoid "phy" for USB QMP PHY wrapper
The bindings for the QMP PHY are truly strange.  I believe (?) that
they may have originated because with PCIe each lane is treated as a
different PHY and the same PHY driver is used for a whole bunch of
things (incluidng PCIe).

In any case, now that we have "make dtbs_check", we find that having
the outer node named "phy" triggers the
"schemas/phy/phy-provider.yaml" schema, yelling about:

  phy@88e9000: '#phy-cells' is a required property

Let's call the outer node the "phy-wrapper" and the inner node the
"phy" to make dtbs_check happy.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 0b766e7fe5 ("arm64: dts: qcom: sc7180: Add USB related nodes")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.6.Iec10b23bb000186b36b8bacfb6789d8233de04a7@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-12 15:18:41 -08:00
Douglas Anderson
3f155dbebf arm64: dts: qcom: pm6150: Remove macro from unit name of adc-chan
This is just like commit e77cc85ee3 ("arm64: dts: qcom: sdm845:
remove macro from unit name").  It fixes the error in 'make
dtbs_check':

arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: adc@3100: 'adc-chan@0x06' does not match any of the regexes: ...

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: a727ec1232 ("arm64: dts: qcom: pm6150: Add PM6150/PM6150L PMIC peripherals")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.4.I5f67a5ed7665f658c95447a837cbd0021e1dc689@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-12 15:15:23 -08:00
Douglas Anderson
6e3697279e arm64: dts: qcom: sc7180: Add "#clock-cells" property to usb_1_ssphy
Running "dtbs_check" yells:
  '#clock-cells' is a dependency of 'clock-output-names'

...and sure enough the bindings say we should have "#clock-cells".
Add it.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 0b766e7fe5 ("arm64: dts: qcom: sc7180: Add USB related nodes")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.3.Ia530e4065ca81f55ac8f89a400f6a0a084ff6712@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-12 15:15:17 -08:00
Douglas Anderson
ac00546a67 arm64: dts: qcom: sc7180: Rename gic-its node to msi-controller
Running `make dtbs_check` yells:

  arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: interrupt-controller@17a00000: gic-its@17a40000: False schema

From "arm,gic-v3.yaml" we can grok that this is explained by the
comment "msi-controller is preferred".  Switch to the preferred name
so that dtbs_check stops yelling.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 90db71e480 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.2.Ibad7d3b0bea02957e89047942c61cc6c0aa61715@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-12 15:15:08 -08:00
Douglas Anderson
d8c5133583 arm64: dts: qcom: sc7180: Add SoC name to compatible
Running `make dtbs_check` yells because qcom.yaml says that we should
have:

- items:
    - enum:
        - qcom,sc7180-idp
    - const: qcom,sc7180

...but we're missing "qcom,sc7180".  Add it.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 90db71e480 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191212113540.1.I158061c65974bf0f653ceb79b442b76a1fd64868@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-12 15:14:59 -08:00
Sibi Sankar
017e7856ed arm64: dts: sm8150: Add rpmh power-domain node
Add the DT node for the rpmhpd power controller.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/0101016e7f99eab9-35efa01f-8ed3-4a77-87e1-09c381173121-000000@us-west-2.amazonses.com
[bjorn: Use constant for opp6, until include lands]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-11 23:33:46 -08:00
Rajendra Nayak
9868a31c31 arm64: dts: sc7180: Add aliases for all i2c and spi devices
Add aliases for all i2c and spi nodes

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3cded0a-f85e1f98-f3be-4f6f-805f-82f8b6a83e14-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-11 22:51:16 -08:00
Rajendra Nayak
d8b076b891 arm64: dts: sc7180: Remove additional spi chip select muxes
remove the additional CS muxes that were added by default for
spi so every board using sc7180 does not have to override it.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3cdad4a-cbfbc482-1f74-4cb7-88fc-b4b6ed7e7543-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-11 22:51:04 -08:00
Loic Poulain
4868f573a7 arm: dts: qcom: db410c: Enable USB OTG support
The Dragonboard-410c is able to act either as USB Host or Device.
The role can be determined at runtime via the USB_HS_ID pin which is
derived from the micro-usb port VBUS pin.

In Host role, SoC USB D+/D- are routed to the onboard USB 2.0 HUB.
In Device role, SoC USB D+/D- are routed to the USB 2.0 micro B port.
Routing is selected via USB_SW_SEL_PM gpio.

In device role USB HUB can be held in reset.

chipidea driver expects two extcon device pointers, one for the
EXTCON_USB event and one for the EXTCON_USB_HOST event. Since
the extcon-usb-gpio device is capable of generating both these
events, point two times to this extcon device.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1576083014-5842-1-git-send-email-loic.poulain@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-11 22:48:37 -08:00
Stephan Gerhold
741a5ea7a6 arm64: dts: qcom: pm8916: Add vibration motor node
PM8916 has one vibration motor driver that is already supported
by the pm8xxx-vibrator driver.

Add a node describing it to pm8916.dtsi.
Keep it disabled by default since not all devices make use of it.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191211192906.56638-1-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-11 22:40:35 -08:00
Sandeep Maheswaram
0b766e7fe5 arm64: dts: qcom: sc7180: Add USB related nodes
Add nodes for DWC3 USB controller, QMP and QUSB PHYs.

Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573795421-13989-2-git-send-email-sanm@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:49:02 -08:00
Rajeshwari
82bdc93972 arm64: dts: qcom: sc7180: Add device node support for TSENS in SC7180
Add TSENS node and user thermal zone for TSENS sensors in SC7180.

Signed-off-by: Rajeshwari <rkambl@codeaurora.org>
Link: https://lore.kernel.org/r/1574934847-30372-2-git-send-email-rkambl@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:46:25 -08:00
Jeffrey Hugo
876a757370 arm64: dts: qcom: msm8998: Add gpucc node
Add MSM8998 GPU Clock Controller DT node.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191031185806.15602-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:42:25 -08:00
Vinod Koul
3e5bf28d2c arm64: dts: qcom: sm8150-mtp: Enable UFS nodes
Enable the UFS HC and phy nodes and add regulators used by these.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20191106084656.1749954-2-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:34:15 -08:00
Vinod Koul
3834a2e922 arm64: dts: qcom: sm8150: Add ufs nodes
Add the ufs hc node and ufs phy nodes found in SM8150

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20191106084656.1749954-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:34:14 -08:00
Vinod Koul
d6f55763c7 arm64: dts: qcom: Use gcc clock enums
Now that header defining gcc clocks is upstream, use the enums instead
of numbers

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20191106084604.1746544-1-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:28:58 -08:00
Taniya Das
86899d8235 arm64: dts: sc7180: Add cpufreq HW node for cpu scaling
cpufreq hw node required to scale CPU frequency on sc7180.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ed02b6356-5165eaaa-6c54-47ff-a008-821c91831e56-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:15:06 -08:00
Manu Gautam
d026c96b25 arm64: dts: qcom: msm8996: Disable USB2 PHY suspend by core
QUSB2 PHY on msm8996 doesn't work well when autosuspend by
dwc3 core using USB2PHYCFG register is enabled. One of the
issue seen is that PHY driver reports PLL lock failure and
fails phy_init() if dwc3 core has USB2 PHY suspend enabled.
Fix this by using quirks to disable USB2 PHY LPM/suspend and
dwc3 core already takes care of explicitly suspending PHY
during suspend if quirks are specified.

Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Signed-off-by: Paolo Pisati <p.pisati@gmail.com>
Link: https://lore.kernel.org/r/20191209151501.26993-1-p.pisati@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 23:11:41 -08:00
Sai Prakash Ranjan
c831fa2999 arm64: dts: qcom: sc7180: Add Last level cache controller node
Add device tree node for LLCC aka system cache controller for
SC7180 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3394291-2290a8be-91c9-4d46-b5ca-acd5277eb6e2-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 22:51:23 -08:00
Sai Prakash Ranjan
fb2d815006 arm64: dts: qcom: sm8150: Add APSS watchdog node
Add APSS (Application Processor Subsystem) watchdog
DT node for SM8150 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3393092-487ddf4a-2e17-40f0-8161-3e686a7b57dc-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 22:51:13 -08:00
Sai Prakash Ranjan
4722f95646 arm64: dts: qcom: sc7180: Add APSS watchdog node
Add APSS (Application Processor Subsystem) watchdog
DT node for SC7180 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/0101016ef3391ce3-438cca2f-458c-47d9-a62a-381f1c6bfb15-000000@us-west-2.amazonses.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 22:50:29 -08:00
Sai Prakash Ranjan
39abbd3087 arm64: dts: sdm845: Update the device tree node for LLCC
LLCC cache-controller was renamed to system-cache-controller
to make schema pass the dt binding check. Update the device
tree node to reflect this change.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/a2bb92de65e90768bf1d6b8c0b7fbd43cba704d2.1573814758.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 22:43:33 -08:00
Douglas Anderson
a0f9639033 arm64: dts: sc7180: Add a comment to i2c7 about external pullup
Make i2c7 symmetric with the other i2c busses and comment that we have
no internal pull because there is an external one.

Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Fixes: ba3fc64963 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191210163530.2.I8d4cbb3d7ac5824f8e950c53038df8c27a512905@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 22:41:07 -08:00
Douglas Anderson
15f1eae346 arm64: dts: sc7180: Fix indentation/ordering of qspi nodes in sc7180-idp
The qspi pinctrl nodes had the wrong indentation and sort ordering and
the main qspi node was placed down in the pinctrl section.  Fix.

Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>
Fixes: ba3fc64963 ("arm64: dts: sc7180: Add qupv3_0 and qupv3_1")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20191210163530.1.I69a6c29e08924229d160b651769c84508a07b3c6@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 22:40:38 -08:00
Amit Kucheria
809b3c51e6 arm64: dts: msm8916: thermal: Add interrupt support
Register upper-lower interrupt for the tsens controller.

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/88eff964b708c8aff57b24370d2e14389ace09e9.1572526427.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 21:23:28 -08:00
Lina Iyer
aeae948f6a arm64: dts: qcom: setup PDC as the wakeup parent for TLMM on SDM845
PDC always-on interrupt controller can detect certain GPIOs even when
the TLMM interrupt controller is powered off. Link the PDC as TLMM's
wakeup parent.

Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573855915-9841-12-git-send-email-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:01 -08:00
Lina Iyer
72b67ebf9d arm64: dts: qcom: add PDC interrupt controller for SDM845
Add PDC interrupt controller device bindings for SDM845.

Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573855915-9841-11-git-send-email-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:01 -08:00
Jeffrey Hugo
05caa5bf9c arm64: dts: qcom: msm8998: Fix tcsr syscon size
The tcsr syscon region is really 0x40000 in size.  We need access to the
full region so that we can access the axi resets when managing the
modem subsystem.

Fixes: c783394956 ("arm64: dts: qcom: msm8998: Add smem related nodes")
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191107045948.4341-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:00 -08:00
Jeffrey Hugo
19b7caaa93 arm64: dts: qcom: msm8998: Add wifi node
Add the wifi node and required reserved memory to enable the wlan
hardware.  Enable the wifi node in both the mtp and clamshell platforms
after adding the relevant regulators for each platform.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191107043313.4055-3-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:00 -08:00
Jeffrey Hugo
a21c954821 arm64: dts: qcom: msm8998: Add anoc2 smmu node
While there are several peripherals on the anoc2, most are not behind the
smmu.  However, the SoC integrated wlan block is behind the smmu, so we'll
need to control the smmu inorder to enable wifi.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191107043313.4055-2-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:59 -08:00
Roja Rani Yarubandi
ba3fc64963 arm64: dts: sc7180: Add qupv3_0 and qupv3_1
Add QUP SE instances configuration for sc7180.

Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-14-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:59 -08:00
Taniya Das
0def3f14c5 arm64: dts: qcom: SC7180: Add node for rpmhcc clock driver
Add node for rpmhcc clock driver.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-13-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:59 -08:00
Kiran Gunda
b62e108da5 arm64: dts: qcom: sc7180-idp: Add RPMh regulators
Add the rpmh regulators for the sc7180 idp platform. This platform
consists of PMIC PM6150 and PM6150l

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/20191108092824.9773-12-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:58 -08:00
Kiran Gunda
a727ec1232 arm64: dts: qcom: pm6150: Add PM6150/PM6150L PMIC peripherals
Add PM6150/PM6150L peripherals such as PON, GPIOs, ADC and other
PMIC infra modules.

Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-11-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:58 -08:00
Kiran Gunda
0f9dc5f09f arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device
Add SPMI PMIC arbiter device to communicate with PMICs
attached to SPMI bus.

Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-10-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:58 -08:00
Maulik Shah
22f185ee81 arm64: dts: qcom: sc7180: Add pdc interrupt controller
Add pdc interrupt controller for sc7180

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-9-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:57 -08:00
Maulik Shah
fec6359c28 arm64: dts: qcom: sc7180: Add rpmh-rsc node
Add device bindings for the application processor's rsc. The rsc
contains the TCS that are used for communicating with the hardened
resource accelerators on Qualcomm Technologies, Inc. (QTI) SoCs.

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-6-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:57 -08:00
Maulik Shah
e0abc5eb52 arm64: dts: qcom: sc7180: Add cmd_db reserved area
Command_db provides mapping for resource key and address managed
by remote processor. Add cmd_db reserved memory area.

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-5-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:56 -08:00
Vivek Gautam
d66df6248a arm64: dts: sc7180: Add device node for apps_smmu
Adding device node for APPS SMMU that is connected to
devices such as display, video, usb, mmc, etc. on SC7180
chipset.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-4-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:56 -08:00
Rajendra Nayak
90db71e480 arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc
Add skeletal sc7180 SoC dtsi and idp board dts files.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Co-developed-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/20191108092824.9773-3-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:55 -08:00
Amit Kucheria
e68ca6b6fd arm64: dts: sdm845: thermal: Add critical interrupt support
Register critical interrupts for each of the two tsens controllers

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/c536e9cdb448bbad3441f6580fa57f1f921fb580.1573499020.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:55 -08:00
Olof Johansson
942e6f8a83 Merge mainline/master into arm/fixes
This brings in the mainline tree right after armsoc contents was merged
this release cycle, so that we can re-run savedefconfig, etc.

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-12-05 13:18:54 -08:00
Linus Torvalds
eb275167d1 ARM: Device-tree updates
As always, the bulk of updates. Some of the news this cycle:
 
 New SoC descriptions:
  - Broadcom BCM2711
  - Amlogic Meson A1 and G12
  - Freescale S32V234
  - Marvell Armada AP807/AP807-quad and CP115
  - Realtek RTD1293 and RTD1296
  - Rockchip RK3308
 
 New boards and platforms:
  - Allwinner: NanoPi Duo2
  - Amlogic: Ugoos am6
  - Atmel at91: Overkiz Kizbox2/4
  - Broadcom: RPi4, Luxul XWC-2000
  - Marvell: New Espressobin flavor
  - NXP: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri, S32V234 EVB, Netronix
    E60K02 and Kobo Clara HD, Kontron N6311 and N6411, OPOS6UL and
    OPOS6ULDev
  - Renesas: Salvator-XS
  - Rockchip: Beelink A1 (rk3308), rk3308 eval boards, rk3399-roc-pc
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM Device-tree updates from Olof Johansson:
 "As always, the bulk of updates.  Some of the news this cycle:

  New SoC descriptions:
   - Broadcom BCM2711
   - Amlogic Meson A1 and G12
   - Freescale S32V234
   - Marvell Armada AP807/AP807-quad and CP115
   - Realtek RTD1293 and RTD1296
   - Rockchip RK3308

  New boards and platforms:
   - Allwinner: NanoPi Duo2
   - Amlogic: Ugoos am6
   - Atmel at91: Overkiz Kizbox2/4
   - Broadcom: RPi4, Luxul XWC-2000
   - Marvell: New Espressobin flavor
   - NXP: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri, S32V234 EVB, Netronix
     E60K02 and Kobo Clara HD, Kontron N6311 and N6411, OPOS6UL and
     OPOS6ULDev
   - Renesas: Salvator-XS
   - Rockchip: Beelink A1 (rk3308), rk3308 eval boards, rk3399-roc-pc"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (653 commits)
  ARM: dts: logicpd-torpedo: Disable USB Host
  arm: dts: mt6323: add keys, power-controller, rtc and codec
  arm64: dts: mt8183: add systimer0 device node
  dt-bindings: mediatek: update bindings for MT8183 systimer
  arm64: dts: rockchip: fix sdmmc detection on boot on rk3328-roc-cc
  arm64: dts: rockchip: Split rk3399-roc-pc for with and without mezzanine board.
  arm64: dts: rockchip: Add Beelink A1
  dt-bindings: ARM: rockchip: Add Beelink A1
  arm64: dts: rockchip: Add RK3328 audio pipelines
  arm64: dts: ti: k3-j721e-common-proc-board: Add USB ports
  arm64: dts: ti: k3-j721e-main: add USB controller nodes
  ARM: dts: aspeed-g6: Add timer description
  ARM: dts: aspeed: ast2600evb: Enable i2c buses
  ARM: dts: at91: add a dts and dtsi file for kizbox2 based boards
  dt-bindings: arm: at91: Document Kizbox2-2 board binding
  arm64: dts: meson-gx: fix i2c compatible
  arm64: dts: meson-gx: cec node should be disabled by default
  arm64: dts: meson-g12b-odroid-n2: add missing amlogic, s922x compatible
  arm64: dts: meson-gxm: fix gpu irq order
  arm64: dts: meson-g12a: fix gpu irq order
  ...
2019-12-05 12:09:47 -08:00
Olof Johansson
563b75d749 ARMv8 Juno fixes for v5.5
Couple of fixes:
 1. Fix for UART clock frequency on all Juno variants that exist since
    the platform was added. This is mainly due to incorrect Juno SoC
    TRM that was referred during initial development days
 2. Drop "dma-ranges" property for now as they are triggering loads of
    warning on boot
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Merge tag 'juno-fixes-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixes

ARMv8 Juno fixes for v5.5

Couple of fixes:
1. Fix for UART clock frequency on all Juno variants that exist since
   the platform was added. This is mainly due to incorrect Juno SoC
   TRM that was referred during initial development days
2. Drop "dma-ranges" property for now as they are triggering loads of
   warning on boot

* tag 'juno-fixes-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  Revert "arm64: dts: juno: add dma-ranges property"
  arm64: dts: juno: Fix UART frequency
  arm64: dts: juno: add GPU subsystem

Link: https://lore.kernel.org/r/20191202114338.GA20965@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-12-05 10:11:38 -08:00
Linus Torvalds
c3bed3b20e pci-v5.5-changes
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Merge tag 'pci-v5.5-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI updates from Bjorn Helgaas:
 "Enumeration:

   - Warn if a host bridge has no NUMA info (Yunsheng Lin)

   - Add PCI_STD_NUM_BARS for the number of standard BARs (Denis
     Efremov)

  Resource management:

   - Fix boot-time Embedded Controller GPE storm caused by incorrect
     resource assignment after ACPI Bus Check Notification (Mika
     Westerberg)

   - Protect pci_reassign_bridge_resources() against concurrent
     addition/removal (Benjamin Herrenschmidt)

   - Fix bridge dma_ranges resource list cleanup (Rob Herring)

   - Add "pci=hpmmiosize" and "pci=hpmmioprefsize" parameters to control
     the MMIO and prefetchable MMIO window sizes of hotplug bridges
     independently (Nicholas Johnson)

   - Fix MMIO/MMIO_PREF window assignment that assigned more space than
     desired (Nicholas Johnson)

   - Only enforce bus numbers from bridge EA if the bridge has EA
     devices downstream (Subbaraya Sundeep)

   - Consolidate DT "dma-ranges" parsing and convert all host drivers to
     use shared parsing (Rob Herring)

  Error reporting:

   - Restore AER capability after resume (Mayurkumar Patel)

   - Add PoisonTLPBlocked AER counter (Rajat Jain)

   - Use for_each_set_bit() to simplify AER code (Andy Shevchenko)

   - Fix AER kernel-doc (Andy Shevchenko)

   - Add "pcie_ports=dpc-native" parameter to allow native use of DPC
     even if platform didn't grant control over AER (Olof Johansson)

  Hotplug:

   - Avoid returning prematurely from sysfs requests to enable or
     disable a PCIe hotplug slot (Lukas Wunner)

   - Don't disable interrupts twice when suspending hotplug ports (Mika
     Westerberg)

   - Fix deadlocks when PCIe ports are hot-removed while suspended (Mika
     Westerberg)

  Power management:

   - Remove unnecessary ASPM locking (Bjorn Helgaas)

   - Add support for disabling L1 PM Substates (Heiner Kallweit)

   - Allow re-enabling Clock PM after it has been disabled (Heiner
     Kallweit)

   - Add sysfs attributes for controlling ASPM link states (Heiner
     Kallweit)

   - Remove CONFIG_PCIEASPM_DEBUG, including "link_state" and "clk_ctl"
     sysfs files (Heiner Kallweit)

   - Avoid AMD FCH XHCI USB PME# from D0 defect that prevents wakeup on
     USB 2.0 or 1.1 connect events (Kai-Heng Feng)

   - Move power state check out of pci_msi_supported() (Bjorn Helgaas)

   - Fix incorrect MSI-X masking on resume and revert related nvme quirk
     for Kingston NVME SSD running FW E8FK11.T (Jian-Hong Pan)

   - Always return devices to D0 when thawing to fix hibernation with
     drivers like mlx4 that used legacy power management (previously we
     only did it for drivers with new power management ops) (Dexuan Cui)

   - Clear PCIe PME Status even for legacy power management (Bjorn
     Helgaas)

   - Fix PCI PM documentation errors (Bjorn Helgaas)

   - Use dev_printk() for more power management messages (Bjorn Helgaas)

   - Apply D2 delay as milliseconds, not microseconds (Bjorn Helgaas)

   - Convert xen-platform from legacy to generic power management (Bjorn
     Helgaas)

   - Removed unused .resume_early() and .suspend_late() legacy power
     management hooks (Bjorn Helgaas)

   - Rearrange power management code for clarity (Rafael J. Wysocki)

   - Decode power states more clearly ("4" or "D4" really refers to
     "D3cold") (Bjorn Helgaas)

   - Notice when reading PM Control register returns an error (~0)
     instead of interpreting it as being in D3hot (Bjorn Helgaas)

   - Add missing link delays required by the PCIe spec (Mika Westerberg)

  Virtualization:

   - Move pci_prg_resp_pasid_required() to CONFIG_PCI_PRI (Bjorn
     Helgaas)

   - Allow VFs to use PRI (the PF PRI is shared by the VFs, but the code
     previously didn't recognize that) (Kuppuswamy Sathyanarayanan)

   - Allow VFs to use PASID (the PF PASID capability is shared by the
     VFs, but the code previously didn't recognize that) (Kuppuswamy
     Sathyanarayanan)

   - Disconnect PF and VF ATS enablement, since ATS in PFs and
     associated VFs can be enabled independently (Kuppuswamy
     Sathyanarayanan)

   - Cache PRI and PASID capability offsets (Kuppuswamy Sathyanarayanan)

   - Cache the PRI PRG Response PASID Required bit (Bjorn Helgaas)

   - Consolidate ATS declarations in linux/pci-ats.h (Krzysztof
     Wilczynski)

   - Remove unused PRI and PASID stubs (Bjorn Helgaas)

   - Removed unnecessary EXPORT_SYMBOL_GPL() from ATS, PRI, and PASID
     interfaces that are only used by built-in IOMMU drivers (Bjorn
     Helgaas)

   - Hide PRI and PASID state restoration functions used only inside the
     PCI core (Bjorn Helgaas)

   - Add a DMA alias quirk for the Intel VCA NTB (Slawomir Pawlowski)

   - Serialize sysfs sriov_numvfs reads vs writes (Pierre Crégut)

   - Update Cavium ACS quirk for ThunderX2 and ThunderX3 (George
     Cherian)

   - Fix the UPDCR register address in the Intel ACS quirk (Steffen
     Liebergeld)

   - Unify ACS quirk implementations (Bjorn Helgaas)

  Amlogic Meson host bridge driver:

   - Fix meson PERST# GPIO polarity problem (Remi Pommarel)

   - Add DT bindings for Amlogic Meson G12A (Neil Armstrong)

   - Fix meson clock names to match DT bindings (Neil Armstrong)

   - Add meson support for Amlogic G12A SoC with separate shared PHY
     (Neil Armstrong)

   - Add meson extended PCIe PHY functions for Amlogic G12A USB3+PCIe
     combo PHY (Neil Armstrong)

   - Add arm64 DT for Amlogic G12A PCIe controller node (Neil Armstrong)

   - Add commented-out description of VIM3 USB3/PCIe mux in arm64 DT
     (Neil Armstrong)

  Broadcom iProc host bridge driver:

   - Invalidate iProc PAXB address mapping before programming it
     (Abhishek Shah)

   - Fix iproc-msi and mvebu __iomem annotations (Ben Dooks)

  Cadence host bridge driver:

   - Refactor Cadence PCIe host controller to use as a library for both
     host and endpoint (Tom Joseph)

  Freescale Layerscape host bridge driver:

   - Add layerscape LS1028a support (Xiaowei Bao)

  Intel VMD host bridge driver:

   - Add VMD bus 224-255 restriction decode (Jon Derrick)

   - Add VMD 8086:9A0B device ID (Jon Derrick)

   - Remove Keith from VMD maintainer list (Keith Busch)

  Marvell ARMADA 3700 / Aardvark host bridge driver:

   - Use LTSSM state to build link training flag since Aardvark doesn't
     implement the Link Training bit (Remi Pommarel)

   - Delay before training Aardvark link in case PERST# was asserted
     before the driver probe (Remi Pommarel)

   - Fix Aardvark issues with Root Control reads and writes (Remi
     Pommarel)

   - Don't rely on jiffies in Aardvark config access path since
     interrupts may be disabled (Remi Pommarel)

   - Fix Aardvark big-endian support (Grzegorz Jaszczyk)

  Marvell ARMADA 370 / XP host bridge driver:

   - Make mvebu_pci_bridge_emul_ops static (Ben Dooks)

  Microsoft Hyper-V host bridge driver:

   - Add hibernation support for Hyper-V virtual PCI devices (Dexuan
     Cui)

   - Track Hyper-V pci_protocol_version per-hbus, not globally (Dexuan
     Cui)

   - Avoid kmemleak false positive on hv hbus buffer (Dexuan Cui)

  Mobiveil host bridge driver:

   - Change mobiveil csr_read()/write() function names that conflict
     with riscv arch functions (Kefeng Wang)

  NVIDIA Tegra host bridge driver:

   - Fix Tegra CLKREQ dependency programming (Vidya Sagar)

  Renesas R-Car host bridge driver:

   - Remove unnecessary header include from rcar (Andrew Murray)

   - Tighten register index checking for rcar inbound range programming
     (Marek Vasut)

   - Fix rcar inbound range alignment calculation to improve packing of
     multiple entries (Marek Vasut)

   - Update rcar MACCTLR setting to match documentation (Yoshihiro
     Shimoda)

   - Clear bit 0 of MACCTLR before PCIETCTLR.CFINIT per manual
     (Yoshihiro Shimoda)

   - Add Marek Vasut and Yoshihiro Shimoda as R-Car maintainers (Simon
     Horman)

  Rockchip host bridge driver:

   - Make rockchip 0V9 and 1V8 power regulators non-optional (Robin
     Murphy)

  Socionext UniPhier host bridge driver:

   - Set uniphier to host (RC) mode always (Kunihiko Hayashi)

  Endpoint drivers:

   - Fix endpoint driver sign extension problem when shifting page
     number to phys_addr_t (Alan Mikhak)

  Misc:

   - Add NumaChip SPDX header (Krzysztof Wilczynski)

   - Replace EXTRA_CFLAGS with ccflags-y (Krzysztof Wilczynski)

   - Remove unused includes (Krzysztof Wilczynski)

   - Removed unused sysfs attribute groups (Ben Dooks)

   - Remove PTM and ASPM dependencies on PCIEPORTBUS (Bjorn Helgaas)

   - Add PCIe Link Control 2 register field definitions to replace magic
     numbers in AMDGPU and Radeon CIK/SI (Bjorn Helgaas)

   - Fix incorrect Link Control 2 Transmit Margin usage in AMDGPU and
     Radeon CIK/SI PCIe Gen3 link training (Bjorn Helgaas)

   - Use pcie_capability_read_word() instead of pci_read_config_word()
     in AMDGPU and Radeon CIK/SI (Frederick Lawler)

   - Remove unused pci_irq_get_node() Greg Kroah-Hartman)

   - Make asm/msi.h mandatory and simplify PCI_MSI_IRQ_DOMAIN Kconfig
     (Palmer Dabbelt, Michal Simek)

   - Read all 64 bits of Switchtec part_event_bitmap (Logan Gunthorpe)

   - Fix erroneous intel-iommu dependency on CONFIG_AMD_IOMMU (Bjorn
     Helgaas)

   - Fix bridge emulation big-endian support (Grzegorz Jaszczyk)

   - Fix dwc find_next_bit() usage (Niklas Cassel)

   - Fix pcitest.c fd leak (Hewenliang)

   - Fix typos and comments (Bjorn Helgaas)

   - Fix Kconfig whitespace errors (Krzysztof Kozlowski)"

* tag 'pci-v5.5-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (160 commits)
  PCI: Remove PCI_MSI_IRQ_DOMAIN architecture whitelist
  asm-generic: Make msi.h a mandatory include/asm header
  Revert "nvme: Add quirk for Kingston NVME SSD running FW E8FK11.T"
  PCI/MSI: Fix incorrect MSI-X masking on resume
  PCI/MSI: Move power state check out of pci_msi_supported()
  PCI/MSI: Remove unused pci_irq_get_node()
  PCI: hv: Avoid a kmemleak false positive caused by the hbus buffer
  PCI: hv: Change pci_protocol_version to per-hbus
  PCI: hv: Add hibernation support
  PCI: hv: Reorganize the code in preparation of hibernation
  MAINTAINERS: Remove Keith from VMD maintainer
  PCI/ASPM: Remove PCIEASPM_DEBUG Kconfig option and related code
  PCI/ASPM: Add sysfs attributes for controlling ASPM link states
  PCI: Fix indentation
  drm/radeon: Prefer pcie_capability_read_word()
  drm/radeon: Replace numbers with PCI_EXP_LNKCTL2 definitions
  drm/radeon: Correct Transmit Margin masks
  drm/amdgpu: Prefer pcie_capability_read_word()
  PCI: uniphier: Set mode register to host mode
  drm/amdgpu: Replace numbers with PCI_EXP_LNKCTL2 definitions
  ...
2019-12-03 13:58:22 -08:00
Sudeep Holla
54fb3fe0f2 Revert "arm64: dts: juno: add dma-ranges property"
This reverts commit 193d00a2b3.

Commit 951d48855d ("of: Make of_dma_get_range() work on bus nodes")
reworked the logic such that of_dma_get_range() works correctly
starting from a bus node containing "dma-ranges".

Since on Juno we don't have a SoC level bus node and "dma-ranges" is
present only in the root node, we get the following error:

OF: translation of DMA address(0) to CPU address failed node(/sram@2e000000)
OF: translation of DMA address(0) to CPU address failed node(/uart@7ff80000)
...
OF: translation of DMA address(0) to CPU address failed node(/mhu@2b1f0000)
OF: translation of DMA address(0) to CPU address failed node(/iommu@2b600000)
OF: translation of DMA address(0) to CPU address failed node(/iommu@2b600000)
OF: translation of DMA address(0) to CPU address failed node(/iommu@2b600000)

So let's fix it by dropping the "dma-ranges" property for now. This
should be fine since it doesn't represent any kind of device-visible
restriction; it was only there for completeness, and we've since given
in to the assumption that missing "dma-ranges" implies a 1:1 mapping
anyway.

We can add it later with a proper SoC bus node and moving all the
devices that belong there along with the "dma-ranges" if required.

Fixes: 193d00a2b3 ("arm64: dts: juno: add dma-ranges property")
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-11-28 16:40:51 +00:00
Bjorn Helgaas
30c50d3a26 Merge branch 'remotes/lorenzo/pci/meson'
- Fix meson PERST# GPIO polarity problem (Remi Pommarel)

  - Add DT bindings for Amlogic Meson G12A (Neil Armstrong)

  - Fix meson clock names to match DT bindings (Neil Armstrong)

  - Add meson support for Amlogic G12A SoC with separate shared PHY (Neil
    Armstrong)

  - Add meson extended PCIe PHY functions for Amlogic G12A USB3+PCIe combo
    PHY (Neil Armstrong)

  - Add arm64 DT for Amlogic G12A PCIe controller node (Neil Armstrong)

  - Add commented-out description of VIM3 USB3/PCIe mux in arm64 DT (Neil
    Armstrong)

* remotes/lorenzo/pci/meson:
  arm64: dts: khadas-vim3: add commented support for PCIe
  arm64: dts: meson-g12a: Add PCIe node
  phy: meson-g12a-usb3-pcie: Add support for PCIe mode
  PCI: amlogic: meson: Add support for G12A
  PCI: amlogic: Fix probed clock names
  dt-bindings: pci: amlogic, meson-pcie: Add G12A bindings
  PCI: amlogic: Fix reset assertion via gpio descriptor
2019-11-28 08:54:46 -06:00
Linus Torvalds
89d57dddd7 media updates for v5.5-rc1
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Merge tag 'media/v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media

Pull media updates from Mauro Carvalho Chehab:

 - uAPI documentation for stateless decoders

 - Added a new CEC ioctl together with its documentation

 - Improved IPU3 documentation

 - New i2c drivers: hi556 and imx290

 - Added support on Vivid driver for meta streams

 - Added de-interlace support for sunxi subdriver

 - Added a few new remote controler keymaps

 - Added H.265 support for Sunxi Cedrus driver

 - Another round of random driver cleanups, fixes and improvements

* tag 'media/v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (361 commits)
  media: Revert "media: mtk-vcodec: Remove extra area allocation in an input buffer on encoding"
  media: hantro: Set H264 FIELDPIC_FLAG_E flag correctly
  media: hantro: Remove now unused H264 pic_size
  media: hantro: Use output buffer width and height for H264 decoding
  media: hantro: Reduce H264 extra space for motion vectors
  media: hantro: Fix H264 motion vector buffer offset
  media: ti-vpe: vpe: fix compatible to match bindings
  media: dt-bindings: media: ti-vpe: Document VPE driver
  media: zr364xx: remove redundant assigmnent to idx, clean up code
  media: Documentation: media: *_DEFAULT targets for subdevs
  media: hantro: Fix s_fmt for dynamic resolution changes
  media: i2c: Use the correct style for SPDX License Identifier
  media: siano: Use the correct style for SPDX License Identifier
  media: vicodec: media_device_cleanup was called too early
  media: vim2m: media_device_cleanup was called too early
  media: cedrus: Increase maximum supported size
  media: cedrus: Fix H264 4k support
  media: cedrus: Properly signal size in mode register
  media: v4l2-ctrl: Lock main_hdl on operations of requests_queued.
  media: si470x-i2c: add missed operations in remove
  ...
2019-11-26 20:11:43 -08:00
Andre Przywara
39a1a8941b arm64: dts: juno: Fix UART frequency
Older versions of the Juno *SoC* TRM [1] recommended that the UART clock
source should be 7.2738 MHz, whereas the *system* TRM [2] stated a more
correct value of 7.3728 MHz. Somehow the wrong value managed to end up in
our DT.

Doing a prime factorisation, a modulo divide by 115200 and trying
to buy a 7.2738 MHz crystal at your favourite electronics dealer suggest
that the old value was actually a typo. The actual UART clock is driven
by a PLL, configured via a parameter in some board.txt file in the
firmware, which reads 7.37 MHz (sic!).

Fix this to correct the baud rate divisor calculation on the Juno board.

[1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0515b.b/DDI0515B_b_juno_arm_development_platform_soc_trm.pdf
[2] http://infocenter.arm.com/help/topic/com.arm.doc.100113_0000_07_en/arm_versatile_express_juno_development_platform_(v2m_juno)_technical_reference_manual_100113_0000_07_en.pdf

Fixes: 71f867ec13 ("arm64: Add Juno board device tree.")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-11-25 17:43:51 +00:00