The core resume code may have caused glitches in the GPIO when
restoring the GPIO state due to the order in which the GPIO registers
were being written.
Change the restore process take into account the state of the
GPIOs on resume and the state the system wants to restore them to.
See the code comments in the patch for more details of the process.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add the call s3c2410_gpio_getpull() to return the
current state of the pin's pull-up.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
If an DMA channel was active at suspend, then ensure that
it is correctly reconfigured when the system resumes.
Note, the previous policy was for each driver to handle their
own reconfiguration on resume. The policy has been changed to
make the individual driver's job easier.
Signed-off-by: Ben Dooks <ben-linux@flfuf.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The current S3C24XX DMA code does not allow for an peripheral
that has one channel for RX and another for TX.
This patch adds a per-cpu dma operation to select the transmit
or receive channel, and adds support to the S3C2412 for the
seperate DMA channels for TX and RX.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add s3c2412_gpio_set_sleepcfg() to allow the setting of the sleep
configuration of the GPIO blocks.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add armclk to the S3C2412 to indicate the current clock connected to
the ARM core.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add checks for clk_set_rate() and ensure that we do not allow set_rate
to be called for a clock that does not have it defined. Add default
methods for fclk, hclk, pclk and mpll.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Check if the sleep command returns due to a pending interrupt
in the standby unit. If this happens, try and ack the IRQ
before re-trying the resume.
It is currently unclear whether the resume can be backed out
of at this stage as this could cause a problem with level
based interrupts.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Ensure that if the RTC IRQ is not selected for wake in the
base configuration, then the PWRCFG has the same value set
in it.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The IIS device is being registered by the Simtec Audio
driver, and thus registering here causes an error due
to device tree naming collision.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The IIS device is being registered by the Simtec Audio
driver, and thus registering here causes an error due
to device tree naming collision.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
S3C2412_GPESLPCON does not exist in the register
mappings, so remove it.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The IIS and SDI register hw_addr definitions are
incorrect in the DMA map for the S3C2412.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The S3C2412 GPIO is similar enough to the S3C2410 that
it can use it as a base for GPIO functionality.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We have a default display set to 4, when we only have
three registered displays. Fix this argument (a seperate
patch has been generated to ensure that the LCD driver
takes notice of this bug)
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds support for Toradex' PXA27x based Colibri module.
It's kept as simple as possible to only provide basic functionality.
A default config is also included.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fix all those PXA mci_init functions which return -1 rather than
propagating the error code to the higher levels. Remove the silly
set_irq_type() calls as well - use the flags for request_irq()
instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch refactors the code in corgi_lcd.c moving it to the board
specific corgi and spitz files where appropriate instead of the
existing ifdef mess which hinders readability.
Fix spitz_get_hsync_len() to call get_hsync_invperiod so pxafb can be
compiled as a module.
The confusing variables which represent the inverse horizintal sync
period are renamed to "invperiod" consistently.
An incorrect comment in corgi_ts.c is also corrected.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds baseboard support for the phyCORE-PXA270 development
kit (aka PCM-990).
This example shows how to use some phyCORE-PXA270 CPU module features
on a baseboard in a standard manner. It could be used as a starting
point for custom baseboard development.
V2:
After comments by Eric Miao:
- IRQ chained handler fixed
- video/graphic support moved to separate patch
- ifdef/endif hell reduced ;-)
V3:
After comments by Russell King
- initialise the mmci platform data statically
V4:
After comments by Russell King
- wrong return value in pcm990_mci_init() fixed
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds a basic configration for the phyCORE-PXA270 development kit. In this case development kit means PCM-990 (main baseboard).
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds main support for the generic phyCORE-PXA270 CPU module
(aka PCM-027). Its as generic as possible to support any kind of baseboard.
Note: Neither the CPU module nor the pcm027.c implementation can work without
a baseboard support. Baseboard support can be added by the PCM-990 or any
custom variant.
V2:
After comments by Eric Miao:
- Currently unsupported devices moved into separate patch
- direct call of baseboard initialisation
V3:
After comments by Russell King
- sort include files
- setting RTC bit for power control removed
- style problems fixed (discovered by checkpatch.pl)
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
smc91x is shared between many different platforms. Each platform needs
to specify the interrupt type, and in some cases the irq type depends
on more than just the build configuration - it depends on runtime
checks.
Rather than throwing this code into the SMC_IRQ_FLAGS definition, provide
a way for these flags to be passed via the IRQ resource itself.
Note that IRQF_TRIGGER_* constants are intentionally defined to correspond
with the IORESOURCE_IRQ_* interrupt type flags, in much the same way that
the low bits of PCI iomem resources correspond with the BAR flag bits.
Also provide a way to configure smc91x to read the IRQ flags from the
resource. Once all platforms have been converted over (signified
by all definitions of SMC_IRQ_FLAGS being -1) SMC_IRQ_FLAGS should
be removed.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Nicolas Pitre <nico@cam.org>
Acked-by: Jeff Garzik <jgarzik@redhat.com>
default to
- PXA300/PXA310 support only (there isn't any littleton board with PXA320
processor for now)
- smc91x ethernet support with NFS rootfs
- LCD framebuffer support with graphics console
Signed-off-by: eric miao <eric.miao>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This includes irda, gpio keys, pxafb, backlight, ohci and flash
(read-only).
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch contains the base code to boot the Toshiba e330, e740,
e750, e400, and e800 PDAs.
Signed-off-by: Ian Molton <spyro@f2s.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This adds back the registration of HWUART clock on pxa25x
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the xtime write mode seqlock into timer_tick(), so it only
surrounds the call to do_timer().
This avoids a deadlock in update_process_times() ...
hrtimer_get_softirq_time() which tries to get a read mode seqlock
on xtime, thereby preventing booting.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The original code incorrectly returns Hz instead of KHz.
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch converts um to use blk_end_request interfaces.
Related 'uptodate' arguments are converted to 'error'.
As a result, the interface of internal function, ubd_end_request(),
is changed.
Cc: Jeff Dike <jdike@karaya.com>
Signed-off-by: Kiyoshi Ueda <k-ueda@ct.jp.nec.com>
Signed-off-by: Jun'ichi Nomura <j-nomura@ce.jp.nec.com>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
This patch converts arm's OMAP mailbox driver to use
blk_end_request interfaces.
If the original code was converted literally, blk_end_request would
be called with '-EIO' because end_that_request_last() were called
with '0' (i.e. failure).
But I think these '0's are bugs in the original code because it's
unlikely that all requests are treated as failure.
(The bugs should have no effect unless these requests have an end_io
callback.)
So I changed them to pass '0' (i.e. success) to blk_end_request.
Cc: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
Cc: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Kiyoshi Ueda <k-ueda@ct.jp.nec.com>
Signed-off-by: Jun'ichi Nomura <j-nomura@ce.jp.nec.com>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
This patch adds the header file asm/spi.h and board specific code for the
r2d board. The header file contains a structure that should be used to
point out a single spi bus. The board specific code for r2d is updated with
such a structure for the new spi_sh_sci driver. The structure contains a
chip select callback plus information about the R9701 rtc chip which is
attached to the spi bus.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch updates the board specific irq code for r7780rp. The new code is
very similar to the other highlander implementations, with the exception that
the r7780rp handles pci interrupts using IRL. To simplify the pci code and
use the same interrupt numbers as r7780mp and r7785rp we hook in to the
cpu specific pci vectors.
The pci interrupts and the push switch all work well with and without this
patch. CF and AX88796 are not ok though and the source of the problem is
unknown at this point. The AX88796 does for not detect it's proper mac
address (IPL gets it right) and the kernel hangs on CF access. As a workaround
this patch removes the CF and the AX88796 from the platform datain case of
r7780rp.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch makes the dreamcast use the recently added declared coherent
memory functions to point out the memory window suitable for dma.
Apart from cleaning up, this gives the dreamcast a proper memory allocator
for pci dma memory.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds declared coherent memory support to the sh architecture. All
functions are based on the x86 implementation. Header files are adjusted to
use the new functions instead of the former consistent_alloc() code.
This version includes the few changes what were included in the fix patch
together with modifications based on feedback from Paul.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add support for Renesas Technology Europe SDK7780 board.
Signed-off-by: Nicholas Beck <nbeck@mpc-data.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Some of Sam's new work in the kbuild queue depend on ## concatenation
within the linker script, which doesn't work when -traditional is
enabled. -traditional is a legacy remnant anyways, and we no longer
require it for anything, so kill it off completely.
Noted-by: Andreas Schwab <schwab@suse.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Remove reference to board deleted in commit 758e06ded4c48024835ef0a14627afcde2e25929
Signed-off-by: Adrian McMenamin <adrian@mcmen.demon.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch tells the sm501 mfd driver to build platform data for the
sm501 usb host driver.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch removes redundant irq handling code together with unused
consistent alloc code. R2D uart setup code is changed to use
sm501-regs.h and unused header files are removed.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds timings to drive a Sharp LQ104V1DG21 lcd panel that can
be hooked up to R2D-1 or R2D-PLUS. The sm501fb driver should leave the
pins FPEN and VBIASEN alone, and this patch instructs the driver to do
so by not setting flags flags for these pins.
This patch works best together with the patch posted to the
linux-fbdev-devel list "sm501fb: control panel pin usage with platform
data flags", but this patch can be merged independently.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch removes interrupt priority tables from the intc code.
Optimal priority assignment varies with embedded application anyway,
so keeping the interrupt priority tables together with cpu-specific
code doesn't make sense.
The function intc_set_priority() should be used instead to set the
desired interrupt priority level.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch provides a correct value for CONFIG_SH_PCLK_FREQ for the
SH7712 solution engine when used with the board's default factory
settings. This results in the board running at its maximum CPU clock
rate (200 MHz).
Signed-off-by: Andrew Murray <amurray@mpc-data.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch provides specific clock support for the SH7712.
Signed-off-by: Andrew Murray <amurray@mpc-data.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Change occurances of:
bool
default X
to:
def_bool X
Change ocurances of:
bool "Foo"
default X
to:
def_bool X
prompt "Foo"
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds in the L1I/L1D/L2 cache shape support to their respective
entries in the ELF auxvt, based on the Alpha implementation. We use
this on the userspace libc side for calculating a tightly packed
SHMLBA amongst other things.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch changes the uImage target so that it generates a wrapped
compressed vmlinux, rather than a wrapped zImage. The previous version
matched the ARM, this version matches the PPC. However I would question
how useful a self decompressing image is with a boot loader which does
decompression, so I think this is more useful. I also feel it matches
the descrition in the help text ("Compressed kernel image") better.
Signed-off-by: Thomas Betker <thomas.betker@5etech.eu>
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This saves us from having to use kmalloc() for the fixmap entries,
which is needed early for the uncached fixmap.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently most of the 29-bit physical parts do P1/P2 segmentation
with a 1:1 cached/uncached mapping, jumping between the two to
control the caching behaviour. This provides the basic infrastructure
to maintain this behaviour on 32-bit physical parts that don't map
P1/P2 at all, using a shiny new linker section and corresponding
fixmap entry.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements kernel-level atomic rollback built on top of gUSA,
as an alternative non-IRQ based atomicity method. This is generally
a faster method for platforms that are lacking the LL/SC pairs that
SH-4A and later use, and is only supportable on legacy cores.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Shoves a magic word in to the empty_zero_page section for the
bootloader to work out whether to start the kernel in 29-bit
or 32-bit mode.
[ Renesas CPUs already take care of the initial PMB mappings entirely
in hardware and decide on 29-bit/32-bit physical depending on which
pin powered up the CPU, so this is mostly for ST parts. -- PFM ].
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
mem= can't be used to grow the size of kernel memory, so provide a
warning to that effect.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds support for the SH7263 (SH-2A) CPU.
This particular CPU is a superset of SH7203, adding some additional
peripheral blocks and hooking up additional (reserved on SH7203)
vectors in the INTC block.
No visibly nasty surprises, yet..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This was using the absolute path, which was confusing the make target.
Switch it to just 'zImage', as per powerpc.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This is trivial, in that they're both effectively the same for the base
relocations anyways. SH-5 doesn't need the unaligned bits, and has a
few extra relocations, which are never hit on non-SH5 parts.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (54 commits)
MAINTIANERS: just use Mike gmail e-mail for contact and pawn the serial driver off onto Sonic
[Blackfin] arch: remove old I2C BF54x porting.
[Blackfin] arch: Add the semtimedop syscall. Upstream uClibc doesn't compile without it.
[Blackfin] arch: fix bug kernel boot message: memory information is not reasonable
[Blackfin] arch: use common flash driver to setup partitions rather than the bf5xx-flash driver
[Blackfin] arch: Fix bug - kernel build with Debug option enabled fails to boot up
[Blackfin] arch: Fix bug Only RTC interrupt can wake up deeper sleep core.
[Blackfin] arch: Add proper SW System Reset delay sequence
[Blackfin] arch: Update copyright date
[Blackfin] arch: GPIO API cleanup and anomaly update
[Blackfin] arch: Fix BUG gpio_direction_output API is not compatitable with GENERIC_GPIO API interface
[Blackfin] arch: Initial checkin of the memory protection support.
[Blackfin] arch: set_bfin_dma_config shouldnt set SYNC or RESTART by default - add argument or option
[Blackfin] arch: Add some comments - fix semicolons
[Blackfin] arch: move all code related to CPLB handling into a new subdirectory under kernel/
[Blackfin] arch: print out list of modules if kernel is crashing and tell people if the kernel is tainted
[Blackfin] arch: enable generic GPIO based I2C driver in STAMP-BF533, EZKIT-BF533 and EZKIT-BF561 boards
[Blackfin] arch: Don't oops_in_progress if single step is comming from the kernel
[Blackfin] arch: Fix BUG - kernel sometimes would stuck with KEYBOARD_GPIO on
[Blackfin] arch: update to latest anomaly sheets
...
From: Nicolas Ferre <nicolas.ferre@rfo.atmel.com>
On the at92sam9263ek board, tell the input subsystem about the buttons.
This patch is taken from Andrew Victor's at91 patchset, then updated to
match the latest kernel code and to use labels printed on the board.
Also update the at91sam9261ek buttons to cope with input changes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Convert the i2c-au1550 bus driver to platform driver, and
register a platform device for the Alchemy Db/Pb series of
boards.
Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Add polling I2C transfer implementation for PXA I2C. This is needed
for cases where I2C transactions have to occur at times interrups are
disabled.
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Move the tps65010 header file from the OMAP arch directory to the
more generic <linux/i2c/...> directory, and remove the spurious
dependency of this driver on OMAP.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Migrate all ixp4xx devices to the bitbanging I2C bus driver utilizing
the arch-neutral GPIO API (linux/i2c-gpio.h).
Tested by the nslu2-linux and openwrt projects in public firmware releases.
Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk>
Acked-by: Rod Whitby <rod@whitby.id.au>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
This patch contains the scheduled removal of legacy I2C RTC drivers with
replacement drivers.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
The kprobes code is already able to cope with reentrant probes, so its
handler must be called outside of the region protected by undef_lock.
If ever this lock is released when handlers are called then this commit
could be reverted.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
If kprobes installs a breakpoint on a "stmdb sp!, {...}" instruction,
and then single-step it by simulation from the exception context, it will
corrupt the saved regs on the stack from the previous context.
To avoid this, let's add an optional parameter to the svc_entry macro
allowing for a hole to be created on the stack before saving the
interrupted context, and use it in the undef_svc handler when kprobes
is enabled.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
This is a full implementation of Kprobes including Jprobes and
Kretprobes support.
This ARM implementation does not follow the usual kprobes double-
exception model. The traditional model is where the initial kprobes
breakpoint calls kprobe_handler(), which returns from exception to
execute the instruction in its original context, then immediately
re-enters after a second breakpoint (or single-stepping exception)
into post_kprobe_handler(), each time the probe is hit.. The ARM
implementation only executes one kprobes exception per hit, so no
post_kprobe_handler() phase. All side-effects from the kprobe'd
instruction are resolved before returning from the initial exception.
As a result, all instructions are _always_ effectively boosted
regardless of the type of instruction, and even regardless of whether
or not there is a post-handler for the probe.
Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com>
Signed-off-by: Quentin Barnes <qbarnes@gmail.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
This is the code implementing instruction single-stepping for kprobes
on ARM.
To get around the limitation of no Next-PC and no hardware single-
stepping, all kprobe'd instructions are split into three camps:
simulation, emulation, and rejected. "Simulated" instructions are
those instructions which behavior is reproduced by straight C code.
"Emulated" instructions are ones that are copied, slightly altered
and executed directly in the instruction slot to reproduce their
behavior. "Rejected" instructions are ones that could be simulated,
but work hasn't been put into simulating them. These instructions
should be very rare, if not unencountered, in the kernel. If ever
needed, code could be added to simulate them.
One might wonder why this and the ptrace singlestep facility are not
sharing some code. Both approaches are fundamentally different because
the ptrace code regains control after the stepped instruction by installing
a breakpoint after the instruction itself, and possibly at the location
where the instruction might be branching to, instead of simulating or
emulating the target instruction.
The ptrace approach isn't suitable for kprobes because the breakpoints
would have to be moved back, and the icache flushed, everytime the
probe is hit to let normal code execution resume, which would have a
significant performance impact. It is also racy on SMP since another
CPU could, with the right timing, sail through the probe point without
being caught. Because ptrace single-stepping always result in a
different process to be scheduled, the concern for performance is much
less significant.
On the other hand, the kprobes approach isn't (currently) suitable for
ptrace because it has no provision for proper user space memory
protection and translation, and even if that was implemented, the gain
wouldn't be worth the added complexity in the ptrace path compared to
the current approach.
So, until kprobes does support user space, both kprobes and ptrace are
best kept independent and separate.
Signed-off-by: Quentin Barnes <qbarnes@gmail.com>
Signed-off-by: Abhishek Sagar <sagar.abhishek@gmail.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
registers are retained during standby mode, thus it's not necessary
to save/restore and checksum
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When PXA27x wakes up, tick_resume_oneshot() tries to set a timer
interrupt to occur immediately. Since PXA27x requires at least
MIN_OSCR_DELTA, this causes us to flag an error.
tick_program_event() then increments the next event time by
min_delta_ns. However, by the time we get back to programming
the next event, the OSCR has incremented such that we fail again.
We repeatedly retry, but the OSCR is too fast for us - we never
catch up, so we never break out of the loop - resulting in us
never apparantly resuming.
Fix this by doubling min_delta_ns.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The PXA manuals indicate that when in standby or sleep modes, clocks to
peripherals are shut off by the processor itself. Eg:
PXA270 standby: "In standby mode, all clocks are disabled except those
for the power manager and the RTC."
PXA270 sleep: "In sleep mode, all clocks are disabled to the processor
and to all peripherals except the RTC."
PXA255 sleep: "In Sleep Mode, all processor and peripheral clocks are
disabled, except the RTC."
Therefore, it should be safe to leave the clock enable register alone
prior to entering low power modes for these SoCs.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Wakeup sources on PXA3 are enabled at two levels. First, the MFP
configuration has to be set to enable which edges a specific pin
will trigger a wakeup. The pin also has to be routed to a functional
unit. Lastly, the functional unit must be enabled as a wakeup source
in the appropriate AD*ER registers (AD2D0ER for standby resume.)
This doesn't fit well with the IRQ wake scheme - we currently do a
best effort conversion from IRQ numbers to functional unit wake enable
bits. For instance, there's several USB client related enable bits but
there's no corresponding IRQs to determine which you'd want. Conversely,
there's a single enable bit covering several functional units.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Hook the MFP code into the power management code so that the MFPs can
be reconfigured when suspending and resuming. However, note the FIXME
- low power mode MFP configuration may depend on the system state being
entered.
Also note that we have to clear any detected edge events prior to
entering a low power mode - otherwise we immediately wake up.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
There are two reasons for making the MFP configuration to be processor
independent, i.e. removing the relationship of configuration bits with
actual MFPR register settings:
1. power management sometimes requires the MFP to be configured
differently when in run mode or in low power mode
2. for future integration of pxa{25x,27x} GPIO configurations
The modifications include:
1. introducing of processor independent MFP configuration bits, as
defined in [include/asm-arm/arch-pxa/mfp.h]:
bit 0.. 9 - MFP Pin Number (1024 Pins Maximum)
bit 10..12 - Alternate Function Selection
bit 13..15 - Drive Strength
bit 16..18 - Low Power Mode State
bit 19..20 - Low Power Mode Edge Detection
bit 21..22 - Run Mode Pull State
and so on,
2. moving the processor dependent code from mfp.h into mfp-pxa3xx.h
3. cleaning up of the MFPR bit definitions
4. mapping of processor independent MFP configuration into processor
specific MFPR register settings is now totally encapsulated within
pxa3xx_mfp_config()
5. using of "unsigned long" instead of invented type of "mfp_cfg_t"
according to Documentation/CodingStyle Chapter 5, usage of this
in platform code will be slowly removed in later patches
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
pxa3xx_mfp_set_xxx() functions are originally provided for overwriting
MFP configurations performed by pxa3xx_mfp_config(), the usage of such
a dirtry trick is not recommended, since there is currently no user of
these functions, they are safely removed
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
PXA3 has a different memory controller from PXA2 platforms. Avoid
clashing definitions by moving the PXA2 definitions to pxa2xx-regs.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The mapping for physical address 0x48000000 is not sufficient
to allow access to the dynamic memory controller configuration
registers on PXA3. These registers need to be accessed to
reconfigure the SDRAM when waking from a low power mode.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch is to add the third mmc controller support _only_
for pxa310.
On zylonite, the third controller support one slot.
Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch is to add the second mmc controller support for pxa3xx.
It's valid for pxa3[0|1|2]0.
On zylonite, the second controller has no slot.
Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patchis to add the first mmc controller support for pxa3xx.
It's valid for pxa3[0|1|2]0.
On zylonite, the first controller supports two slots, this patch
only support the first one right now.
Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Considering that generic.c is getting more and more bloated by device
information, moving that part out side will be much cleaner.
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch is to move pxamci DMA specific code to corresponding
platform layer because using DRCMRRXMMC/DRCMRTXMMC in pxamci.c makes
the driver code dedicated to platform which is not extensible.
It is applicable to all pxa platforms.
Signed-off-by: Bridge Wu <bridge.wu@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
There have been patches hanging around for ages to add support for
cpufreq to PXA255 processors. It's about time we applied one.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Initialise the SSP driver at arch_initcall() time, so it's available
for other drivers to use it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Only register the "cpld_irq" sysclass for mainstone/lubbock if we're
running on one of those platforms.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1. make pxa2xx_spi.c use ssp_request() and ssp_free() to get the common
information of the designated SSP port.
2. remove those IRQ/memory request code, ssp_request() has done that for
the driver
3. the SPI platform device is thus made psuedo, no resource (memory/IRQ)
has to be defined, all will be retreived by ssp_request()
4. introduce ssp_get_clk_div() to handle controller difference in clock
divisor setting
5. use clk_xxx() API for clock enable/disable, and clk_get_rate() to
handle the different SSP clock frequency between different processors
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1. change SSP register definitions from absolute virtual addresses to
offsets
2. use __raw_writel()/__raw_readl() for functions of ssp_xxxx()
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1. define "struct ssp_device" for SSP information, which is requested
and released by function ssp_request()/ssp_free()
2. modify the ssp_init() and ssp_exit() to use the interface
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
OSCR is supposed to monotonically increment; however restoring it
to a time prior to OSMR0 may result in it being wound backwards.
Instead, if OSMR0 is within the minimum expiry time, wind OSMR0
forwards.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Apparantly, the generic time subsystem can accurately emulate periodic
mode via the one-shot support code, so we don't need our own periodic
emulation code anymore. Just ensure that we build support for one shot
into the generic time subsystem.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Linux has framebuffer backlight support infrastructure which should
be used to expose backlight attributes. Mainstone should use it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Only register the MMC, framebuffer, I2C and FICP devices when the
platform supplies the necessary platform data structures for the
devices.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since the PIC is attached to UART1, it doesn't need a kernel device driver
of its own; but powering off is something that the kernel should do, so
this patch forcefully configures the UART1 for 19200 baud and sends the
character that tells the PIC to cut the power.
Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Cc: Byron Bradley <byron.bbradley@gmail.com>
Acked-by: Nicolas Pitre <nico@marvell.com>
This patch adds support for the Orion/MV88F5182 based QNAP
TS-109/TS-209 NAS device. The driver for the S-35390A RTC
chip on this board has been submitted to LKML separately.
Signed-off-by: Byron Bradley <byron.bbradley@gmail.com>
Tested-by: Oyvind Repvik <repvik@kynisk.com>
Tested-by: Tim Ellis <timtimred@foonas.org>
Tested-by: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Tzachi Perelstein <tzachi@marvell.com>
The Orion I2C controller is the same one used in the Discovery
family (MV643XX). This patch include the common platform_device
stuff according to the existing i2c_mv64xxx.c conventions.
Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
I2C adapter drivers are supposed to handle retries on nack by themselves
if they do, so there's no point in setting .retries if they don't.
As this retry mechanism is going away (at least in its current form),
clean this up now so that we don't get build failures later.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Mark A. Greer <mgreer@mvista.com>
The D-Link DNS-323 uses a M41T80 RTC chip, so enable this driver in
the Orion defconfig.
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Cc: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Basic selections for Orion machines
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Nicolas Pitre <nico@cam.org>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
With this patch USB, SATA (via sata_mv), Ethernet, RTC, LEDs and NOR Flash
work.
Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
add MV88F5181 support bits required by D-link DNS-323 patch
Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Only serial, NOR, NAND, PCI and Ethernet is activated at the moment.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
serial, NOR, PCI and Ethernet is activated at the moment.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Orion Ethernet port is the same port used in the Discovery
family (MV643XX). This patch include the common platform_device
stuff according to the existing mv643xx_eth conventions.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds support for Orion edge sensitive GPIO IRQs.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
CC: Thomas Gleixner <tglx@linutronix.de>
This is a pre-requisite for implementing proper hardware accelerated
GPIO LED flashing, and since we want proper locking, it's sensible to provide
the orion specific orion_gpio_set_blink() implementation within
mach-orion/gpio.c. The functions orion_gpio_set_blink() and gpio_set_value()
implicitly turn off each others state.
Signed-off-by: Herbert Valerio Riedel <hvr@gnu.org>
Acked-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Orion has fully programable address map. There's a separate address
map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIE, USB,
Gigabit Ethernet, DMA/XOR engines, etc.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
This patch adds support for PCI and PCI-E controllers in the
Orion, Orion-NAS and Orion2.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.
This contains the basic structure and architecture register definitions.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
This enables the usage of some old Feroceon cores
for which the CPU ID is equal to the ARM926 ID.
Relevant for Feroceon-1850 and old Feroceon-2850.
Signed-off-by: Tzachi Perelstein <tzachi@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The cache replacement policy on the Feroceon core doesn't guarantee
that reading through a linear chunk of memory flushes the entire cache.
This is however what the default method for ARMv5TE cores does.
Although the Feroceon is an ARMv5TE core, it implements the same
cache handling instructions as the ARMv5TEJ cores, and must use it for
proper cache flush.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The default ARMv4 method consisting of reading through some memory
area isn't compatible with the cache replacement policy of some
ARMv5TEJ compatible cache implementations. It is also a bit wasteful
when a dedicated instruction can do the needed work optimally.
It is hard to tell if all ARMv5TEJ cores will support the used CP15
instruction, but at least all those implementations Linux currently
knows about (ARM926 and ARM1026) do support it.
Tested on an OMAP1610 H2 target.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Tested-by: George G. Davis <gdavis@mvista.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Feroceon is a family of independent ARMv5TE compliant CPU core
implementations, supporting a variable depth pipeline and out-of-order
execution. The Feroceon is configurable with VFP support, and the
later models in the series are superscalar with up to two instructions
per clock cycle.
This patch adds the initial low-level cache/TLB handling for this core.
Signed-off-by: Assaf Hoffman <hoffman@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Reviewed-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add support for the Atmel AT91CAP9A-DK Evaluation Kit board.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add support for Atmel's AT91CAP9 Customizable Microcontroller family.
<http://www.atmel.com/products/AT91CAP/Default.asp>
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Currently the udc pullup is enabled by default on boot. If the device
is connected to a host at this time, the host starts the negotiation
before the udc/gadget driver is ready to handle it.
Signed-off-by: Christian Glindkamp <christian.glindkamp@taskit.de>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add NEW_LEDs support for the following boards:
- Cogent CSB337
- Atmel AT91RM9200-DK
- Atmel AT91RM9200-EK
- Atmel AT91SAM9263-EK
Mostly based on patch from David Brownell.
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Due to errata regarding the handling of SPI CS0 on the AT91RM9200, the
atmel_spi driver drives CS0 from the SPI controller and not as a GPIO
pin.
We therefore need to configure CS0 for use by the controller
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Support for the 3 GPIO-connected buttons on the CSB300 board.
Based on wakeup testing code from David Brownell.
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the LED initialization code out of the various *_devices.c files,
and into leds.c.
Also add support for NEW_LEDs.
Patch from David Brownell.
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Modify the UART initialization to allow the board-initialization code
to specify which pins are connected, and which pins should therefore
be initialized.
The current at91_init_serial() will continue to work as-is, but is
marked as "deprecated" and will be removed once the board-specific
files has been updated to use the new interface.
As in the AVR32 code, we assume that the TX and RX pins will always be
initialized.
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
