updates for 5.20, please pull the following:
- William adds the ARCH_BCMBCA Kconfig entry to follow the ARM 32-bit
counter part and adds basic support for these DSL/PON SoCs: 63158,
4912, 63146, 6856, 6813
- Anand adds basic support for the 6858 SoC
- Krzysztof fixes a missing space between a property name and its value
in a number of DTS files
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmLMT6AACgkQh9CWnEQH
BwSmXhAAstUebP+FxQFCnCmrcpBktlXcPpAMDmTxgwKGQrHmITdAhvfK+eHpWsPo
9uBs1BdlHjyN/gC2p/o7S01WjI7j/Qodw106vgfhzIYuPbJUl/LVzYcubn1nhJvS
fUvEh57Dw1jrqECy0nhUFltNf+C2Tw2R1Ug1BR2+K4ekLwU7Lmy6/4ugxbS1jSIH
pWTqXNyTwzboYM4js5gPhPKTIrQHgYUd1YxFeExlG3LiLTI3WdnFwvsnHqFbmdHV
85UDR9Jic/tmWS7Egs7fqcxkHadWqSrgOE/79WKiWs/e+V8IxB4JfanEa6ltnZ6a
JXiKPNryeZuhW0+LtqBgzU5I7DczH9zHVuBjaLvaLSGENf/bz9dhks9A1gQF/nkB
ZgbtrMJJVHRXyGFovX7cjqtvVKSX4WUa/In2OKw8RJ51NKo5IWVnbn+R/4hA/6Tg
kAYMeGLKggqeI4i77H6CXwgJTBJkidSEzw6zKJqALEPHT3nI+AqWUGN0DlFbQkko
yd8Wte0cFXZ6/U3as7Ie159SoHj1k9R9XORhIOUKmoN11M7n+072h2VOQNsbVeni
KiT7CVqy2FVL8HeCnAkJVNRbl+pBowtksJAUMl0zIzYpN9eGIelQJDIUXQxfXl29
Fvua4XALaIiNDWa9C+mX3DzB/UFGpYiQIutv2xVuHUH/VX8fshc=
=WeA3
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLQOQMACgkQmmx57+YA
GNmi0w/+N7ZE7JF2Qmlf9EDmy/rq4vfZz7ZJ4pCT30pUtC16GGbbynsKWnYB7bb0
jeXxrytfr+yFZY7P8R83GkIpkBBpbhUlSWCi5W1VTQVaZLC5KZWZtPZymt4YD8KV
zrIBVBX1ZxFNCOSMh5rP6ByrbJiuiQQ2DQiPgHDZMxFH8xUPKDvAOVR8JPhtlo6Q
YtQgKA4zHXDkPQied4Je/NYfrh9xyLuskDmlBZ0OYvqp3XLLCBAlNKghH0bHSvt/
KW1AvQtacfI2STD2gGWlGktUJr9ff0Qhxe2DsDauhANShNSVGlFrtqJXxFDf79ly
amlqhXtZI2I2osyukm4PK3Ys1smDnBmNY7nbctCAXUTtcsKI/VUqAud79++U5xcD
+BrGrZ58KcLLJTcktxszdHvvP7P92B02jhPx2Oeqe0I59hbeXO1ozglBWw0VjJj1
Iar5p+SDo6k6F7t2pjLWg4hjtljIYn8RX6yKX6xisNBKioxAxv5HAYjN0IrENCrY
ZXnOMpnDhnnomY4WsEEw9KOutZ1aXDphCfJs22wPyhH0cpsM4dtD+BnR2NmWnko8
h20M3b0xQui9P1N7iDNheAjuXJbOapu/D7R80NhCo9fWKILFaRI/YBkNSkc2juUT
e5fMRqLpSzoRswa12PBnbZgZcPQop7DKq3rv8cGL9jR0OTqL2nU=
=9IyI
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.20/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM64-based SocS Device Tree
updates for 5.20, please pull the following:
- William adds the ARCH_BCMBCA Kconfig entry to follow the ARM 32-bit
counter part and adds basic support for these DSL/PON SoCs: 63158,
4912, 63146, 6856, 6813
- Anand adds basic support for the 6858 SoC
- Krzysztof fixes a missing space between a property name and its value
in a number of DTS files
* tag 'arm-soc/for-5.20/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: Add DTS files for bcmbca SoC BCM6813
arm64: dts: Add DTS files for bcmbca SoC BCM6856
arm64: dts: Add DTS files for bcmbca SoC BCM63146
arm64: dts: broadcom: adjust whitespace around '='
ARM64: dts: Add DTS files for bcmbca SoC BCM6858
arm64: dts: Add DTS files for bcmbca SoC BCM4912
arm64: dts: Add DTS files for bcmbca SoC BCM63158
arm64: bcmbca: add arch bcmbca machine entry
Link: https://lore.kernel.org/r/20220711164451.3542127-5-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for 5.20, please pull the following:
- Stefan drops the unnecessary "#address-cells" and "#size-cells"
properties from the DPI node of BCM283x
- Anand documents and adds support for the 63178 and 6858 SoCs
- William migrates the 63138 platform over to ARCH_BCMBCA and ensures
that it is documented within the BCMBCA Device Tree binding documents.
He updates the 47622 DTS to remove unnecessary PSCI properties, fix
the GIC nodes and some minor cosmetic changes. He finally adds support
for the 63158, 4912, 6846, 6855, 6756, 63146, 6856, 63148, 6813, 6318
SoCs.
- Peter, Nicolas and Stefan adds the necessary Device Tree nodes to the
BCM2711 (Raspberry Pi 4) DTS to enable the use of the V3D GPU on these
platforms.
- Christian adds support for the BCM53015 based Cisco Meraki MR26
Wi-Fi access point.
- Krzysztof updates the Broadcom platforms DTS to add a missing
whitespace between the property name and its value.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmLMUVcACgkQh9CWnEQH
BwT5ChAAxXxWgFr3dWrsmTqfgSrnVSQlDGbYqDEwsFPIx4s3yHURdxSrAHsPTowS
wDCQlKxstrkwhawXAVluCUEg8K3Juf4r+Qbb7EhoOU/eNu7TUcrVzQn0zok9jMe8
p1GBJ/uvX/Dm7Qlbfyv7Luw+VA7yNEqDfyyrK4fCVnsKhmFPJa5ZyHCspMlW1HNJ
q53TrSu3FjzUmCPWX8lk6JFwRCcTXTKlz/xJ9QqL4238aTPihdFTcgwVA3OiKYVA
L6ZPJik1AsyoV/Hfuci5FoYhPy5rvlDoI72OM4DRtTGl/gtbpeB1LnT7nv/O5/TS
+KRSJpaYadMtn4z0praVZiad0aM2jBVjZQGlpvB6BgjYqnwTWGTHA26Lk0r40lmJ
yzuhYXavB2R6CuNE4Z9RSeOzQrjWqdj0J4H2Xz1e9IvHLHUJ42uPfvafiMV0LAI3
EYPw7iuKmV0yKintlgYT4yivNx4+UrIWSHMev01D16Ldyxy0Gy6lOStBVpyaHMOb
AKlER0uzBlEU1h44ztEuUhnx4ZecB1zEVEB+IsEw9j/kgZxfWHHrbGE+1sTzKa6w
Fg76gx2KRkW1wzOUSizwjrCYrazBfvnN4GuGXLFx5hZbTQkmUODLbXaFmxnJty7s
3PaJQIck6NEGHKM7LfV47dvb3lLPts1fyOmn4Vv/P3vTN6MY9e4=
=h0fy
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLQON4ACgkQmmx57+YA
GNntKhAAgkOKeiUP5/8Fu7i9I5/T/Lue1UTU4yO7X5HSEaH6sVT35RC1V8zQexb3
/k9vQbTM9XAyVslgq2XMJc46rON46E6eqxAZdUtobVju+QjAX5rT5vZElf4QEz4X
S1JwowvXOr3G2vYMwK+rFgKUSCK0buVqhDKqMmu89GueJWNJkKZJcNiLKUQdjKuK
jbAiVU0X3WXmgx2cCKHK09yvHLERuUfjZN0yD9fq5ZoRcWmHSPAXLBQLOLsK7nKN
QQ0Wf4y86eo62CZN29EpTb1+v5k5TeNX2s1OD4RhWvjTFyKVMisjXPljKHYh+gwM
An41lONkp0HjbboFCxRQmXnEnxwWS0xdezZxLJUvCrhVtQ0b888Zh28yd8P2TWdq
h4AgqQKEpnwjPx54JjuQR4CdMAutGOYrYEWP4jo4BIfqnmoyIa/juOBT7HQaJshy
tgK5zLHKiSbUX1Dh6dZBhBnSf9Z4iwiRarGJ/KqOd+i3kOIbIXIFULDYjQkBmTBf
kp/czrqbxi+tiTbTetkE4Q2yJfd2EemnAFW61UpnhcRZZ85JZ+nJy47aBxxD0LWU
Ztu82+h4LOCSOBXXoGx1EPSKHvNArCHbOmmSMFbpj1sTdbR/w0x+Ip+d9tJFJ8bw
Uo6Ni3oBceR+B4i81l4O4eiABqknbYrSMD2ke6bVnGF48dvHdis=
=GDxE
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.20/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree updates
for 5.20, please pull the following:
- Stefan drops the unnecessary "#address-cells" and "#size-cells"
properties from the DPI node of BCM283x
- Anand documents and adds support for the 63178 and 6858 SoCs
- William migrates the 63138 platform over to ARCH_BCMBCA and ensures
that it is documented within the BCMBCA Device Tree binding documents.
He updates the 47622 DTS to remove unnecessary PSCI properties, fix
the GIC nodes and some minor cosmetic changes. He finally adds support
for the 63158, 4912, 6846, 6855, 6756, 63146, 6856, 63148, 6813, 6318
SoCs.
- Peter, Nicolas and Stefan adds the necessary Device Tree nodes to the
BCM2711 (Raspberry Pi 4) DTS to enable the use of the V3D GPU on these
platforms.
- Christian adds support for the BCM53015 based Cisco Meraki MR26
Wi-Fi access point.
- Krzysztof updates the Broadcom platforms DTS to add a missing
whitespace between the property name and its value.
* tag 'arm-soc/for-5.20/devicetree' of https://github.com/Broadcom/stblinux: (35 commits)
ARM: dts: Add BCM63138 generic board dts
ARM: dts: update dts files for bcmbca SoC BCM63138
ARM: dts: Move BCM963138DVT board dts to ARCH_BCMBCA
dt-bindings: arm: add BCM63138 SoC
ARM: dts: bcm2711: Use proper compatible in PM/Watchdog node
ARM: dts: bcm2835/bcm2711: Introduce reg-names in watchdog node
dt-bindings: soc: bcm: bcm2835-pm: Add support for bcm2711
dt-bindings: soc: bcm: bcm2835-pm: Introduce reg-names
dt-bindings: soc: bcm: bcm2835-pm: Convert bindings to DT schema
ARM: dts: BCM5301X: Add DT for Meraki MR26
dt-bindings: ARM: add bindings for the Meraki MR26
dt-bindings: arm64: Add BCM6813 SoC
ARM: dts: Add DTS files for bcmbca SoC BCM63148
dt-bindings: arm: Add BCM63148 SoC
dt-bindings: arm64: Add BCM6856 SoC
dt-bindings: arm64: Add BCM63146 SoC
ARM: dts: broadcom: correct gpio-keys properties
ARM: dts: broadcom: align gpio-key node names with dtschema
ARM: dts: Add DTS files for bcmbca SoC BCM6756
dt-bindings: arm: Add BCM6756 SoC
...
Link: https://lore.kernel.org/r/20220711164451.3542127-4-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces initial support for Lenovo ThinkPad X13s, Qualcomm 8cx
Gen 3 Compute Reference Device, SA8295P Automotive Development Platform,
Xiaomi Mi 5s Plus, five new SC7180 Chrome OS boards, Inforce IFC6560, LG
G7 ThinQ and LG V35 ThinQ.
With IPQ8074 gaining GDSC support, this was expressed in the gcc node
and defined for the USB nodes. The SDHCI reset line was defined to get
the storage devices into a known state.
For MSM8996 interconnect providers, the second DSI interface, resets for
SDHCI are introduced. Support for the Xiaomi Mi 5s Plus is introduced
and the Dragonboard 820c gains definitions for its LEDs.
The MSM8998 platform changes consists of a various cleanup patches, the
FxTec Pro1 is split out from using the MTP dts and Sony Xperia devices
on the "Yoshino" platform gains ToF sensor.
On SC7180 five new Trogdor based boards are added and the description of
keyboard and detachables is improved.
On the SC7280-based Herobrine board DisplayPort is enabled, SPI flash
clock rate is changed, WiFi is enabled and the modem firmware path is
updated. The Villager boards gains touchscreen, and keyboard backlight.
This introduces initial support for the SC8280XP (aka 8cx Gen 3) and
related automotive platforms are introduced, with support for the
Qualcomm reference board, the Lenovo Thinkpad X13s and the SA8295P
Automotive Development Platform.
In addition to a wide range of smaller fixes on the SDM630 and SDM660
platforms, support for the secondary high speed USB controller is
introduced and the Sony Xperia "Nile" platform gains support for the RGB
status LED. Support for the Inforce IFC6560 board is introduced.
On SDM845 the bandwidth monitor for the CPU subsystem is introduced, to
scale LLCC clock rate based on profiling. CPU and cluster idle states
are switched to OSI hierarchical states. DB845c and SHIFT 6mq gains LED
support and new support for the LG G7 ThinQ and LG V35 ThinQ boards are
added.
DLL/DDR configuration for SDHCI nodes are defined for SM6125.
On SM8250 the GPU per-process page tables is enabled and for RB5 the
Light Pulse Generator-based LEDs are added.
The display clock controller is introduced for SM8350.
On SM8450 this introduces the camera clock controller and the UART
typically used for Bluetooth. The interconnect path for the crypto
engine is added to the SCM node, to ensure this is adequately clocked.
The assigned-clock-rate for the display processor is dropped from
several platforms, now that the driver derrives the min and max from the
clock.
In addition to this a wide range of fixes for stylistic issues and
issues discovered through Devicetree binding validation across many
platforms and boards are introduced.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLPLQkbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3Fe7gQAKK2W3OKC5uKllNc7ICE
rTeQeVNoZPxtqgvTcpAViarDCZin1jo21vDusK3q1iLICSN3XPvfvEYnYIRit/AU
lRK0O/OBfVzzf+6qsTZqAUybLF2heYA6woESbcIoZMcmZYPwNTmVQvMuPnd0uBro
yasN7Nm/wcWBlbnyWWAwnU8sYlBx0OfiXq/3z60adDJFJr5DoEFeapkrV/wr9dpx
YR6kLRM7h9zzqctjOmqM/ZPxI8z3dS83eMS/4k1CkeuTKxQ+pIaBDm5WqhoWuuHH
CY5Ebc7PzsbEWsx9Qt+bxur5lbeT5brAlGFLNtpn55hz9JQyCrUTIRgPJI21vT7O
swlGFfW3IYsp8sU3cV7cQ8W7TGrv/1syUbEA+vCEudd00+TEUM+QJmI7bzZVHPUx
Ari4poAb0D8w2517dTHEiBVQ7a7eRGbMqvJEraWNtklcbNAocV53U6Sz7XAr4Bjm
0FFbCc18C+DuvMd12B8Vp92Vy8Q62M0fcnaMiL5+QVzGx1fj1bq1aL7kUuUhgsP/
3esJUw4dNVK3d4b2uy3DR3trobr8jjirMuXKa5V8WUvr3vP9z4hRLTM9l6fecGRW
0qrzf5iehwJ8itiUYtm/AyGYq1TjkJYxbhtQW8oRiQAJBIyRPjtPITq54l0yLz7/
w1faJprsybDMh+ESmaHYPbZK
=89g4
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLQL/QACgkQmmx57+YA
GNmMUxAAu7iL+YiuKDOxO9vD3INq5XukdZvbCOaiyWkwafsyf0YqhlIXUV0LD/q3
dpDm2/od9KQGvMG9WE34Fdq2e9nj35NiRHkKM5wLVTuypgh62VmP1PH8q0z+L+hr
A9IdxwzgXd+ZoDMSkPVHjZauBrALeqxuQshoEvBE11EncCIeQrsxHDIzGjIBlohc
yZ5EGAYBRDt7dmRv2M3Vpk68gJc5F264zc/mljbrnf1iW/C1b3z6PXtRZXt6p+iq
Dzfbh+LeWIo2ddrkXhcU3ZFiafMZ5zTLZWWtKystqU9lk3fVvvp1ZcoeEgg9j5tQ
2TgddYBJTOHm9vlJIYD6zo/AL6adixYOPZOnSzWY17zC8Yq7e5lbc/A4NkoL3lUZ
oTbEtjmR55hJG2C6JNLsCDuI2eo5zJ9KZB8rE9CBp+kWh2UExjKVbk1LDjUQcLQl
0cYDbIDeLJFSwSMQ18GeoLbsp3rSlPUOMuoUCdKCsCp9xLzWIxBR7LbthO/R3OOE
mXsxGQTwn2PbEZEqFddW3vvcBF+FL1IQ/YgC6F/1MKbvU60KjdWNYqeXSz9PZ/AR
6HyszhnGyGUU0xCWx93XHgfSCKTr8zkjD1zloWy5ibX4rUUg+iC2TnQ3n7srQNCj
S8bpFED4JXfFj+LfgR9vZr5sUM+C1oYiIVXccZ9QLwiNWLfAfFQ=
=XnF9
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DTS updates for v5.20
This introduces initial support for Lenovo ThinkPad X13s, Qualcomm 8cx
Gen 3 Compute Reference Device, SA8295P Automotive Development Platform,
Xiaomi Mi 5s Plus, five new SC7180 Chrome OS boards, Inforce IFC6560, LG
G7 ThinQ and LG V35 ThinQ.
With IPQ8074 gaining GDSC support, this was expressed in the gcc node
and defined for the USB nodes. The SDHCI reset line was defined to get
the storage devices into a known state.
For MSM8996 interconnect providers, the second DSI interface, resets for
SDHCI are introduced. Support for the Xiaomi Mi 5s Plus is introduced
and the Dragonboard 820c gains definitions for its LEDs.
The MSM8998 platform changes consists of a various cleanup patches, the
FxTec Pro1 is split out from using the MTP dts and Sony Xperia devices
on the "Yoshino" platform gains ToF sensor.
On SC7180 five new Trogdor based boards are added and the description of
keyboard and detachables is improved.
On the SC7280-based Herobrine board DisplayPort is enabled, SPI flash
clock rate is changed, WiFi is enabled and the modem firmware path is
updated. The Villager boards gains touchscreen, and keyboard backlight.
This introduces initial support for the SC8280XP (aka 8cx Gen 3) and
related automotive platforms are introduced, with support for the
Qualcomm reference board, the Lenovo Thinkpad X13s and the SA8295P
Automotive Development Platform.
In addition to a wide range of smaller fixes on the SDM630 and SDM660
platforms, support for the secondary high speed USB controller is
introduced and the Sony Xperia "Nile" platform gains support for the RGB
status LED. Support for the Inforce IFC6560 board is introduced.
On SDM845 the bandwidth monitor for the CPU subsystem is introduced, to
scale LLCC clock rate based on profiling. CPU and cluster idle states
are switched to OSI hierarchical states. DB845c and SHIFT 6mq gains LED
support and new support for the LG G7 ThinQ and LG V35 ThinQ boards are
added.
DLL/DDR configuration for SDHCI nodes are defined for SM6125.
On SM8250 the GPU per-process page tables is enabled and for RB5 the
Light Pulse Generator-based LEDs are added.
The display clock controller is introduced for SM8350.
On SM8450 this introduces the camera clock controller and the UART
typically used for Bluetooth. The interconnect path for the crypto
engine is added to the SCM node, to ensure this is adequately clocked.
The assigned-clock-rate for the display processor is dropped from
several platforms, now that the driver derrives the min and max from the
clock.
In addition to this a wide range of fixes for stylistic issues and
issues discovered through Devicetree binding validation across many
platforms and boards are introduced.
* tag 'qcom-arm64-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (193 commits)
arm64: dts: qcom: sc8280xp: fix DP PHY node unit addresses
arm64: dts: qcom: sc8280xp: fix usb_0 HS PHY ref clock
arm64: dts: qcom: sc7280: fix PCIe clock reference
docs: arm: index.rst: add google/chromebook-boot-flow
arm64: dts: qcom: msm8996: clean up PCIe PHY node
arm64: dts: qcom: msm8996: use non-empty ranges for PCIe PHYs
arm64: dts: qcom: sm8450: drop UFS PHY clock-cells
arm64: dts: qcom: sm8250: drop UFS PHY clock-cells
arm64: dts: qcom: sc8280xp: drop UFS PHY clock-cells
arm64: dts: qcom: sm8450: drop USB PHY clock index
arm64: dts: qcom: sm8350: drop USB PHY clock index
arm64: dts: qcom: msm8998: drop USB PHY clock index
arm64: dts: qcom: ipq8074: drop USB PHY clock index
arm64: dts: qcom: ipq6018: drop USB PHY clock index
arm64: dts: qcom: sm8250: add missing PCIe PHY clock-cells
arm64: dts: qcom: sc7280: drop PCIe PHY clock index
Revert "arm64: dts: qcom: Fix 'reg-names' for sdhci nodes"
arm64: dts: qcom: sc7180-idp: add vdds supply to the DSI PHY
arm64: dts: qcom: sc7280: use constants for gpucc clocks and power-domains
arm64: dts: qcom: msm8996: add missing DSI clock assignments
...
Link: https://lore.kernel.org/r/20220713203939.1431054-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds USB, NAND, QPIC BAM, CPUfreq, remoteprocs, SMEM, SCM,
watchdog, interconnect providers to the SDX65 5G modem platform and
enables relevant devices for the MTP.
The BAM DMUX interface used to exchange Ethernet/IP data with the modem
is described on the MSM8974 platform.
It fixes up the PXO supply clock to L2CC on IPQ6084, as the platform is
transitioned away from global clock lookup.
SDX55 has it's debug UART interrupt level corrected.
Lastly it contains a wide variety of fixes for DeviceTree validation
issues across most of the platforms.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLOOckbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FOqgP/RVm+S3ivwLGm4XeQekp
Ur00x2qzJUpORdE5n+rN77zwOcXYu8z2J6HaeyMDk+yR5CdUM6MRLVkrkcxWJuE3
OHuDOcBve0vVy66E0GN6ODNf3tzCD8OoLkk9ZDpTuPRVFQAh1w/XkycBDzH43MRR
tg/Abs9Jbn+gInQXBVeWqCWqTRV8o9iZnDrWX5usuIwllMZuA+UErOsYwFt4UaVt
z2zybKF1FeXy5qSEvV1ztxVV2prbQDo/3TTdF1zlNCpWQUkuF/2qSq593YK8HP6i
SW7DMM70PDd7HM2+lo7PLfwZFH5i03uvuN4zf7bopidFl1Si8zQdkesELjVgIQJW
jHF8cHnVGR+yFtMIJdkX3VGMPYjTkcWWnQZko57QMHgSAbcFTnHHEiEl43F1HteR
pONnUFBfxdFPZcOZwCVOlu82KTaxbHhg10mztxY4M62+lx7TeZQs2Nb97SjfkeB+
CHBgNx3cgGq0EISVN4eq6Ensm5OfVwYlbuKSKENbfUTArVH5OuTSRnCvP8H/Q4xF
GW1jVvj0Z0RwrgYwdzp4+urWo6I/nQOy6xyn1ADiZLcNMl93puMOxiptqSAvF2+q
AdMEOPqW75huhKn0QUhQ/LpgyErpJQSa4evY39XSq+/ooXyEeZQqAPd9rpkGwkUx
/9ebhOjKaAC5nacz1gQ6Iewc
=nI02
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLPKQ0ACgkQmmx57+YA
GNnpzhAAwVu/z/Vk1IHvi0xQ7casMKawTQfALkZIvtbvPkO/hfjwznjuu9hhVnih
NF2EJ/VdGPXmstv9hlgeLmf8oKHVTf49bWup3/Dx7HrohTpJLBP+yIDSpJHnWF4z
ggfQYQ+rsgYpyIV6euiIptz4fPBviyI2FAsDut58IqYQjMNw1GY8V1ghXtuE6Sys
dS1V37JGOYLWexFUMMgsHnYGN6v4xgDby0HzE6UXN0QlBdqt6b1HZdgoxmLiP15Q
0lzbPTIngQhO4UnO1Ijv/mIawSpLmW29EGcRp5VVmYeHhCNE1/nLWmwJ6V9IaRWL
iVWsvzVqUCDBmSIlOEb8dWEbjO/3Yilsn1bUmmjFPQodz3WnSF1afrPin2Qjx8I5
tJYANKfQcrcgpDKcqIeHswQoaSw3IGfxrl+/hyshO/jLl9gQN8PXfgwWcNcanX18
60UMzVK66L48wE+5BmtohXl+47jLl6/4WJ/bkBEU2AA+aovJItuSqZbNqkNOJhp1
mgORzfZ3yol9rIJhUIIn8JNcz5exQNGgVCLL/3F03Q/9MpXirqmJFg0pmRVWmgNk
E2HitHbiHoxlygolCX1T/cM1aDi2DstdAzTBGlPBbT2UFSISfpK/uK6iRqx9QrKi
npCWiBzKg231yDTEwNn1j/SrCuph/+PeRUE+K0MK7npc8Lmj7W8=
=gckS
-----END PGP SIGNATURE-----
Merge tag 'qcom-dts-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm DTS updates for v5.20
This adds USB, NAND, QPIC BAM, CPUfreq, remoteprocs, SMEM, SCM,
watchdog, interconnect providers to the SDX65 5G modem platform and
enables relevant devices for the MTP.
The BAM DMUX interface used to exchange Ethernet/IP data with the modem
is described on the MSM8974 platform.
It fixes up the PXO supply clock to L2CC on IPQ6084, as the platform is
transitioned away from global clock lookup.
SDX55 has it's debug UART interrupt level corrected.
Lastly it contains a wide variety of fixes for DeviceTree validation
issues across most of the platforms.
* tag 'qcom-dts-for-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (48 commits)
ARM: dts: qcom: msm8974: rename GPU's OPP table node
ARM: dts: qcom: apq8064: disable DSI and DSI PHY by default
ARM: dts: qcom: apq8064: rename DSI PHY iface clock
ARM: dts: qcom: extend scm compatible to match dt-schema
ARM: dts: qcom: Fix sdhci node names - use 'mmc@'
ARM: dts: qcom: apq8064: drop phy-names from HDMI device node
ARM: dts: qcom: apq8064-ifc6410: drop hdmi-mux-supply
ARM: dts: qcom: pm8841: add required thermal-sensor-cells
ARM: dts: qcom: msm8974: add required ranges to OCMEM
ARM: dts: qcom: sdx55: add dedicated IMEM and syscon compatibles
ARM: dts: qcom: msm8974: add dedicated IMEM compatible
ARM: dts: qcom: apq8064-asus-nexus7: add dedicated IMEM compatible
ARM: dts: qcom: use generic sram as name for imem and ocmem nodes
ARM: dts: qcom: ipq8064: add function to LED nodes
ARM: dts: qcom: ipq8064-rb3011: add color to LED node
ARM: dts: qcom: ipq4018-ap120c-ac: add function and color to LED nodes
ARM: dts: qcom: apq8060-ifc6410: add color to LED node
ARM: dts: qcom: apq8060-dragonboard: add function and color to LED nodes
ARM: dts: qcom: sdx55: Fix the IRQ trigger type for UART
ARM: dts: qcom-msm8974: fix irq type on blsp2_uart1
...
Link: https://lore.kernel.org/r/20220713032024.1372427-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
It contains only the enablement of USB device port.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCYs5sTwAKCRCejrg/N2X7
/dysAQCzEUcQ8LLXrWUEmezC6iaLIVRR/nxZFgjUFtlSXHdRTQEA6o8S5OrWApz3
zAUDnz0KYphbY0+XPyMONh63qX5H7Qo=
=2l52
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLPKKQACgkQmmx57+YA
GNnWiA/8CEq7gqQHWCblEn2NFz8iDnEvXAXsE8k/lprIknDDy8y3EDj3AIFAJLtC
OwsfXQK2oUwArZh6oa/yZDA+IR0pYzTVasK4vceXsY+aSbhfFkPntphn6+hVO7At
lp15jTdsaHQSvzqW17aPSquHYuiVvweSJVY3RFLnHj7yc/kpnbjvdk7B0syhdtQV
w2y30acW5FWMNL54eAcTwJwAsGpve6VypxS0mUEN+UQDTkQ7FZmGZwZ6XvbBvr0C
P/DJHIQy89LVQSeLM8fb1doSh3tlUvXDYSn3pkkMZwcB+Ghws+O0fs9bdv+XcLdW
vZ5e5e0ZBssn8qQubcDsEEjX6sJwhOIO+f0ZnZAoGmQ6YJiFUJixP7cfQoQaR3LF
LmNm04QJJf20Uap4jErzCcPD6fSSAsg8JDHBk8764AC+TCoiaJjb2fSj2qkFjODa
Jw2UTShdSjshi9u8AkQra/Xt3KFh85M1QSCkRRktxF9IHnMw1on1HNnKtCshcpoW
C6VzO3NRn6GamRRnV38ffIPL4sp8u+PIJ9pjKvIqy52h3qtZ/MrH5U/no1QN4tXX
92UXrq/eVakxjTqfOEnHcbA9xD5SnOZimhic8+tBIa/VbsFKrBedI02jgo+wl4z5
7wQqSvoAaHrddpnxJb0qwcyM7jgZWpr1m2yMjHWHYq/zteyx6bA=
=Z8D1
-----END PGP SIGNATURE-----
Merge tag 'at91-dt-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT for v5.20 #2
It contains only the enablement of USB device port.
* tag 'at91-dt-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: kswitch-d10: enable the USB device port
Link: https://lore.kernel.org/r/20220713070602.1652118-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add device tree support for i.MX93 SoC.
- New board device tree: TQMa8MPQL, DH electronics i.MX8M Plus DHCOM and
PDK2, i.MX93 11x11 EVK, phyBOARD-Polis-i.MX8MM.
- A series from Abel Vesa and Viorel Suman to fix i.MX8QXP device tree
to comply with DT schema.
- Disable job ring 0 device for i.MX8MM to avoid caam_jr probe error, due
to that JR0 reservation is done in both upstream (v2.7) and downstream
(NXP lf_v2.4) TF-A.
- A series from Krzysztof Kozlowski to align gpio-key and LED node names
with dtschema.
- Add SNVS LPGPR device for i.MX8MM so that some preserving registers
becomes available as NVMEM.
- Add NoC device support for i.MX8MP SoC.
- A couple of changes from Sean Anderson to add SFP node for TA devices
for LayerScape SoCs.
- A series from Shengjiu Wang to enable bt-sco sound card support for
NXP i.MX8M EVK boards.
- Other small and random board updates.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmLJNxkUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM46nggApNdspVDWzrLlF8BuC5SGf5cShrM/
AByP9wkmBBXrCFP74dVaq2o5WwyLAqNzlvrey/vT+yb4jMzFHqCJjWcTJKL8WZYG
ecsFOYJVbNd6CB2J2G5yYZxKIXFNtSblUJV1qd4+8GzHcu9Y+xjNojvF4ure+G80
8bqhZQo9VNxdCyII6BcOpZlXmjbFgC47PIrSqX+gx2WbRdLcqj4tbxo/qA5OWVl9
paBn8098EOGA13i63xZM8yFBT5W5b5zS69ZwrVapqP2AOU8pEORrQ6ZpPJghUm/w
aDoWdJWE1VS08ON2tv3GFEpYHRGXWTOpHxT4FJGjyPUm+t4KGyW6m/GjWA==
=LAwE
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLMRgEACgkQmmx57+YA
GNkYaA//fT41JinJqbwZkIFZNSY1kQsbWVrZqaCGAgZUsyw2MWbjBWeaHiUuiadk
tHpjxfp2IL7+UcestBXFYDiOlsMb84a9fSEF9Rl6v7PkVTHR2KNEAetSJJk7Z15d
gflC7RoUbFGoXuXfS3hqDr2cC17IsjiGB7qBXwhYcXoZzAWGN1s0tiNc/tF/x339
odnJK4ZuAuxNwNuFTn51pcmQLdIaUNfWCTfwd28pQKa8RaK1ytiupWkapRbOqrO2
+S8xwNqqyUWUe9UPBxEzp85qqZzVDzZFUEeH6xMAD1eusIK+XVM0uMtIbrwx8aN1
n05vk28qOVsF3aZBY1v/eetlhlC8irwX4KUc3w/IcPrxlpuZGOwAUHZ6ygW8dWF6
1UqUwnK5CRO2EnxQL3fecZcHW39QgwICMAwi44N71VgxW0rjnd7sFe2xCGlS70Zv
hpgXTwrVAMs4lIhjtSmoPgFW1khz0mBRAR8CtbX+KT3YWTMDSBneEaM+KI3wLqxh
D8PiazCge41sO7/M+zAC28hDTpZ4l09QjwG6ANb9KiHDUWUa1nkgdK2HTj+xfc9F
YJmaGwVW2jaYCBjr0hSEiK4jFwpwVRD8XZP2LKF57kxWvBhRhXJkHAWpp6VAIyON
eQM2bGzKyerh27TIqDT5JIyr5iMz1QT8mGEV3P+xKIFHxizIFdg=
=jcGY
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree update for 5.20:
- Add device tree support for i.MX93 SoC.
- New board device tree: TQMa8MPQL, DH electronics i.MX8M Plus DHCOM and
PDK2, i.MX93 11x11 EVK, phyBOARD-Polis-i.MX8MM.
- A series from Abel Vesa and Viorel Suman to fix i.MX8QXP device tree
to comply with DT schema.
- Disable job ring 0 device for i.MX8MM to avoid caam_jr probe error, due
to that JR0 reservation is done in both upstream (v2.7) and downstream
(NXP lf_v2.4) TF-A.
- A series from Krzysztof Kozlowski to align gpio-key and LED node names
with dtschema.
- Add SNVS LPGPR device for i.MX8MM so that some preserving registers
becomes available as NVMEM.
- Add NoC device support for i.MX8MP SoC.
- A couple of changes from Sean Anderson to add SFP node for TA devices
for LayerScape SoCs.
- A series from Shengjiu Wang to enable bt-sco sound card support for
NXP i.MX8M EVK boards.
- Other small and random board updates.
* tag 'imx-dt64-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (33 commits)
arm64: dts: freescale: add initial device tree for TQMa8MPQL with i.MX8MP
arm64: dts: freescale: imx8qxp: Fix the keys node name
arm64: dts: freescale: imx8: Fix the system-controller node name
arm64: dts: freescale: imx8qxp: Fix the ocotp node name
arm64: dts: freescale: imx8qxp: Add fallback compatible for clock controller
arm64: dts: freescale: imx8: Fix power controller name
arm64: dts: freescale: imx8qxp: Remove unnecessary clock related entries
arm64: dts: imx8mp: add NoC node
arm64: dts: Add SFP node for TA 3.0 devices
arm64: dts: layerscape: Add SFP node for TA 2.1 devices
arm64: dts: freescale: Add phyBOARD-Polis-i.MX8MM support
arm64: dts: imx8m{m,p}-verdin: use IT temperatures
arm64: dts: imx8mn-evk: add bt-sco sound card support
arm64: dts: imx8mq-evk: add bt-sco sound card support
arm64: dts: imx8mm-evk: add bt-sco sound card support
arm64: freescale/imx8mp-evk.dts: reorder nodes alphabetically
arm64: dts: imx8mq: Pass a label to the AIPS nodes
arm64: dts: imx8m: Pass a label to the soc node
arm64: dts: imx8mm-venice-gw7902: fix UART1 CTS
arm64: dts: imx8mp: Add support for DH electronics i.MX8M Plus DHCOM and PDK2
...
Link: https://lore.kernel.org/r/20220709082951.15123-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A series from Alexander Stein to fix some i.MX6UL dt_binding_check
warnings.
- Replace deprecated 'enable-sdio-wakeup' property with 'wakeup-source'
for a couple of boards.
- A set of imx7-colibri device tree updates from Marcel Ziswiler to
improve devices Display, Touch, Ethernet and SD/MMC, and also adds
Toradex Iris carrier board.
- A few improvements on imx6qdl-colibri board, correct SGTL5000 MCLK
handling, simplify handling of inverted PWM backlight.
- A series from Max Krummenacher (and Oleksandr Suvorov) to improve the
existing i.MX6 Apalis carrier board device trees and adds a new device
tree for the Ixora V1.2 carrier board.
- Add USB dual-role switching using extcon for imx7-colibri board.
- Add SFP node for TA 2.1 devices for LayerScape SoCs.
- Other small and random updates on various boards.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmLJMugUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM6HTwf9EpFmI65t6eC8llTDK94Xx4dvwESq
TTx04A7XL36DgYAkGpL1l5KpcLGQGAo6Gfn1Nb6SxHfOL3Tqa3F/0FilR0h4sdGy
E6+OVzRJyoYTsL1l+tzcoLBAHMj/ai5gmTuTaQVypEz0Ai3JQnjR+p/v8xmAaPTE
crQy/ashAbOpBW09ZOw3T1osb9XqGDVCKHi6FxQS0vFNOC87olVGnOJedfaBwjpz
eMdXDWF8vbQ1mxIXzBBpSVU3htTVP6mZs4W4h0lQ22pHr6KuRRNPgjpB5s5m/Jjw
DTVTclhQBJGuY9FsrBRJKvTjlmQ513Wz57l0n11XZ0akSTT0TS9m3NuEdA==
=FZws
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLMRTsACgkQmmx57+YA
GNkDjg/+MEaAoe64LHBe1wDlq9jJJan8LegEJ5CA72hs6St3QT8PHh0vYpwx5AIX
xfDiSGugDQJpXgTj2qO0lLgaFJk8fH79UtCiLxInhqh5k3xrvO9ocYAcy8h37OCK
L3RNPZnNQBwSdqaqnmF60CQ+5/GgnI9A5F5sywxYXfDOayJsuqWHoMTGirWn3N7u
o8JURpXx1gOAZmnspyMku17ZodJNO96YB7Z3gihNV95trhddraRkT8v4hW2c3kA1
LjvxbDmfjh7E0DFm9okaPzwrsRtWavOLGI/gAsXD3q8iwd3GBS1/1HXghavDVFpF
wAgxk1d5FcGqr/AlJwuHc6yJ5YWfMJs/dnkvvbSNNQugmEDm6fsd56JyV0LnGXxu
ztcimNhAdZcUeidgQ/zMeBeKZ8ItXgvGTKyg6VwxxVveiFHoXYy53/mILGZFTyjB
1Wp+Hhv3/mxWt/IH+vx+Y5Dm83T9BEiQvWnT+s2OyqEzJK9O39bv5x8xhahBbkvQ
7CohB9CEzPSWKDf96grdUGEVwdQW/NXlAIVPts79HhvM0TmHKtdTJq4cqrqq+Vrl
WhRm+hsWgHI4tHTUCkcjDk0pm3i7VSMkQexJofgGW7HO14xlOx5YyhXmHhlcp0sQ
GFsJ9sp+E4yg5mvGw+Mot1D2kF4ZXzsDjzMqqZceeENMtDe+X2k=
=9m0W
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree change for 5.20:
- A series from Alexander Stein to fix some i.MX6UL dt_binding_check
warnings.
- Replace deprecated 'enable-sdio-wakeup' property with 'wakeup-source'
for a couple of boards.
- A set of imx7-colibri device tree updates from Marcel Ziswiler to
improve devices Display, Touch, Ethernet and SD/MMC, and also adds
Toradex Iris carrier board.
- A few improvements on imx6qdl-colibri board, correct SGTL5000 MCLK
handling, simplify handling of inverted PWM backlight.
- A series from Max Krummenacher (and Oleksandr Suvorov) to improve the
existing i.MX6 Apalis carrier board device trees and adds a new device
tree for the Ixora V1.2 carrier board.
- Add USB dual-role switching using extcon for imx7-colibri board.
- Add SFP node for TA 2.1 devices for LayerScape SoCs.
- Other small and random updates on various boards.
* tag 'imx-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (61 commits)
ARM: dts: layerscape: Add SFP node for TA 2.1 devices
ARM: dts: imx6qdl-prti6q.dtsi: Add applicable properties to usdhc3
ARM: dts: imx6q-bosch-acc: Replace 'enable-sdio-wakeup'
ARM: dts: imx7d-smegw01: Replace 'enable-sdio-wakeup'
ARM: dts: imx6q-apalis: Cleanup
ARM: dts: imx6q-apalis: backlight pwm: Adapt brightness steps
ARM: dts: imx6q-apalis: backlight pwm: Simplify inverted backlight
ARM: dts: imx6q-apalis: Add support for Toradex Ixora V1.2 carrier boards
ARM: dts: imx6q-apalis: Clean-up sd card support
ARM: dts: imx6q-apalis: Add adv7280 video input
ARM: dts: imx6q-apalis: Add ov5640 mipi csi camera
ARM: dts: imx6q-apalis: Disable stmpe touchscreen
ARM: dts: imx6q-apalis: Disable HDMI
ARM: dts: imx6q-apalis: Add LVDS panel support
ARM: dts: imx6q-apalis: move gpio-keys to SoM dtsi
ARM: dts: imx6q-apalis: Move Atmel MXT touch ctrl to SoM dtsi
ARM: dts: imx6q-apalis: Move pinmux groups to SoM dtsi
ARM: dts: imx6q-apalis: Move parallel rgb interface to SoM dtsi
ARM: dts: imx6q-apalis: Command pmic to standby for poweroff
ARM: dts: imx6q-apalis: Add gpio-line-names
...
Link: https://lore.kernel.org/r/20220709082951.15123-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds and enables various hardware on Tegra234 (host1x, VIC, GPCDMA)
as well as the Control BackBone related device tree nodes on Tegra194
and Tegra234.
Native timers are enabled on Tegra186, Tegra194 and Tegra234, which
allow keeping track of SoC-wide timestamps as well as hardware watchdog
functionality.
The audio subsystem is enhanced with the Output Processing Engine (OPE)
on Tegra210 and later.
Finally there are a handful of minor cleanups and fixes.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmLIemkTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zocb7EACxWEuPWxorxTlmGa4aHQano8W/D0Yn
ouaJJ+itWqe0AGJ1nmsdv4oBD93pYsIIk+eGAQPQPP1IzrK0Py4TmLuNecI/r8P7
LBNCpkZkKtmRVkWC5ujZli1eLBqZUIqfCqdvlXikHA/Vb6oLiCyOHq4/nyfNUiAP
S4geszaKBju4L/NbpQvXyGHsqlw34D1pTRGc0xmUuiqGlSKsExaQDag7OhPbtYv3
b0PfQidG4CmshwThxXiRbz3Fvy+wLjnIjBAiABDq6hEaBY8kN4Ogn4C4pr3xtqd1
ocy4/TLe0rRTIMnRCjfMkQgOuYsmApB/YOshnZR3sVBa9Ufe0L+0EKjp0IK7qDyQ
5OnI4CecmmWojng389vM8lCm9qiIOb+wPZo3VN3E1rkEfadyA+2GswQJt/DIKhtG
YYSnPe2ftAwxfW9CFzSQbrBQFS/oBG7Kf2wXb1nV09aU8woMqWYq6vA1FFQiNm0X
O+ZQYy70iy1Q2HrYDlZLgoTAlRSKiWWGZsDz9zkFUGNMt0QAT6gOsrO1BzJ535Qv
EJioAYuBSSo1fULg7NMp2d+cTHRKgOua6BQfVDm92dmNUVlVzHkd73CnxNV/6Jni
JpW3rsBLCfoery2dE+B52MqYor5MEFynjU4ulv1FdPU2L/t05dHHZeRJWDWgrEOE
xmej7X0Ex4+LlA==
=7G79
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLMRAAACgkQmmx57+YA
GNmRPxAAgoQryNpvwl3+rFoghpbUrxn/ld9+ODvy8+/zMs8SJg5znA4BK+o3vmGx
+A9nFXDe4+SnzPbggy7af2nN+iGfIXVwLP6F9kXPRhjgvM/PFOAtyvXSt5ZL2vWY
wxL5gT3NaoZSxMPdjyB5A/Dgj/uUZ5QodcUnYZsHa/fN4e9sFaohv7kFsda5HUre
ypU1owYRIOZMgpdYJe69v9iZyQMo+AV3ZyjSzvJ0gnDSh/DaeLWbwp0zf1cFj2Fe
O9lVD65CyU0mVpVWvjou+poZyZ7yYq4XgSoISSZNXPy/DZVNFJXJjjklxjD2IT3R
3F+emmiFFpOzytOQHwOjku8t1uaJKpuiTgLRG5isKO5gyMfOhN2CPEWf7Zg+DSZ7
7EV9OFsX4h+wpDPfcj/ENtH9+Acm7SUsryhK1BFGrqoJCbBf2M+T2+uot5GsPb1e
ERbXi/msdZR8cfnu5+z/+ZRcENrHWdIM0MZ15qKjVkGADxv4WORPp4VAk6VQN7bb
V1ssKOwimDEAMRaFADyZnQ8rY+s+hPO0NWWsLIjhD3PPyjYyvl1AZDJo8h4OlUNR
1BMe0AO1rm4xBoQXpyQQlf96Aand5wV0UThE323I0DoxB08SpjH4FKbDmnQUpMAz
YGIEpEftU2qMLgBdyIwLz/b0oTaIPeDLgEu24TVg6WoI2bXF93M=
=fixm
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.20-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.20-rc1
This adds and enables various hardware on Tegra234 (host1x, VIC, GPCDMA)
as well as the Control BackBone related device tree nodes on Tegra194
and Tegra234.
Native timers are enabled on Tegra186, Tegra194 and Tegra234, which
allow keeping track of SoC-wide timestamps as well as hardware watchdog
functionality.
The audio subsystem is enhanced with the Output Processing Engine (OPE)
on Tegra210 and later.
Finally there are a handful of minor cleanups and fixes.
* tag 'tegra-for-5.20-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Fix SDMMC1 CD on P2888
arm64: tegra: Update compatible for Tegra234 GPCDMA
arm64: tegra: Add Host1x and VIC on Tegra234
arm64: tegra: Add Host1x context stream IDs on Tegra186+
arm64: tegra: Enable native timers on Tegra234
arm64: tegra: Enable native timers on Tegra194
arm64: tegra: Enable native timers on Tegra186
arm64: tegra: Add node for CBB 2.0 on Tegra234
arm64: tegra: Add node for CBB 1.0 on Tegra194
arm64: tegra: Align gpio-keys node names with dtschema
arm64: tegra: Mark BPMP channels as no-memory-wc
arm64: tegra: Add Tegra234 GPCDMA device tree node
arm64: tegra: Adjust whitespace around '='
arm64: tegra: Enable OPE on various platforms
arm64: tegra: Add OPE device on Tegra210 and later
Link: https://lore.kernel.org/r/20220708185608.676474-7-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Two minor fixes to help reduce the noise from the DT validation tooling.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmLIeZUTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zod5fEACvewPLXw2IuelJkmOLsLCs+6bP4JaD
TXLThFgOHvk46ZhcJfLNZJ/73xC6ZULjRUo7Kj7dPeD6Bptj4xQMEwDhw+FIijQd
VCV1eZZSbOuE4HAiiWzOzWspFe6OafecM3G8TNZt2LuRQUGrF619hD+w3bX3jm59
G7iPSmzlpZEb42XudF6YUPMCz/HB1J0L3yIpNkaPnpFBzn0kLVgXXTCebk/9r5JE
UyorpGaHwVsUqKQirjdx66pvItxp79860r8SLX5bltTclgDX5Ir3yurgoWtMR6hT
p90g9hNsxo4g8nw9e+POi4jgQudCXTThbBwbuJs9CjWZ/+iB0r10KiCOEggVlcqC
v60uZxaNvr1xPdHYzNdRzoeTgLxJEvgv1T0kKNs7xzbqLHywIkdimkUtwWq9ZbeH
nWztZ1FW7IXCwWxFiihZBzktA33i5grtCc9xVAHdPVQnInfgUUjhZfqaonFy6qQV
ezo4Pt1Vp03yc9Vy2wKUznk1iD0PcU/QEf8bwBO2gMlgBUCr1DEtk4kP4HQY7gG2
dr7dTjYptY/30Asef0fc8g93loqL0CCnWmcirp8yrN3NaObEB597bYkidYGygSNz
JwaCw6bdsYxcqh2mKAaVczY0CYVKn0PZhvEHNA4Vhnt3YRLprFKCb9enRmV3wvV2
uOSpdL4UT+wVAQ==
=dXxp
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLMQ8oACgkQmmx57+YA
GNlqVxAAv2s1Jf+51aPEZJvBl1O+BDebaQBBiceanED5pU3RS6bdfQA8Sk+PBs+/
T1q2bQCyLU/aDR4VUfbJr0uK3EqvIwnhGRAisXSGSergA+tO6VPQ/83iCLYFmaSZ
AsT0bN09SfiEoGamC+GGieRVNOenzOzay1oMozxCKliS2ADkHfFuwXgLdIA0CWJC
repCHf/9IJN7RDiSlY/r+SJxCKN2EJbc8fNc5wO+K/QP02yGPi3ddwBFFkfikTGp
SYsRJJ7v+UAmZ8pjNKtHwMV3woK1rGTcUxWYvHo+wQ2gJShCUSVuqNwhXRqKB7zT
h8Uj7ZjaG8Zq7ZuHwQmFgubNBQmwDOVdShVJhLA+AMbcE9OOjqqBFtyaIBtNZlml
TjvOiuPUkcPuTOaC0HPQifus8MGnXAUh1qWXANb0MwI0WHLu6d0+TUTMyt/oZzgD
EPu/fN4GoVI0Dj/88ZP8Zu1J8eNu7ULToC/p9pUdMT0XHLDWXG2IkkgyASj7YZpu
sZML7cA3MJA4APTaJIa2b30Vv+Cl8gfOfv+csdi9t+AjRMo+/gGfoG5i7tFbfHQq
4FZzV2cgIp4Zh5Icl9iRmUHj13B2MaBzaKAuiWqQHO4RsevpxlrNQvrbOilyQQJF
yqK+r14gwdLOx4zkaP0emsCe39RXLEvFD5Ob3SPQ0A8jEQ1fB0w=
=Lh+F
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.20-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.20-rc1
Two minor fixes to help reduce the noise from the DT validation tooling.
* tag 'tegra-for-5.20-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Align gpio-keys node names with dtschema
ARM: tegra: Adjust whitespace around '='
Link: https://lore.kernel.org/r/20220708185608.676474-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
These changes add clock, reset, memory client and power domain
definitions for various devices found on Tegra234 along with a few
device tree bindings for new hardware.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmLIeLYTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zodtBEACW4bu7bO2/aAQNOX4R0qUOM64nj9cE
sqxo1A7JxxGQWBsjiVCD62nCnRP1ehqF2anVEdCJvh2eXlWHdhTgs/lV2HK712Ny
otkgok/1pVKfvwTuziyqyOHyKD0j2ZoDJlRgYDTF+WUrVrXXnQyc32lt+zmibtH1
w3TIx6vx4FUnYJELNQPeqbbBP450eIGJ8fZBhIM68kqF/4HKVb4e2jofV3Gd1SBx
wSBDW63nvqmvErmHfS9LVEX5GcRm0m4RvHWCMK61yc92BwlRKOlweTYczfZmw3oB
feVtW59+yHYUWa9Dx7PATz7ns+YgpVI9ZU35NKT31/B0gLWh52kZuXFwA9g+02fE
vq7qV3FhFZtyMBp8CaYopp1INCxU0xXTxvIRw+R00Y5Fab6XUGz+qKTDyHVfhkcD
LtSHyWQ5h/PAUrcBaAALuvkU8ZCYvdOfTQMQBm5sUoTBMFQ7GsuvOmGy48HbWxLV
n1SRZNNoXAKWK20Ko+ydLe5rAWpAKOb5onufPhm0JiGziVto/Q/qz9tsh+5lE0Gw
v9W9poXoLlfwpAdLteAchKCgCGIuWims0XwRxVz8lvudEb6OUyMlr2eUNNYFMGsd
SnPwHUO67fm6/hxA5NoHDuy0mdynJEcDXaJ+OORfezT/JILgIughAp51+/Whk88p
ByXU/MOC+61yoA==
=3/dX
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLMQ3IACgkQmmx57+YA
GNldFQ//SrIZR5mCeRnLSZEdw5xah7TXwvIOvDw+4JQ3Fbrzq63L/ggm307q6WcC
4ymOP0ImzAxbHp7Vc5qb6wELSSIiGBy/4y3g/rVinK1ZFRqHiiOkVwHABQp5GMhM
h/Xm3QVym9UDA4a0hy6EUREb5QHo0l/yYgsXoRJLfh1HuARswevAu2GK+Q4rEH1b
8aG8xm7fbhafhAJzzJkufOH6WHyhelP0zCVs9Ipa0oOcz1t0/cqYhLDQH/43r76z
oN+NbEOuCxEShTAhEZ2K5F6lXtR1CB20BE4y5lfMebevSRIXjfN2XfQnJfcAcCY/
CfT0RCi0w4uz5ZgnkWhI+SbXNT7oHSDvdEogOI1yKm1tm0F8PqUKsPv3tL/P7H0D
BcOmPslYP10iRuwXDZzbE5FgCZwjIacwJF24BLqI8nEr1U6aC13rwlnsB7mWk1E5
OXuo/1T0X8R34OrZQzkNpV2WAhT/jNMC5Pj01h0A2XAX0UGB2vP+P5wWurumMkwn
V8VX82qN0FN6LOOnm+YgreLHv8uR6V95EzIDnvND3dyz0qvsajlIo1Q+PACsVUOA
fBuxDd2/ABAMglqNNTZTg75PIosrbRqtaaZDq2ehlyWUjn4BGWaEv4W0zZBpyrZB
CMUQ7ZBhJapvXoRxjOkkPU7WmfYo/CQtjxRkkBS03O+xNIZJxRo=
=iDCl
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.20-rc1
These changes add clock, reset, memory client and power domain
definitions for various devices found on Tegra234 along with a few
device tree bindings for new hardware.
* tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: tegra-ccplex-cluster: Remove status from required properties
dt-bindings: Add headers for Host1x and VIC on Tegra234
dt-bindings: timer: Add Tegra186 & Tegra234 Timer
dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB 2.0 binding
dt-bindings: arm: tegra: Add NVIDIA Tegra194 AXI2APB binding
dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB 1.0 binding
dt-bindings: memory: Add Tegra234 MGBE memory clients
dt-bindings: Add Tegra234 MGBE clocks and resets
dt-bindings: power: Add Tegra234 MGBE power domains
dt-bindings: Add headers for Tegra234 GPCDMA
Link: https://lore.kernel.org/r/20220708185608.676474-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The X96 Mate is an Allwinner H616 based TV box, featuring:
- Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
- 2GiB/4GiB RAM (fully usable!)
- 16/32/64GiB eMMC
- 100Mbps Ethernet (via embedded AC200 EPHY, not yet supported)
- Unsupported Allwinner WiFi chip
- 2 x USB 2.0 host ports
- HDMI port
- IR receiver
- 5V/2A DC power supply via barrel plug
Add a basic devicetree for it, with SD card and eMMC working, as
well as serial and the essential peripherals, like the AXP PMIC.
This DT is somewhat minimal, and should work on many other similar TV
boxes with the Allwinner H616 chip.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220708105235.3983266-8-andre.przywara@arm.com
The OrangePi Zero 2 is a development board with the new H616 SoC. It
comes with the following features:
- Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU
- 512MiB/1GiB DDR3 DRAM
- AXP305 PMIC
- Raspberry-Pi-1 compatible GPIO header
- extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports
- 1 USB 2.0 host port
- 1 USB 2.0 type C port (power supply + OTG)
- MicroSD slot
- on-board 2MiB bootable SPI NOR flash
- 1Gbps Ethernet port (via RTL8211F PHY)
- micro-HDMI port
- (yet) unsupported Allwinner WiFi/BT chip
Add the devicetree file describing the currently supported features.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220708105235.3983266-7-andre.przywara@arm.com
This adds the two board compatible strings of two boards with the
Allwinner H616 SoC. One is a development board from OrangePi, the other
some TV box from some formerly unused vendor. Add that vendor to the
vendor list on the way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220708105235.3983266-6-andre.przywara@arm.com
The Allwinner H616 SoC contains a VCC_PI pin, which supplies the voltage
for GPIO port I.
Extend the range of supply port names to include vcc-pi-supply to cover
that.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220708105235.3983266-5-andre.przywara@arm.com
This (relatively) new SoC is similar to the H6, but drops the (broken)
PCIe support and the USB 3.0 controller. It also gets the management
controller removed, which in turn removes *some*, but not all of the
devices formerly dedicated to the ARISC (CPUS).
And while there is still the extra sunxi interrupt controller, the
package lacks the corresponding NMI pin, so no interrupts for the PMIC.
The reserved memory node is actually handled by Trusted Firmware now,
but U-Boot fails to propagate this to a separately loaded DTB, so we
keep it in here for now, until U-Boot learns to do this properly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220708105235.3983266-4-andre.przywara@arm.com
The R_PIO pinctrl device on the Allwinner H616 SoC does not have an
interrupt (it features only two pins).
However the binding requires at least naming one upstream interrupt,
plus the #interrupt-cells and interrupt-controller properties.
Drop the unconditional requirement for the interrupt properties, and
make them dependent on being not this particular pinctrl device.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220708105235.3983266-3-andre.przywara@arm.com
The Allwinner H616 contains an "EMAC0" Ethernet MAC compatible to the A64
version.
Add it to the list of compatible strings.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220708105235.3983266-2-andre.przywara@arm.com
This adds support for TQMa8MPQL module on MBa8MPxL board.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
TQMa8MPxL is a SOM family using NXP i.MX8MP CPU family
MBa8MPxL is an evaluation mainbord for this SOM
The SOM needs a mainboard, therefore we provide two compatibles here:
"tq,imx8mp-<SOM>" for the module and
"tq,imx8mp-<SOM>-<SBC>"
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fix the usb_0 HS PHY reference clock which was mistakingly replaced with
the first usb_2 PHY clock.
Fixes: 152d1faf1e ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220708072358.4583-1-johan+linaro@kernel.org
The recent commit that dropped the PCIe PHY clock index failed to update
the PCIe node reference.
Fixes: 531c738fb3 ("arm64: dts: qcom: sc7280: drop PCIe PHY clock index")
Reported-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707064222.15717-1-johan+linaro@kernel.org
Use CONFIG_ARCH_BCMBCA to build all the BCMBCA SoC dts and remove
CONFIG_ARCH_BCM_63XX from the makefile
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Revisions 1.0 and 1.1 of the PinePhone mainboard do not have an external
resistor connecting HBIAS to MIC2P. Enable the internal resistor to
provide the necessary headeset microphone bias.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220621035452.60272-4-samuel@sholland.org
All of the sunxi SoCs since at least the A33 have a similar structure
for the MBUS and DRAM controller, but they all have minor differences in
MBUS port assignments and DRAM controller behavior. Give each SoC its
own compatible.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220702042447.26734-2-samuel@sholland.org
Some older SoCs use a deprecated MBUS binding with some clocks missing.
Currently, new SoCs must opt in to the complete binding. This should be
the default, so new SoCs do not accidentally use the deprecated version.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220702042447.26734-1-samuel@sholland.org
Hook SDMMC1 CD up with CVM GPIO02 (SOC_GPIO11) used for card detection on J4
(uSD socket) on the carrier.
Fixes: ef633bfc21 ("arm64: tegra: Enable card detect for SD card on P2888")
Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use the compatible specific to Tegra234 for GPCDMA to support
additional features.
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add device tree nodes for Host1x and VIC on Tegra234.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add Host1x context stream IDs on systems that support Host1x context
isolation. Host1x and attached engines can use these stream IDs to
allow isolation between memory used by different processes.
The specified stream IDs must match those configured by the hypervisor,
if one is present.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The native timers IP block found on NVIDIA Tegra SoCs implements a
watchdog timer that can be used to recover from system hangs. Add and
enable the device tree node on Tegra234.
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The native timers IP block found on NVIDIA Tegra SoCs implements a
watchdog timer that can be used to recover from system hangs. Add and
enable the device tree node on Tegra194.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Enable the native timers on Tegra186 chips to allow using the watchdog
functionality to recover from system hangs.
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra234 uses the Control Backbone (CBB) version 2.0. Add the nodes
that enable error handling from the various CBB 2.0 fabrics found on
Tegra234.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add device tree nodes to enable error handling on the Control Backbone
(CBB). Tegra194 uses CBB version 1.0.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra SYSRAM contains regions access to which is restricted to
certain hardware blocks on the system, and speculative accesses to
those will cause issues.
Patch 'misc: sram: Only map reserved areas in Tegra SYSRAM' attempted
to resolve this by only mapping the regions specified in the device
tree on the assumption that there are no such restricted areas within
the 64K-aligned area of memory that contains the memory we wish to map.
Turns out this assumption is wrong, as there are such areas above the
4K pages described in the device trees. As such, we need to use the
bigger hammer that is no-memory-wc, which causes the memory to be
mapped as Device memory to which speculative accesses are disallowed.
As such, the previous patch in the series,
'firmware: tegra: bpmp: do only aligned access to IPC memory area',
is required with this patch to make the BPMP driver only issue aligned
memory accesses as those are also required with Device memory.
Fixes: fec29bf049 ("misc: sram: Only map reserved areas in Tegra SYSRAM")
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Yousaf Kaukab <ykaukab@suse.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add device tree nodes for Tegra234 GPCDMA
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
