Commit graph

24619 commits

Author SHA1 Message Date
Linus Torvalds
e76db6e50c ARM: SoC fixes for 6.3, part 2
As usual, most of the bug fixes address issues in the devicetree files,
 and out of these, most are for the Qualcomm and NXP platforms, including:
 
  - A missing "reserved-memory" property on LG G Watch R that
    is needed to prevent clashing with firmware
 
  - Annotations for cache coherency on multiple machines
 
  - Corrections for pinctrl, regulator, clock, iommu and power domain
    properties for i.MX and Qualcomm to correctly reflect the
    hardware settings
 
  - Firmware file names on multiple machines
    SA8540P Ride board
 
  - An incompatible change to the qcom vadc driver requires adding
    individual labels
 
  - Fix EQoS PHY reset GPIO by dropping the deprecated/wrong property
    and switch to the new bindings.
 
  - A fix for PCI bus address translation Tegra194 and Tegra234.
 
 There are also a couple of device driver fixes, addressing
 
  - A race condition in the amdtee driver
 
  - A performance regression in the Qualcomm 'llcc' driver
 
  - An unitialized variable use NXP i.MX "weim" driver
 
  - Error handling issues in Qualcomm "rmtfs", and "scm"
    drivers and the Arm scmi firmware driver
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmQeF5sACgkQmmx57+YA
 GNmbGhAAigQgZjlV8Y4IIguJ2WjPcufD9b30j/iWp/5iFFCLlHex409FM+cYv6wo
 oSqEpplW/D2UoVEmODv9JGnknwgg6NZLq0pMxBuTC+vUPRwWH8DPKSkijMVcEZOd
 MmRB8kMwPaQhXPy5lWHfcGtrRISekqQf1rrIhQQN1bdWw2gIxGNN63UXJJIZDsTQ
 tno85BLiWGIrwvmqTN93ecv0lwsA2xkgDAxA0eWSWmy4cjLNzzRQ0QuAtcgSsV/V
 5E+R6JWidmdCMIkjU6XD0jR4c2oCUoMjXZcUDwkBP1yvA0Eev+xBdJciM/DZemKL
 pl2iJThmcLu5qkuEqREi0UexMYgnoqg8KklPPeNdJTmLGeWh05aw36RYkqMXnyMw
 S4hqJS0jH/wmRomUtnJhMCL0HCJ4QrTD10kw1Rt67gRy2weGtu7X4fEmqIOESG8G
 3XikL/udHiLDZ6Nk9bAE7xdmIAJao2RA8t5wJhActVLV9y5H6Fv+EbzULBUBmNew
 9v0XqgcuW66T+OilRm7pR5jYcUdOUKcq/4lC+P+nVAsDXEgT2BADRVk84gY+WRkz
 MwAeqeNhZtJsEA/Ym+JLFb4vAHr6v3S3kqHlWaDtyBOeWAsU0EDiXO47iabdvGcc
 4NR9jn+Js7npSpGJKkopiRIHPyAYbukMkTKtYtsuucLnqZF2Znw=
 =rKwy
 -----END PGP SIGNATURE-----

Merge tag 'arm-fixes-6.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "As usual, most of the bug fixes address issues in the devicetree
  files, and out of these, most are for the Qualcomm and NXP platforms,
  including:

   - A missing 'reserved-memory' property on LG G Watch R that is needed
     to prevent clashing with firmware

   - Annotations for cache coherency on multiple machines

   - Corrections for pinctrl, regulator, clock, iommu and power domain
     properties for i.MX and Qualcomm to correctly reflect the hardware
     settings

   - Firmware file names on multiple machines SA8540P Ride board

   - An incompatible change to the qcom vadc driver requires adding
     individual labels

   - Fix EQoS PHY reset GPIO by dropping the deprecated/wrong property
     and switch to the new bindings.

   - A fix for PCI bus address translation Tegra194 and Tegra234.

  There are also a couple of device driver fixes, addressing:

   - A race condition in the amdtee driver

   - A performance regression in the Qualcomm 'llcc' driver

   - An unitialized variable use NXP i.MX 'weim' driver

   - Error handling issues in Qualcomm 'rmtfs', and 'scm' drivers and
     the Arm scmi firmware driver"

* tag 'arm-fixes-6.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (48 commits)
  arm64: dts: qcom: sc8280xp-x13s: mark bob regulator as always-on
  arm64: dts: qcom: sc8280xp-x13s: mark s12b regulator as always-on
  arm64: dts: qcom: sc8280xp-x13s: mark s10b regulator as always-on
  arm64: dts: qcom: sc8280xp-x13s: mark s11b regulator as always-on
  arm64: dts: imx93: add missing #address-cells and #size-cells to i2c nodes
  bus: imx-weim: fix branch condition evaluates to a garbage value
  arm64: dts: imx8mn: specify #sound-dai-cells for SAI nodes
  ARM: dts: imx6sl: tolino-shine2hd: fix usbotg1 pinctrl
  ARM: dts: imx6sll: e60k02: fix usbotg1 pinctrl
  ARM: dts: imx6sll: e70k02: fix usbotg1 pinctrl
  arm64: dts: imx93: Fix eqos properties
  arm64: dts: imx8mp: Fix LCDIF2 node clock order
  arm64: dts: imx8mm-nitrogen-r2: fix WM8960 clock name
  arm64: dts: imx8dxl-evk: Fix eqos phy reset gpio
  firmware: qcom: scm: fix bogus irq error at probe
  arm64: dts: qcom: sm8550: Mark UFS controller as cache coherent
  arm64: dts: qcom: sa8540p-ride: correct name of remoteproc_nsp0 firmware
  arm64: dts: qcom: sm8450: Mark UFS controller as cache coherent
  arm64: dts: qcom: sm8350: Mark UFS controller as cache coherent
  arm64: dts: qcom: sm8550: fix LPASS pinctrl slew base address
  ...
2023-03-24 15:38:13 -07:00
Linus Torvalds
877c20b104 First batch of EFI fixes for v6.3:
- Set the NX compat flag for arm64 and zboot, to ensure compatibility
   with EFI firmware that complies with tightening requirements imposed
   across the ecosystem.
 
 - Improve identification of Ampere Altra systems based on SMBIOS data.
 
 - Fix some issues related to the EFI framebuffer that were introduced
   as a result from some refactoring related to zboot and the merge with
   sysfb.
 
 - Makefile tweak to avoid rebuilding vmlinuz unnecessarily.
 
 - Fix efi_random_alloc() return value on out of memory condition.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQQm/3uucuRGn1Dmh0wbglWLn0tXAUCZBxfeAAKCRAwbglWLn0t
 XJzfAQCiRPMpm5YomKDLdAtjXfwEbyevlYN/gDInAdX5ETzPqgD/WDSEmj3cqh+V
 Es3u5P/7ICC/qgCleq87qpUk0IPwEwo=
 =u0Zg
 -----END PGP SIGNATURE-----

Merge tag 'efi-fixes-for-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi

Pull EFI fixes from Ard Biesheuvel:

 - Set the NX compat flag for arm64 and zboot, to ensure compatibility
   with EFI firmware that complies with tightening requirements imposed
   across the ecosystem.

 - Improve identification of Ampere Altra systems based on SMBIOS data.

 - Fix some issues related to the EFI framebuffer that were introduced
   as a result from some refactoring related to zboot and the merge with
   sysfb.

 - Makefile tweak to avoid rebuilding vmlinuz unnecessarily.

 - Fix efi_random_alloc() return value on out of memory condition.

* tag 'efi-fixes-for-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/efi/efi:
  efi/libstub: randomalloc: Return EFI_OUT_OF_RESOURCES on failure
  efi/libstub: Use relocated version of kernel's struct screen_info
  efi/libstub: zboot: Add compressed image to make targets
  efi: sysfb_efi: Add quirk for Lenovo Yoga Book X91F/L
  efi: sysfb_efi: Fix DMI quirks not working for simpledrm
  efi/libstub: smbios: Drop unused 'recsize' parameter
  arm64: efi: Use SMBIOS processor version to key off Ampere quirk
  efi/libstub: smbios: Use length member instead of record struct size
  efi: earlycon: Reprobe after parsing config tables
  arm64: efi: Set NX compat flag in PE/COFF header
  efi/libstub: arm64: Remap relocated image with strict permissions
  efi/libstub: zboot: Mark zboot EFI application as NX compatible
2023-03-24 10:07:38 -07:00
Arnd Bergmann
f42ee7c457 Qualcomm ARM64 Devicetree fixes for v6.3
This correct SIM card selection on the two newly introduced
 MSM8916-based USB modems.
 
 The firmware-name for the first CDSP is corrected on the SA8540P Ride
 board.
 
 The PCIe controller in SC7280 is marked cache-coherent, which resolves
 seen data corruption issues.
 
 Labels are added to the vadc channel nodes on SC8280XP, as the Linux
 driver was updated to not include the unit address when generating
 device names and collisions thereby prevented registration of the
 channels. Audio clocks and routing is corrected and a few regulators are
 marked always-on for the Lenovo Thinkpad X13s, as their clients are not
 fully described at this point.
 
 SPI5 was accidentally enabled by default on SM6115, and is disabled
 again.
 
 CDSP on SM6375 is provided its power-domains, to appropriately vote for
 during power up for the DSP.
 
 The iommu mask for the PCIe controllers in SM8150 is updated, to match
 what the hypervisor expects.
 
 Th Venus firmware path is corrected on Xiaomi Mi Pad 5 Pro.
 
 The UFS controller is marked cache coherent on SM8350 and SM8450.
 
 The clocks for the second WSA macro on SM8450 is corrected, and given
 its own clocks.
 
 The bias-pull-up value for I2C pins are corrected on SM8550, to trigger
 the selection of the strong pull. CPU compatibles and the base address
 of the LPASS TLMM block are corrected.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQcXyAVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FHkcP/1akX9y9zL+WafnVBz4hxDXvlo2G
 mlBincInfXXvpY7XqQ0ahjJKWCGBTkeOspkxHgH1vWJPWYlpAaJTVdI5ghLRmGJ2
 VAb1NJskwxgyc0pCNvrpKHumIp+ZqU7kWhepKJVwNa/AYshYJ9nvBc3jO9FmR02I
 s/sTktzU9HK5C5o2r4ZbNcskxdQ7OD91YDLKVw8Tn+ubZiNhjyeRI5v9vPszac+n
 29Zz+NJVj4SUjywN9K/j/nKjmfkuJ5wRbRIqWifB6qXRo25pp/u7fUN3l6YF+w3X
 BMZhJyzFrSn6ICiw5Io1QjLceUWmJNtLyDFkKpgwS0ZLU4iW0SQ0h1IHuOKq1EOu
 bS3nYi4uFqp91b7Ay8rh9zri0RCE617bcCoN1edPJH/MZA0Ndg20x8ZMee5klXTo
 vC+UjLCdUkS+e3SnvRlOa8wghwTDnJ/yELdDyMh2++wypqELcFRSRvjiW1d+nqXr
 F0M5Jm5o9fGgPTEtdUCPVMT29RGzns51eUcp4MW5D9mxL8j4ozhYcIFQf+IF9U8l
 A8g9hzuK68DN5rwlBbJlW/UWUrUl0ZTlmstoyg5sMgAJ/Z73tV13J8D7GAKRgzVI
 Xf618k6El4NlHBcEzXtc5QBN/UNosZXu2aSsnECMi314bn3QmfVyQ/wlfCYmp/R4
 /Ekp1Dxy3Gv1rB8j
 =9sTC
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmQd2HEACgkQmmx57+YA
 GNkVcg/8Do+X6UUaMF1F8l/P+PNJpyh7bk8MRuKyJ1ei5rUhv/sXWoCBXISg5rOD
 tU8A+lYXfyEAiUf1wx5kqrkkd9Uz4vFEC6lSbLwCZSOYBgkptXSrwcW+29Cnbcn7
 SitGyZUJJGhbxPCEzYB/qtMnpwg0deL/Wc5Va2I2EmO+/GenZtlEXKiOd6yLwKp8
 KDCe8DuXLoMQ+IAk/U/F66QJh7xZVc2xnMJx48JLmveWsyBeVWrqmuG7zd/8h1IW
 P5r9nop3WvaIC2PjXZ5DeLVan4OBAwdC7s2GcrrSIuM+NP5q1/cxeTzGLPQJqAXc
 iPwu0/8a5PL0aTJHgMPQWii2hJqm+twbr42OuqG6tjMgAVuHQjRwOlcpDMiP5Z4X
 K03I36w/KgURftqlHkCnEAd8MT75+HSJzU14WLHbtipHLcUfan6raE+J+TPFIaZ2
 s6T+um8Unfgt9jR1OMIXXxOk9151BsCW5nO+5PL9UZVobC4oe/XLspVmA8LSwn8J
 w3C+pAFr9s8GMYzB34aIMdj79BgYCgP7dk6H7Jxu4EQ7zY90U2qCWxCNX7EGGylR
 IJdJkm/clc8zMYaDzWCgck4XM0UtthpEJqLM+KzN/01MoRnoWBQaqjC2ui29ryeA
 o4XdMnqBpqG5m4Sx/QYvZdZ5E4XCFBBz5urMXhs7Z9uGznOGc8A=
 =fCbE
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-fixes-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/fixes

Qualcomm ARM64 Devicetree fixes for v6.3

This correct SIM card selection on the two newly introduced
MSM8916-based USB modems.

The firmware-name for the first CDSP is corrected on the SA8540P Ride
board.

The PCIe controller in SC7280 is marked cache-coherent, which resolves
seen data corruption issues.

Labels are added to the vadc channel nodes on SC8280XP, as the Linux
driver was updated to not include the unit address when generating
device names and collisions thereby prevented registration of the
channels. Audio clocks and routing is corrected and a few regulators are
marked always-on for the Lenovo Thinkpad X13s, as their clients are not
fully described at this point.

SPI5 was accidentally enabled by default on SM6115, and is disabled
again.

CDSP on SM6375 is provided its power-domains, to appropriately vote for
during power up for the DSP.

The iommu mask for the PCIe controllers in SM8150 is updated, to match
what the hypervisor expects.

Th Venus firmware path is corrected on Xiaomi Mi Pad 5 Pro.

The UFS controller is marked cache coherent on SM8350 and SM8450.

The clocks for the second WSA macro on SM8450 is corrected, and given
its own clocks.

The bias-pull-up value for I2C pins are corrected on SM8550, to trigger
the selection of the strong pull. CPU compatibles and the base address
of the LPASS TLMM block are corrected.

* tag 'qcom-arm64-fixes-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (23 commits)
  arm64: dts: qcom: sc8280xp-x13s: mark bob regulator as always-on
  arm64: dts: qcom: sc8280xp-x13s: mark s12b regulator as always-on
  arm64: dts: qcom: sc8280xp-x13s: mark s10b regulator as always-on
  arm64: dts: qcom: sc8280xp-x13s: mark s11b regulator as always-on
  arm64: dts: qcom: sm8550: Mark UFS controller as cache coherent
  arm64: dts: qcom: sa8540p-ride: correct name of remoteproc_nsp0 firmware
  arm64: dts: qcom: sm8450: Mark UFS controller as cache coherent
  arm64: dts: qcom: sm8350: Mark UFS controller as cache coherent
  arm64: dts: qcom: sm8550: fix LPASS pinctrl slew base address
  arm64: dts: qcom: sc8280xp-x13s: fix va dmic dai links and routing
  arm64: dts: qcom: sc8280xp-x13s: fix dmic sample rate
  arm64: dts: qcom: sc8280xp: fix lpass tx macro clocks
  arm64: dts: qcom: sc8280xp: fix rx frame shapping info
  arm64: dts: qcom: sm8450: correct WSA2 assigned clocks
  arm64: dts: qcom: sc7280: Mark PCIe controller as cache coherent
  arm64: dts: qcom: msm8916-ufi: Fix sim card selection pinctrl
  arm64: dts: qcom: sm8250-xiaomi-elish: Correct venus firmware path
  arm64: dts: qcom: sm8550: Use correct CPU compatibles
  arm64: dts: qcom: sm8550: Add bias pull up value to tlmm i2c data clk states
  arm64: dts: qcom: sm6375: Add missing power-domain-named to CDSP
  ...

Link: https://lore.kernel.org/r/20230323141642.1085684-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-03-24 18:05:52 +01:00
Johan Hovold
07b0883e1f arm64: dts: qcom: sc8280xp-x13s: mark bob regulator as always-on
The bob supply is used by several pmic regulators and components which
are not (yet fully) described in the devicetree.

Mark the regulator as always-on for now.

Fixes: f29077d866 ("arm64: dts: qcom: sc8280xp-x13s: Add soundcard support")
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230322113318.17908-5-johan+linaro@kernel.org
2023-03-22 07:44:01 -07:00
Johan Hovold
291e6b6cd7 arm64: dts: qcom: sc8280xp-x13s: mark s12b regulator as always-on
The s12b supply is used by several pmic regulators as well as the
wlan/bluetooth radio which are not yet fully described in the
devicetree.

Mark the regulator as always-on for now.

Fixes: f29077d866 ("arm64: dts: qcom: sc8280xp-x13s: Add soundcard support")
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230322113318.17908-4-johan+linaro@kernel.org
2023-03-22 07:44:01 -07:00
Johan Hovold
f4472fd33e arm64: dts: qcom: sc8280xp-x13s: mark s10b regulator as always-on
The s10b supply is used by several components that are not (yet)
described in devicetree (e.g. ram, charger, ec) and must not be
disabled.

Mark the regulator as always-on.

Fixes: f29077d866 ("arm64: dts: qcom: sc8280xp-x13s: Add soundcard support")
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230322113318.17908-3-johan+linaro@kernel.org
2023-03-22 07:44:01 -07:00
Johan Hovold
b8838e6530 arm64: dts: qcom: sc8280xp-x13s: mark s11b regulator as always-on
The s11b supply is used by the wlan module (as well as some of the
pmics) which are not yet fully described in the devicetree.

Mark the regulator as always-on for now.

Fixes: 123b30a756 ("arm64: dts: qcom: sc8280xp-x13s: enable WiFi controller")
Cc: stable@vger.kernel.org	# 6.2
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230322113318.17908-2-johan+linaro@kernel.org
2023-03-22 07:44:01 -07:00
Arnd Bergmann
38557b2d6d i.MX fixes for 6.3:
- A couple of i.MX93 fixes from Alexander Stein to correct EQoS Ethernet
   properties.
 - Correct clock-names of FlexSPI device in imx8-ss-lsio DT.
 - Fix EQoS PHY reset GPIO by dropping the deprecated/wrong property and
   switch to the new bindings.
 - Fix an issue with imx-weim bus driver that branch condition evaluates
   to a garbage value.
 - Correct WM8960 clock name for imx8mm-nitrogen-r2 board.
 - Fix LCDIF2 clocks for i.MX8MP DT.
 - Add missing #sound-dai-cells properties to SAI nodes for i.MX8MN DT.
 - Revert LS1028A DT changes of getting MAC addresses from VPD, as the
   dependency on NVMEM device is not in place.
 - A series from Peng Fan to add missing pinctrl property for i.MX6SL
   based devices.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmQRxqUUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM5fJgf/b9gDwsdBW/u4p7cxo57u5kwxw7b4
 YynKjsobP9T/ZQCak9lGPHDQGUkMoWHvHgU9xghjHfcNSX41i7KJgcbluk5YbEtw
 gcDvq0lUUT+lJzH2C7HlgwUjp2zWb84DZb4byyHTxcJK6my8RMQ6WtCONVwxrbv4
 yJkXjzeXcV1jP2P+isSpG82zpMTkQaDQaV8/fEWPhfm0zXYhTY13tRdA20knaMyS
 lEzfq/IG9Ikgh3Ho4WoMIGCz3ZZJqCDjLYFH+i6kh1XWILyUkVvnSbyueRJCIYCT
 1dGsM/DKBADWL3frSGS6HbnlCOGdk3EOfGpRsLKZhbpEqqeAbyPHDL3X6A==
 =qjnx
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmQUexcACgkQmmx57+YA
 GNlIcw/8DlXyxwvH/mzjD82G3o/csNxSfzFAsjfGmqWQBEVGfDbNITvyMQXijTz6
 LVy1Ds09N5RHIdgeqNkhEtzE3vbw/ecJ2/0LxHWWaACh+rADJdUH8G62JVVycC6O
 RGoXpG1gjuC3gaLJvVBDCPOrcMJpLbwASsjxMrUqBSmduir/uHA71pGTBIYMwhV+
 pwvzl/S1BDKZLOjLTsWbWmS/VPXhPV3pXpzIwVRuN0MVL4AbqyxWcGcddewBQ5HZ
 qrO4Nj0aWPqiXRVUChOEkuX8Zp3V0p+hQdLnenuPhkmSrN0eLfkqwJD1qMcj5qhq
 /eGGY4Jtv44aoynpG08U6ISl10SsJICUzAeYHDD51+JCzeg4wytvTiOZYqdGSaor
 jA8Y4hDRfo4WPFuybId5DcEGOMvS/iRw9Sry6vcGyasYT9Otp6QxiKRv8CdnYSWM
 HsmRMBAD1ROLwMy1yhKin685NRj26QWF8K9pUFi6gS9VHrBk+ar0eA704s8Lz7j9
 krytZ8DEPc0tGGjKiCGzXVJ3RwYbIGYg7FeTlOKLbkRJbRr7k5dzao1UlSHJkq6q
 ExlcV4RKjvTHI7ZaOzHGovgOVS1lj23dBiYwkf2EO28eaoo0HnAyghusEkfIS3rY
 mkax4BTKrpbJ28Dp2/7hCp3/DgTF27GTHClaF9kqbkC2gxy6TPA=
 =1O1H
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc-fixes

i.MX fixes for 6.3:

- A couple of i.MX93 fixes from Alexander Stein to correct EQoS Ethernet
  properties.
- Correct clock-names of FlexSPI device in imx8-ss-lsio DT.
- Fix EQoS PHY reset GPIO by dropping the deprecated/wrong property and
  switch to the new bindings.
- Fix an issue with imx-weim bus driver that branch condition evaluates
  to a garbage value.
- Correct WM8960 clock name for imx8mm-nitrogen-r2 board.
- Fix LCDIF2 clocks for i.MX8MP DT.
- Add missing #sound-dai-cells properties to SAI nodes for i.MX8MN DT.
- Revert LS1028A DT changes of getting MAC addresses from VPD, as the
  dependency on NVMEM device is not in place.
- A series from Peng Fan to add missing pinctrl property for i.MX6SL
  based devices.

* tag 'imx-fixes-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: imx93: add missing #address-cells and #size-cells to i2c nodes
  bus: imx-weim: fix branch condition evaluates to a garbage value
  arm64: dts: imx8mn: specify #sound-dai-cells for SAI nodes
  ARM: dts: imx6sl: tolino-shine2hd: fix usbotg1 pinctrl
  ARM: dts: imx6sll: e60k02: fix usbotg1 pinctrl
  ARM: dts: imx6sll: e70k02: fix usbotg1 pinctrl
  arm64: dts: imx93: Fix eqos properties
  arm64: dts: imx8mp: Fix LCDIF2 node clock order
  arm64: dts: imx8mm-nitrogen-r2: fix WM8960 clock name
  arm64: dts: imx8dxl-evk: Fix eqos phy reset gpio
  Revert "arm64: dts: ls1028a: sl28: get MAC addresses from VPD"
  arm64: dts: freescale: imx8-ss-lsio: Fix flexspi clock order

Link: https://lore.kernel.org/r/20230315132814.GF143566@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-03-17 15:37:11 +01:00
Arnd Bergmann
e5bd100244 arm64: tegra: Device tree fixes for v6.3-rc1
This contains a fix for the CBB bus' ranges property on Tegra194 and
 Tegra234 that restores proper translation of PCI addresses.
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmQAbnYTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zodQnD/djNUyhMLIk8A6taw4G7JGYeiNxAG3L
 d+C8ljw6y0+0/fHCJhKUiXl78e0QoyRo556NeWrZxr/t89gCaS14j0uRw5CeDF7k
 zs1BNXFpFEfuh8nI5wYu1VGKz31AIWjTA3HcMaTL1VaMHPVf6oJu15ibzMwWuJgq
 oIusQE8FyFH3MM/S1hqeXnfmGqTcaqpujFcyZVQhZt8FFh8KPBkQyOW3bkf8THs6
 +Av9TcL9+E255TGd1I9jaX6IHBIoJuQHxLDszXmiVLMf5l47IYNvw7hfhP2F64ZU
 SbH3ljZLr5pfmBJygQt4pLO/5ZYtpkt72dGBE6KVaP30soqZ7P9sOog64jlPyy1G
 gfuifWhiU3/EJWDfMgIX+alXxHLT44q0i7g1atB0K4Z+yk09Yawh0ZSYVqbkYhtU
 azVAMgd6NYVRI/G+r7q9aLFIXhoB8sHAjIHJ8vLs0PpxCFFs05YXXVyEIYGDOEEZ
 1W82a+p5paDy8mYtsNQ0DDOyAsZaxA6KfVfkvIdjbZO/uiekBFbHTuqWnanlZVhe
 RUrbvY2QufsdmzWDJ3ZzUp8n5eNjXK07NHnNRbaK47FC6/PcriYIwJcisQb5bzaB
 xKiP0smdXnWwwo3/QSCvaubY/VWHo/t6ptMyeOslA8zcKnKI8GZ+wGV+D30NukSk
 F0JD3ce52BBt
 =37uO
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmQUeZoACgkQmmx57+YA
 GNn7Sg/+PFetujW8kOwJjViXGI2j4dMba+zK7EncyiO9MamUzUd5C4/CIvALFPJZ
 gp5hcFp38SxRPb6AKGdkA7zdVn7nmLZxazbFxe9Hkqv0azBcFrvWcGiVyxZs6zoO
 Ukp7/3sB/+ZIqvHYP1QPf/ErQGfm1nXkrbwpHu4NxKO/vxrR7GzGh8fdb0Y3fFfF
 H7WltHnwocBQSLO7UhgoPQAPqvLjhpsLgYgG+YLv723zDAIi6dQxdC1xrAHj/5b3
 T0zfWzizEfpDw+RBUWDW2qMTc8Z8b8vpqWmmSF0LkhiDA1A0+QztpHcLZJrLUM0T
 Xlrw8RKeaLsuR7v0amXu3hwXWiCj2xFMuEpIO7NBpZad9c60yacHbnqoIZJeO2J9
 NMZXvUOLWPJ+rsMtRgh6KwCxP6X2fdHwHatKTdwvferSaoR8z2TzFrf7rR+4cF2z
 9j38Czoq1X7kAIOjQyIki4xZsQmhqTjGifDcnzbeffL8bbCfSpa/pKuSFcy3smFP
 JomfLOsXw+2zm8Hth4GfxZXlX1W7yddh32zPbOjcXIMFaNdnOugeQrcxMmJtwMO8
 ghKkpQwYjROfmyAS5HimfK7pSvWKGBR9QwNeiWMZ2jqCeaPdrSBGVhT1RS6jg/+l
 UaLvMG30mn6N6upuQcxa7i8ZhDiNemnImYqVI35ea4gmtgNVMnA=
 =n0So
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-6.3-arm64-dt-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc-fixes

arm64: tegra: Device tree fixes for v6.3-rc1

This contains a fix for the CBB bus' ranges property on Tegra194 and
Tegra234 that restores proper translation of PCI addresses.

* tag 'tegra-for-6.3-arm64-dt-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Bump CBB ranges property on Tegra194 and Tegra234

Link: https://lore.kernel.org/r/20230302094213.3874449-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-03-17 15:30:50 +01:00
Alexander Stein
b3cdf73048 arm64: dts: imx93: add missing #address-cells and #size-cells to i2c nodes
Add them to the SoC .dtsi, so that not every board has to specify them.

Fixes: 1225396fef ("arm64: dts: imx93: add lpi2c nodes")
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14 14:55:17 +08:00
Marek Vasut
62fb54148c arm64: dts: imx8mn: specify #sound-dai-cells for SAI nodes
Add #sound-dai-cells properties to SAI nodes.

Reviewed-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Fixes: 9e98600697 ("arm64: dts: imx8mn: Add SAI nodes")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14 11:43:43 +08:00
Alexander Stein
194c3e7d7e arm64: dts: imx93: Fix eqos properties
'macirq' is supposed to be listed first. Also only 'snps,clk-csr' is
listed in the bindings while 'clk_csr' is only supported for legacy
reasons. See commit 83936ea8d8 ("net: stmmac: add a parse for new
property 'snps,clk-csr'")

Fixes: 1f4263ea6a ("arm64: dts: imx93: add eqos support")
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14 11:43:42 +08:00
Marek Vasut
1d0d5b917d arm64: dts: imx8mp: Fix LCDIF2 node clock order
The 'axi' clock are the bus APB clock, the 'disp_axi' clock are the
pixel data AXI clock. The naming is confusing. Fix the clock order.

Fixes: 94e6197dad ("arm64: dts: imx8mp: Add LCDIF2 & LDB nodes")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14 11:43:42 +08:00
Krzysztof Kozlowski
32f86da7c8 arm64: dts: imx8mm-nitrogen-r2: fix WM8960 clock name
The WM8960 Linux driver expects the clock to be named "mclk".  Otherwise
the clock will be ignored and not prepared/enabled by the driver.

Fixes: 40ba2eda0a ("arm64: dts: imx8mm-nitrogen-r2: add audio")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14 11:43:42 +08:00
Andrew Halaney
feafeb5314 arm64: dts: imx8dxl-evk: Fix eqos phy reset gpio
The deprecated property is named snps,reset-gpio, but this devicetree
used snps,reset-gpios instead which results in the reset not being used
and the following make dtbs_check error:

    ./arch/arm64/boot/dts/freescale/imx8dxl-evk.dtb: ethernet@5b050000: 'snps,reset-gpio' is a dependency of 'snps,reset-delays-us'
        From schema: ./Documentation/devicetree/bindings/net/snps,dwmac.yaml

Use the preferred method of defining the reset gpio in the phy node
itself. Note that this drops the 10 us pre-delay, but prior this wasn't
used at all and a pre-delay doesn't make much sense in this context so
it should be fine.

Fixes: 8dd495d123 ("arm64: dts: freescale: add support for i.MX8DXL EVK board")
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-14 08:57:38 +08:00
Marc Zyngier
47053904e1 KVM: arm64: timers: Convert per-vcpu virtual offset to a global value
Having a per-vcpu virtual offset is a pain. It needs to be synchronized
on each update, and expands badly to a setup where different timers can
have different offsets, or have composite offsets (as with NV).

So let's start by replacing the use of the CNTVOFF_EL2 shadow register
(which we want to reclaim for NV anyway), and make the virtual timer
carry a pointer to a VM-wide offset.

This simplifies the code significantly. It also addresses two terrible bugs:

- The use of CNTVOFF_EL2 leads to some nice offset corruption
  when the sysreg gets reset, as reported by Joey.

- The kvm mutex is taken from a vcpu ioctl, which goes against
  the locking rules...

Reported-by: Joey Gouly <joey.gouly@arm.com>
Reviewed-by: Reiji Watanabe <reijiw@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230224173915.GA17407@e124191.cambridge.arm.com
Tested-by: Joey Gouly <joey.gouly@arm.com>
Link: https://lore.kernel.org/r/20230224191640.3396734-1-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2023-03-11 02:00:40 -08:00
Ard Biesheuvel
3c66bb1918 arm64: efi: Set NX compat flag in PE/COFF header
The PE/COFF header has a NX compat flag which informs the firmware that
the application does not rely on memory regions being mapped with both
executable and writable permissions at the same time.

This is typically used by the firmware to decide whether it can set the
NX attribute on all allocations it returns, but going forward, it may be
used to enforce a policy that only permits applications with the NX flag
set to be loaded to begin wiht in some configurations, e.g., when Secure
Boot is in effect.

Even though the arm64 version of the EFI stub may relocate the kernel
before executing it, it always did so after disabling the MMU, and so we
were always in line with what the NX compat flag conveys, we just never
bothered to set it.

So let's set the flag now.

Cc: <stable@vger.kernel.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2023-03-10 14:11:40 +01:00
Manivannan Sadhasivam
ee1d5100c3 arm64: dts: qcom: sm8550: Mark UFS controller as cache coherent
The UFS controller on SM8550 supports cache coherency, hence add the
"dma-coherent" property to mark it as such.

Fixes: 35cf1aaab1 ("arm64: dts: qcom: sm8550: Add UFS host controller and phy nodes")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308054630.7202-1-manivannan.sadhasivam@linaro.org
2023-03-09 13:56:25 -08:00
Brian Masney
b891251b40 arm64: dts: qcom: sa8540p-ride: correct name of remoteproc_nsp0 firmware
The cdsp.mbn firmware that's referenced in sa8540p-ride.dts is actually
named cdsp0.mbn in the deliverables from Qualcomm. Let's go ahead and
correct the name to match what's in Qualcomm's deliverable.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230307232340.2370476-1-bmasney@redhat.com
2023-03-09 13:56:10 -08:00
Manivannan Sadhasivam
8ba961d433 arm64: dts: qcom: sm8450: Mark UFS controller as cache coherent
The UFS controller on SM8450 supports cache coherency, hence add the
"dma-coherent" property to mark it as such.

Fixes: 07fa917a33 ("arm64: dts: qcom: sm8450: add ufs nodes")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230307153201.180626-2-manivannan.sadhasivam@linaro.org
2023-03-09 13:10:53 -08:00
Manivannan Sadhasivam
e607b3c1fa arm64: dts: qcom: sm8350: Mark UFS controller as cache coherent
The UFS controller on SM8350 supports cache coherency, hence add the
"dma-coherent" property to mark it as such.

Fixes: 59c7cf8147 ("arm64: dts: qcom: sm8350: Add UFS nodes")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230307153201.180626-1-manivannan.sadhasivam@linaro.org
2023-03-09 13:10:53 -08:00
Krzysztof Kozlowski
a5982b3971 arm64: dts: qcom: sm8550: fix LPASS pinctrl slew base address
The second LPASS pin controller IO address is supposed to be the MCC
range which contains the slew rate registers.  The Linux driver then
accesses slew rate register with hard-coded offset (0xa000).  However
the DTS contained the address of slew rate register as the second IO
address, thus any reads were effectively pass the memory space and lead
to "Internal error: synchronous external aborts" when applying pin
configuration.

Fixes: 6de7f9c343 ("arm64: dts: qcom: sm8550: add GPR and LPASS pin controller")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230302154724.856062-1-krzysztof.kozlowski@linaro.org
2023-03-09 12:59:16 -08:00
Srinivas Kandagatla
2e498f35c3 arm64: dts: qcom: sc8280xp-x13s: fix va dmic dai links and routing
VA dmics 0, 1, 2 micbias on X13s are connected to WCD MICBIAS1, WCD MICBIAS1
and WCD MICBIAS3 respectively. Reflect this in dt to get dmics working.
Also fix dmics to go via VA Macro instead of TX macro to fix device switching.

Fixes: 8c1ea87e80b4 ("arm64: dts: qcom: sc8280xp-x13s: Add soundcard support")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230302115741.7726-5-srinivas.kandagatla@linaro.org
2023-03-09 12:58:56 -08:00
Srinivas Kandagatla
4def7aa377 arm64: dts: qcom: sc8280xp-x13s: fix dmic sample rate
The version of dmic that is on X13s panel supports clock frequency
of range 1 Mhz to 4.8 MHz for normal operation.

So correct the existing node to reflect this.

Fixes: 8c1ea87e80b4 ("arm64: dts: qcom: sc8280xp-x13s: Add soundcard support")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230302115741.7726-4-srinivas.kandagatla@linaro.org
2023-03-09 12:58:56 -08:00
Srinivas Kandagatla
e43bd22cb3 arm64: dts: qcom: sc8280xp: fix lpass tx macro clocks
Tx macro soundwire clock is for some reason is incorrectly assigned to
va macro, fix this and use tx macro clock instead.

Fixes: 1749a8ae49a3 ("arm64: dts: qcom: sc8280xp: add SoundWire and LPASS")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230302115741.7726-3-srinivas.kandagatla@linaro.org
2023-03-09 12:58:56 -08:00
Srinivas Kandagatla
670b7d6569 arm64: dts: qcom: sc8280xp: fix rx frame shapping info
Some of the SoundWire frameshapping data seems incorrect, fix these values.

Fixes: 1749a8ae49a3 ("arm64: dts: qcom: sc8280xp: add SoundWire and LPASS")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230302115741.7726-2-srinivas.kandagatla@linaro.org
2023-03-09 12:58:56 -08:00
Krzysztof Kozlowski
6df6fab932 arm64: dts: qcom: sm8450: correct WSA2 assigned clocks
The WSA2 assigned-clocks were copied from WSA, but the WSA2 uses its
own.

Fixes: 14341e76db ("arm64: dts: qcom: sm8450: add Soundwire and LPASS")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230308123129.232642-1-krzysztof.kozlowski@linaro.org
2023-03-09 12:13:41 -08:00
Krishna chaitanya chundru
8a63441e83 arm64: dts: qcom: sc7280: Mark PCIe controller as cache coherent
If the controller is not marked as cache coherent, then kernel will
try to ensure coherency during dma-ops and that may cause data corruption.
So, mark the PCIe node as dma-coherent as the devices on PCIe bus are
cache coherent.

Cc: stable@vger.kernel.org
Fixes: 92e0ee9f83 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related node")
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1677584952-17496-1-git-send-email-quic_krichai@quicinc.com
2023-03-06 20:17:10 -08:00
Yang Xiwen
eaba416688 arm64: dts: qcom: msm8916-ufi: Fix sim card selection pinctrl
The previous commit mistakenly introduced sim_ctrl_default as pinctrl,
this is incorrect, the interface for sim card selection varies between
different devices and should not be placed in the dtsi.

This commit selects external SIM card slot for ufi001c as default.
uf896 selects the correct SIM card slot automatically, thus does not need
this pinctrl node.

Fixes: faf6943146 ("arm64: dts: qcom: msm8916-thwc: Add initial device trees")
Signed-off-by: Yang Xiwen <forbidden405@foxmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/tencent_7036BCA256055D05F8C49D86DF7F0E2D1A05@qq.com
2023-03-06 20:14:09 -08:00
Jianhua Lu
052750a444 arm64: dts: qcom: sm8250-xiaomi-elish: Correct venus firmware path
Missing vendor name for venus firmware path. Add it.

Fixes: a41b617530 ("arm64: dts: qcom: sm8250: Add device tree for Xiaomi Mi Pad 5 Pro")
Signed-off-by: Jianhua Lu <lujianhua000@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230221123633.25145-1-lujianhua000@gmail.com
2023-03-06 15:21:36 -08:00
Konrad Dybcio
27072f2ffb arm64: dts: qcom: sm8550: Use correct CPU compatibles
Use the correct compatibles for the four kinds of CPU cores used on
SM8550, based on the value of their MIDR_EL1 registers:

CPU7: 0x411fd4e0 - CX3 r1p1
CPU5-6: 0x412fd470 - CA710 r?p?
CPU3-4: 0x411fd4d0 - CA715 r?p?
CPU0-2: 0x411fd461 - CA510 r?p?

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230216110803.3945747-2-konrad.dybcio@linaro.org
2023-03-06 15:21:36 -08:00
Abel Vesa
4059297ed0 arm64: dts: qcom: sm8550: Add bias pull up value to tlmm i2c data clk states
The default bias pull up value for the tlmm i2c data clk states is
2.2kOhms. Add this value to make sure the driver factors in the i2c pull
up bit when writing the config register.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230209074510.4153294-2-abel.vesa@linaro.org
2023-03-06 15:21:36 -08:00
Konrad Dybcio
11d5e41f5e arm64: dts: qcom: sm6375: Add missing power-domain-named to CDSP
This was omitted when first introducing the node. Fix it.

Fixes: fe6fd26aed ("arm64: dts: qcom: sm6375: Add ADSP&CDSP")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109135647.339224-5-konrad.dybcio@linaro.org
2023-03-06 15:21:36 -08:00
Konrad Dybcio
205c91fb6a arm64: dts: qcom: sm6115: Un-enable SPI5 by default
The commit mentioned in the fixes tag erroneously enabled SPI5
unconditionally. Undo it.

Fixes: 25aab0b852 ("arm64: dts: qcom: sm6115: Add geni debug uart node for qup0")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230216124921.3985834-1-konrad.dybcio@linaro.org
2023-03-06 15:21:36 -08:00
Manivannan Sadhasivam
8013295662 arm64: dts: qcom: sc8280xp: Add label property to vadc channel nodes
For uniquely identifying the vadc channels, label property has to be used.
The initial commit adding vadc support assumed that the driver will use the
unit address along with the node name to identify the channels. But this
assumption is now broken by,
commit 701c875ade ("iio: adc: qcom-spmi-adc5: Fix the channel name") that
stripped unit address from channel names. This results in probe failure of
the vadc driver:

[    8.380370] iio iio:device0: tried to double register : in_temp_pmic-die-temp_input
[    8.380383] qcom-spmi-adc5 c440000.spmi:pmic@0:adc@3100: Failed to register sysfs interfaces
[    8.380386] qcom-spmi-adc5: probe of c440000.spmi:pmic@0:adc@3100 failed with error -16

Hence, let's get rid of the assumption about drivers and rely on label
property to uniquely identify the channels.

The labels are derived from the schematics for each PMIC. For internal adc
channels such as die and xo, the PMIC names are used as a prefix.

Fixes: 7c01513474 ("arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} ADC_TM5 channels")
Fixes: 9d41cd1739 ("arm64: dts: qcom: sc8280xp-x13s: Add PMR735A VADC channel")
Fixes: 3375151a71 ("arm64: dts: qcom: sc8280xp-x13s: Add PM8280_{1/2} VADC channels")
Fixes: 9a6b3042c5 ("arm64: dts: qcom: sc8280xp-x13s: Add PMK8280 VADC channels")
Reported-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230211052415.14581-1-manivannan.sadhasivam@linaro.org
2023-03-06 15:21:35 -08:00
Manivannan Sadhasivam
672a58fc7c arm64: dts: qcom: sm8150: Fix the iommu mask used for PCIe controllers
The iommu mask should be 0x3f as per Qualcomm internal documentation.
Without the correct mask, the PCIe transactions from the endpoint will
result in SMMU faults. Hence, fix it!

Cc: stable@vger.kernel.org # 5.19
Fixes: a1c86c6805 ("arm64: dts: qcom: sm8150: Add PCIe nodes")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230224080045.6577-1-manivannan.sadhasivam@linaro.org
2023-03-06 15:21:35 -08:00
Michael Walle
916508c30e Revert "arm64: dts: ls1028a: sl28: get MAC addresses from VPD"
With commit b203e6f1e8 ("arm64: dts: ls1028a: sl28: get MAC addresses
from VPD"), the network adapter now depends on the nvmem device to be
present, which isn't the case and thus breaks networking on this board.
Revert it.

Fixes: b203e6f1e8 ("arm64: dts: ls1028a: sl28: get MAC addresses from VPD")
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-06 11:09:06 +08:00
Alexander Stein
fd4334a06d arm64: dts: freescale: imx8-ss-lsio: Fix flexspi clock order
The correct clock order is "fspi_en" and "fspi". As they are identical
just reordering the names is sufficient.

Fixes: 6276d66984 ("arm64: dts: imx8dxl: add flexspi0 support")
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-06 10:18:02 +08:00
Linus Torvalds
39ce4395c3 arm64 fixes:
- In copy_highpage(), only reset the tag of the destination pointer if
   KASAN_HW_TAGS is enabled so that user-space MTE does not interfere
   with KASAN_SW_TAGS (which relies on top-byte-ignore).
 
 - Remove warning if SME is detected without SVE, the kernel can cope
   with such configuration (though none in the field currently).
 
 - In cfi_handler(), pass the ESR_EL1 value to die() for consistency with
   other die() callers.
 
 - Disable HUGETLB_PAGE_OPTIMIZE_VMEMMAP on arm64 since the pte
   manipulation from the generic vmemmap_remap_pte() does not follow the
   required ARM break-before-make sequence (clear the pte, flush the
   TLBs, set the new pte). It may be re-enabled once this sequence is
   sorted.
 
 - Fix possible memory leak in the arm64 ACPI code if the SMCCC version
   and conduit checks fail.
 
 - Forbid CALL_OPS with CC_OPTIMIZE_FOR_SIZE since gcc ignores
   -falign-functions=N with -Os.
 
 - Don't pretend KASLR is enabled if offset < MIN_KIMG_ALIGN as no
   randomisation would actually take place.
 -----BEGIN PGP SIGNATURE-----
 
 iQIyBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmQBHFEACgkQa9axLQDI
 XvHf9Q/3Zg8o/8HchnWSvzgV//9ljGrrDfAjbfZHrE2W4PCniSd0op0uXYsVK3IH
 Nk6ZDiRe5uIXKgHuSq5caOoL4aRk0hk1TpQ3RKCuh8E3ybhQe9gwYm8xEWXDSSWh
 QzcfENsKlZLpuMoSMILJ2NlMPMbMLprXNCUlgENBbRT7KUToHZKTwE6BL2AUI3tg
 RdMntccorybxk1hiXV1YKT8482i+x2gAnylYXFsq3eI+G54rdfiks+tft0CQV3ng
 1/i1PfbnGC45sBoxXPqYXzBSUDNHpAqb5dwvtlVinGo3J6STxIvbM6Zi5Ma5hl3u
 QrhwyduwCTZ6wVOqzd4KAH9gmhJSzRG75OzCek2dTwU9KXVMOPEvp1ZfTwUXDx7J
 5j8UkjGgrbtj6IioGqBAO/HiFfoty8EBtmlSZIj0thwxkM73ZBG6efQOJaVWh85m
 ioUzMC2Y5yfKLfHEcy9yKIQVizMYoz6fl+QHOEbVSoFhJKNRc4wt5CCJCvsbMHsu
 K8rvD/CI9jFMP9GEK7ObTaC7ICjUz/+8wbIrRrm5ObRQ65Tm2zv3OLqGnK8O5O4W
 gcDEraTnSPHDUtgG6dAEPFN5Wi9hT3zYC0xAcNhc3aZC5ofS5RD6YXIWJvqjWrvL
 5k8G1gfa57C/hfxO6pPw7bg/nY8vvYpxUkZ9erRWD430g7y0Sg==
 =jfPa
 -----END PGP SIGNATURE-----

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:

 - In copy_highpage(), only reset the tag of the destination pointer if
   KASAN_HW_TAGS is enabled so that user-space MTE does not interfere
   with KASAN_SW_TAGS (which relies on top-byte-ignore).

 - Remove warning if SME is detected without SVE, the kernel can cope
   with such configuration (though none in the field currently).

 - In cfi_handler(), pass the ESR_EL1 value to die() for consistency
   with other die() callers.

 - Disable HUGETLB_PAGE_OPTIMIZE_VMEMMAP on arm64 since the pte
   manipulation from the generic vmemmap_remap_pte() does not follow the
   required ARM break-before-make sequence (clear the pte, flush the
   TLBs, set the new pte). It may be re-enabled once this sequence is
   sorted.

 - Fix possible memory leak in the arm64 ACPI code if the SMCCC version
   and conduit checks fail.

 - Forbid CALL_OPS with CC_OPTIMIZE_FOR_SIZE since gcc ignores
  -falign-functions=N with -Os.

 - Don't pretend KASLR is enabled if offset < MIN_KIMG_ALIGN as no
   randomisation would actually take place.

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: kaslr: don't pretend KASLR is enabled if offset < MIN_KIMG_ALIGN
  arm64: ftrace: forbid CALL_OPS with CC_OPTIMIZE_FOR_SIZE
  arm64: acpi: Fix possible memory leak of ffh_ctxt
  arm64: mm: hugetlb: Disable HUGETLB_PAGE_OPTIMIZE_VMEMMAP
  arm64: pass ESR_ELx to die() of cfi_handler
  arm64/fpsimd: Remove warning for SME without SVE
  arm64: Reset KASAN tag in copy_highpage with HW tags only
2023-03-02 14:57:53 -08:00
Thierry Reding
4bb54c2ce4 arm64: tegra: Bump CBB ranges property on Tegra194 and Tegra234
Both Xavier (Tegra194) and Orin (Tegra234) support a 40-bit address map,
so bump the CBB ranges property to cover all of the 1 TiB address space.
This fixes an issue where some of the PCIe regions could not be remapped
because of they were outside the memory specified by the CBB's ranges
property.

Reported-by: Jonathan Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-03-02 10:35:11 +01:00
Ard Biesheuvel
010338d729 arm64: kaslr: don't pretend KASLR is enabled if offset < MIN_KIMG_ALIGN
Our virtual KASLR displacement is a randomly chosen multiple of
2 MiB plus an offset that is equal to the physical placement modulo 2
MiB. This arrangement ensures that we can always use 2 MiB block
mappings (or contiguous PTE mappings for 16k or 64k pages) to map the
kernel.

This means that a KASLR offset of less than 2 MiB is simply the product
of this physical displacement, and no randomization has actually taken
place. Currently, we use 'kaslr_offset() > 0' to decide whether or not
randomization has occurred, and so we misidentify this case.

If the kernel image placement is not randomized, modules are allocated
from a dedicated region below the kernel mapping, which is only used for
modules and not for other vmalloc() or vmap() calls.

When randomization is enabled, the kernel image is vmap()'ed randomly
inside the vmalloc region, and modules are allocated in the vicinity of
this mapping to ensure that relative references are always in range.
However, unlike the dedicated module region below the vmalloc region,
this region is not reserved exclusively for modules, and so ordinary
vmalloc() calls may end up overlapping with it. This should rarely
happen, given that vmalloc allocates bottom up, although it cannot be
ruled out entirely.

The misidentified case results in a placement of the kernel image within
2 MiB of its default address. However, the logic that randomizes the
module region is still invoked, and this could result in the module
region overlapping with the start of the vmalloc region, instead of
using the dedicated region below it. If this happens, a single large
vmalloc() or vmap() call will use up the entire region, and leave no
space for loading modules after that.

Since commit 82046702e2 ("efi/libstub/arm64: Replace 'preferred'
offset with alignment check"), this is much more likely to occur on
systems that boot via EFI but lack an implementation of the EFI RNG
protocol, as in that case, the EFI stub will decide to leave the image
where it found it, and the EFI firmware uses 64k alignment only.

Fix this, by correctly identifying the case where the virtual
displacement is a result of the physical displacement only.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20230223204101.1500373-1-ardb@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2023-02-28 11:21:04 +00:00
Mark Rutland
b3f11af9b2 arm64: ftrace: forbid CALL_OPS with CC_OPTIMIZE_FOR_SIZE
Florian reports that when building with CONFIG_CC_OPTIMIZE_FOR_SIZE=y,
he sees "Misaligned patch-site" warnings at boot, e.g.

| Misaligned patch-site bcm2836_arm_irqchip_handle_irq+0x0/0x88
| WARNING: CPU: 0 PID: 0 at arch/arm64/kernel/ftrace.c:120 ftrace_call_adjust+0x4c/0x70

This is because GCC will silently ignore `-falign-functions=N` when
passed `-Os`, resulting in functions not being aligned as we expect.
This is a known issue, and to account for this we modified the kernel to
avoid `-Os` generally. Unfortunately we forgot to account for
CONFIG_CC_OPTIMIZE_FOR_SIZE.

Forbid the use of CALL_OPS with CONFIG_CC_OPTIMIZE_FOR_SIZE=y to prevent
this issue. All exising ftrace features will work as before, though
without the performance benefit of CALL_OPS.

Reported-by: Florian Fainelli <f.fainelli@gmail.com>
Link: http://lore.kernel.org/linux-arm-kernel/2d9284c3-3805-402b-5423-520ced56d047@gmail.com
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Will Deacon <will@kernel.org>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20230227115819.365630-1-mark.rutland@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2023-02-28 10:04:53 +00:00
Linus Torvalds
982818426a ARM: SoC fixes for 6.3, part 1
A few bugfixes already came up during the merge window. Samsung, ASpeed,
 Spear have minor DT changes, in case of Samsung this fixes a regression
 compared to earlier versions.
 
 Bartosz takes over as the primary maintainer for the TI DaVinci platform,
 and we get a few last minute defconfig changes.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmP835wACgkQmmx57+YA
 GNmqpRAAuXA8Vi+fRbMXxGqM33Ypt2ahog4JU44tiAqe7e3wzOfc+rV9BPkLWZdX
 enOepeK99w4suEjidodU181TRPSa3mpW/h08QZXccW1ZYSppzsnUKvLV+Q2JH4hl
 7b64/+LUlPSPv4wiKKtrm8WDDflChRzifAvYdHdGnRw+LVlK6GIrXfUhjOOR1k2W
 HoYwEsK0j3w8/tWo44vJi2wmIdgfh/Jbs3dh5s/TAT4KkB+Mwivo+t7p+0S0nKLO
 UR9rtJvhaKru+5my1oHCbV0o+KNQiHdC4Ue90FDY1uIoiCtJpzWsFhsZDeNSry/X
 Al8y5YTp1k6VUHsgG3O3BoOY8zjr+2DzKq5pxbq35fKdKSX1DSW72dA1UryySQmV
 33iFsJtAyhkth291Tsem0B3n39nQaQ0E/t7MID4jZRwCucJ0vhLwSIj+DmPY/C84
 vdilmwqcW+p5/dPaO+S1u40PuAzqwRp/GcREny/53TJd8beXKlYccz9B0BnuEQ76
 1ap/n8/TDO8L4bODb/1Wdah64yAlYyPC3PcxhWxsziFFB/fvlKWaygzfQ2yWGijF
 n2fnDjufF7SCScYjgE+0gThKYfZdEBkNKeQ+dYKiGlwgnzxSPcaYjo0FvY2tKE09
 y/aOxeFkBMfb10nk74u2+AjBNadUKP36jGsQWLJ9HZRhGecgWf8=
 =ECLF
 -----END PGP SIGNATURE-----

Merge tag 'arm-fixes-6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "A few bugfixes already came up during the merge window. Samsung,
  ASpeed, Spear have minor DT changes, in case of Samsung this fixes a
  regression compared to earlier versions.

  Bartosz takes over as the primary maintainer for the TI DaVinci
  platform, and we get a few last minute defconfig changes"

* tag 'arm-fixes-6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: dts: spear320-hmi: correct STMPE GPIO compatible
  ARM: dts: aspeed: p10bmc: Update battery node name
  arm64: defconfig: Add IOSCHED_BFQ to the default configs
  arm64: defconfig: Fix unintentional disablement of PCI on i.MX
  ARM: dts: exynos: correct TMU phandle in Odroid XU3 family
  ARM: dts: exynos: correct TMU phandle in Odroid HC1
  ARM: dts: exynos: correct TMU phandle in Odroid XU
  ARM: dts: exynos: correct TMU phandle in Exynos5250
  ARM: dts: exynos: correct TMU phandle in Exynos4210
  ARM: dts: exynos: correct TMU phandle in Exynos4
  MAINTAINERS: make me the maintainer of DaVinci platforms
2023-02-27 10:09:40 -08:00
Linus Walleij
e505e6bf42
arm64: defconfig: Add IOSCHED_BFQ to the default configs
ARM64 systems are often memory constrained and more often than not
use slow single-channel storage such as flash memory or MMC/SD-cards.
For any interactive systems (such as mobile phones, tablets,
chromebooks...) the BFQ I/O scheduler will be desireable.

Make sure the BFQ I/O scheduler is available on these systems.

ARM (32), Loongarch, MIPS, m68k, UM and S390 has also enabled BFQ in
their defconfigs, cf commit b495dfed70
"um: Cleanup CONFIG_IOSCHED_CFQ" where the motivation is that
it replaces the former CFQ scheduler.

Cc: linux-arm-kernel@lists.infradead.org
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Paolo Valente <paolo.valente@linaro.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230224135230.2295826-1-linus.walleij@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-02-27 14:45:55 +01:00
Mark Brown
0cd5780eb6
arm64: defconfig: Fix unintentional disablement of PCI on i.MX
A recent update to support PCI endpoint mode on i.MX platforms
unintentionally disabled PCI host support for i.MX in defconfig.  The
existing PCI_IMX6 was made a hidden option, selected by new options
PCI_IMX6_HOST (for the existing support) and PCI_IMX6_EP (for the
endpoint mode), but there has been no corresponding update to defconfig
so the PCI_IMX6 ends up getting disabled.  Switch defconfig to
PCI_IMX6_HOST to preserve the existing functionality.

Fixes: 75c2f26da0 ("PCI: imx6: Add i.MX PCIe EP mode support")
Reported-by: "kernelci.org bot" <bot@kernelci.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Link: https://lore.kernel.org/r/20230220-imx-pci-defconfig-v1-1-2210cf08340e@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-02-27 14:45:00 +01:00
Linus Torvalds
1ec35eadc3 We have one small patch to the clk core this time around. It fixes a corner
case with the CLK_OPS_PARENT_ENABLE flag combined with clk_core_is_enabled()
 where it hangs the system. We'll simply assume the clk is disabled if the
 parent is disabled and the flag is set. Trying to turn on the parent to check
 the enable state of the clk runs into system hangs at boot. We let this bake in
 -next for a couple weeks to make sure there aren't any more issues because the
 last attempt to fix this ran into hangs and had to be reverted.
 
 Note: There were some more patches to the core framework around sync_state and
 disabling unused clks, but I asked for that to be reverted from the qcom PR
 because it isn't ready and we're still discussing the best solution on the
 list.
 
 Outside of the core clk framework, we have the usual collection of clk driver
 updates and support for new SoCs (which seems to never stop). The dirstat is
 dominated by Qualcomm because they added support for quite a few SoCs this time
 around and also migrated quite a few of their drivers to clk_parent_data. The
 other big diff is in the Mediatek clk drivers that saw a significant rework
 this cycle to similarly modernize the code, and we'll see that work continue in
 the next cycle as well. Nothing really jumps out as scary here, except that the
 significant churn in parent data descriptions can have typos that go unnoticed.
 More details below.
 
 Core:
  - Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled()
 
 New Drivers:
  - Add a new clk-gpr-mux clock type and use it on i.MX6Q to add ENET ref
    clocks
  - Support for Mediatek MT7891 SoC clks
  - Support for many Qualcomm clk controllers:
    - QDU1000/QRU1000 global clock controller
    - SA8775P global clock controller
    - SM8550 TCSR and display clock controller
    - SM6350 clock controller
    - MSM8996 CBF and APCS clock controllers
 
 Updates:
  - Various cleanups and improvements to Mediatek clk drivers to reduce
    code size and modernize the drivers
  - Support for Versa 5P49V60 clks
  - Disable R-Car H3 ES1.*, as it was only available to an internal
    development group and needed a lot of quirks and workarounds
  - Add PWM, Compare-Match Timer (TIM), USB, SDHI, and eMMC clocks and
    resets on Renesas RZ/V2M
  - Add display clocks on Renesas R-Car V4H
  - Add Camera Receiving Unit (CRU) clocks and resets on Renesas RZ/G2L
  - Free the imx_uart_clocks even if imx_register_uart_clocks returns early
  - Get the stdout clocks count from device tree on i.MX
  - Drop the clock count argument from imx_register_uart_clocks()
  - Keep the uart clocks on i.MX93 for when earlycon is used
  - Fix SPDX comment in i.MX6SLL clocks bindings header
  - Drop some unnecessary spaces from i.MX8ULP clocks bindings header
  - Add imx_obtain_fixed_of_clock() for allowing to add a clock that is
    not configured via devicetree
  - Fix the ENET1 gate configuration for i.MX6UL according to the
    reference manual
  - Add ENET refclock mux support for i.MX6UL
  - Add support for USB host/device configuration on Renesas RZ/N1
  - Add PLL2 programming support, and CAN-FD clocks on Renesas R-Car V4H
  - Add D1 CAN bus gates and resets for Allwinner
  - Mark D1 CPUX clock as critical on Allwinner
  - Reuse D1 driver for Allwinner R528/T113
  - Cleanup sunxi-ng Kconfig
  - Fix sunxi-ng kernel-doc issues
  - Model Allwinner H3/H5 DRAM clock as fixed clock
  - Use .determine_rate() instead of .round_rate() for the dualdiv, mpll,
    sclk-div and cpu-dyn-div amlogic clock drivers
  - DDR clocks were marked as critical in the proper clock driver for each
    AT91 SoC such that drivers/memory/atmel-sdramc.c to be deleted
    in the next releases as it only does clock enablement
  - Patch to avoid compiling dt-compat.o for all AT91 SoCs as only some of
    them may use it
  - Support synchronous power_off requests in the qcom GDSC driver for proper
    GPU power collapse
  - Drop test clocks from various Qualcomm clk drivers
  - Update parent references to use clk_parent_data/clk_hw in various Qualcomm clk drivers
  - Fixes for the Qualcomm MSM8996 CPU clock controller
  - Transition Qualcomm MSM8974 GCC off the externally defined sleep_clk
  - Add GDSCs in the global clock controller for Qualcomm QCS404
  - The SDCC core clocks on Qualcomm SM6115 are moved to floor_ops
  - Programming of clk_dis_wait for GPU CX GDSC on Qualcomm SC7180 and SDM845 are
    moved to use the recently introduced properties in the GDSC struct
  - Qualcomm's RPMh clock driver gains SM8550 and SA8775P clocks, and the IPA clock
    is added on a variety of platforms
  - De-duplicate identical clks in Qualcomm SMD RPM clk driver
  - Add a few missing clocks across msm8998, msm8992, msm8916, qcs404 to
    Qualcomm SDM RPM clk driver
  - Various Qualcomm clk drivers use devm_pm_runtime_enable() to simplify
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmP5L68RHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSXLxRAAx5C2PBxGnQS5Dqy7yGFBKhoyM6MnD131
 4wsWunTzw/fx3MWTRUBu1FYq7ZN38dmeUNeKVNO7QkfIzXe/Htxa5DJp8oJjeFkA
 WBlJr/S9pnCKJ1+jGgnEJ3AL8rtssc2nasS8Gj66eu3Zs3dA1MlUz1M0wqiGeD/Y
 2crg1nowHurxhsmdUM+6sBRZsCoUz1DxAynqOK25Ip08ygBGYRdkk3aCoyx1bICF
 02RwSTQP9pGykgkO7BMkr1pA000mlcawXflzfbY0bA57GKvITBaXh3PhVWwsAnqk
 utagT3G2/mQNBF+DVX4Xr5rRqYttDeATiS2D0B31x68Ovjw6kaA28QoY19oIjc1p
 D7CabcPnrdK6JFimJL/uEnjIpVnMW2kbTAkTdgGFNKqYUC1O+Mm5ZscKo8RUaiQ7
 8XAgJXnGxG7RlZDIMCj69xiZBR0I0wgyx6E7sqMK5j4/v9ezhUMemj4u/sNe3R1n
 ih43L2vXjftAhl7jlGQb6eFQjPU/n8kf1rte5miJxX2vFBgWqiCfKHnVSe8KSNU+
 gqhar55G9ACnYBjqApmySd/7IFBzmJSyWujXg+fwIu0ZI5ir+ZPr+rQ7RkAUqMij
 QCPvJa6XlRIyl6j54E5GaSFO3ZDc3wAZEs3I2N4yhYTDUGv342G3YdwNU+b0ioHB
 bDW5Gec9u2s=
 =Fle/
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "We have one small patch to the clk core this time around. It fixes a
  corner case with the CLK_OPS_PARENT_ENABLE flag combined with
  clk_core_is_enabled() where it hangs the system. We'll simply assume
  the clk is disabled if the parent is disabled and the flag is set.
  Trying to turn on the parent to check the enable state of the clk runs
  into system hangs at boot. We let this bake in -next for a couple
  weeks to make sure there aren't any more issues because the last
  attempt to fix this ran into hangs and had to be reverted.

  Note: There were some more patches to the core framework around
  sync_state and disabling unused clks, but I asked for that to be
  reverted from the qcom PR because it isn't ready and we're still
  discussing the best solution on the list.

  Outside of the core clk framework, we have the usual collection of clk
  driver updates and support for new SoCs (which seems to never stop).
  The dirstat is dominated by Qualcomm because they added support for
  quite a few SoCs this time around and also migrated quite a few of
  their drivers to clk_parent_data. The other big diff is in the
  Mediatek clk drivers that saw a significant rework this cycle to
  similarly modernize the code, and we'll see that work continue in the
  next cycle as well. Nothing really jumps out as scary here, except
  that the significant churn in parent data descriptions can have typos
  that go unnoticed. More details below.

  Core:
   - Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled()

  New Drivers:
   - Add a new clk-gpr-mux clock type and use it on i.MX6Q to add ENET
     ref clocks
   - Support for Mediatek MT7891 SoC clks
   - Support for many Qualcomm clk controllers:
      - QDU1000/QRU1000 global clock controller
      - SA8775P global clock controller
      - SM8550 TCSR and display clock controller
      - SM6350 clock controller
      - MSM8996 CBF and APCS clock controllers

  Updates:
   - Various cleanups and improvements to Mediatek clk drivers to reduce
     code size and modernize the drivers
   - Support for Versa 5P49V60 clks
   - Disable R-Car H3 ES1.*, as it was only available to an internal
     development group and needed a lot of quirks and workarounds
   - Add PWM, Compare-Match Timer (TIM), USB, SDHI, and eMMC clocks and
     resets on Renesas RZ/V2M
   - Add display clocks on Renesas R-Car V4H
   - Add Camera Receiving Unit (CRU) clocks and resets on Renesas RZ/G2L
   - Free the imx_uart_clocks even if imx_register_uart_clocks returns
     early
   - Get the stdout clocks count from device tree on i.MX
   - Drop the clock count argument from imx_register_uart_clocks()
   - Keep the uart clocks on i.MX93 for when earlycon is used
   - Fix SPDX comment in i.MX6SLL clocks bindings header
   - Drop some unnecessary spaces from i.MX8ULP clocks bindings header
   - Add imx_obtain_fixed_of_clock() for allowing to add a clock that is
     not configured via devicetree
   - Fix the ENET1 gate configuration for i.MX6UL according to the
     reference manual
   - Add ENET refclock mux support for i.MX6UL
   - Add support for USB host/device configuration on Renesas RZ/N1
   - Add PLL2 programming support, and CAN-FD clocks on Renesas R-Car
     V4H
   - Add D1 CAN bus gates and resets for Allwinner
   - Mark D1 CPUX clock as critical on Allwinner
   - Reuse D1 driver for Allwinner R528/T113
   - Cleanup sunxi-ng Kconfig
   - Fix sunxi-ng kernel-doc issues
   - Model Allwinner H3/H5 DRAM clock as fixed clock
   - Use .determine_rate() instead of .round_rate() for the dualdiv,
     mpll, sclk-div and cpu-dyn-div amlogic clock drivers
   - DDR clocks were marked as critical in the proper clock driver for
     each AT91 SoC such that drivers/memory/atmel-sdramc.c to be deleted
     in the next releases as it only does clock enablement
   - Patch to avoid compiling dt-compat.o for all AT91 SoCs as only some
     of them may use it
   - Support synchronous power_off requests in the qcom GDSC driver for
     proper GPU power collapse
   - Drop test clocks from various Qualcomm clk drivers
   - Update parent references to use clk_parent_data/clk_hw in various
     Qualcomm clk drivers
   - Fixes for the Qualcomm MSM8996 CPU clock controller
   - Transition Qualcomm MSM8974 GCC off the externally defined
     sleep_clk
   - Add GDSCs in the global clock controller for Qualcomm QCS404
   - The SDCC core clocks on Qualcomm SM6115 are moved to floor_ops
   - Programming of clk_dis_wait for GPU CX GDSC on Qualcomm SC7180 and
     SDM845 are moved to use the recently introduced properties in the
     GDSC struct
   - Qualcomm's RPMh clock driver gains SM8550 and SA8775P clocks, and
     the IPA clock is added on a variety of platforms
   - De-duplicate identical clks in Qualcomm SMD RPM clk driver
   - Add a few missing clocks across msm8998, msm8992, msm8916, qcs404
     to Qualcomm SDM RPM clk driver
   - Various Qualcomm clk drivers use devm_pm_runtime_enable() to
     simplify"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (228 commits)
  clk: qcom: apcs-msm8986: Include bitfield.h for FIELD_PREP
  clk: qcom: Revert sync_state based clk_disable_unused
  clk: imx: pll14xx: fix recalc_rate for negative kdiv
  clk: rs9: Drop unused pin_xin field
  MAINTAINERS: clk: imx: Add Peng Fan as reviewer
  clk: sprd: Add dependency for SPRD_UMS512_CLK
  clk: ralink: fix 'mt7621_gate_is_enabled()' function
  clk: mediatek: clk-mtk: Remove unneeded semicolon
  dt-bindings: clock: remove stih416 bindings
  dt-bindings: clock: add loongson-2 clock
  dt-bindings: clock: add loongson-2 clock include file
  clk: imx: fix compile testing imxrt1050
  clk: Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled()
  clk: imx: set imx_clk_gpr_mux_ops storage-class-specifier to static
  clk: renesas: rcar-gen3: Disable R-Car H3 ES1.*
  dt-bindings: clock: Merge qcom,gpucc-sm8350 into qcom,gpucc.yaml
  clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC
  clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC
  dt-bindings: clock: qcom,sa8775p-gcc: add the power-domains property
  clk: qcom: cpu-8996: add missing cputype include
  ...
2023-02-25 15:16:23 -08:00
Linus Torvalds
49d5759268 ARM:
- Provide a virtual cache topology to the guest to avoid
   inconsistencies with migration on heterogenous systems. Non secure
   software has no practical need to traverse the caches by set/way in
   the first place.
 
 - Add support for taking stage-2 access faults in parallel. This was an
   accidental omission in the original parallel faults implementation,
   but should provide a marginal improvement to machines w/o FEAT_HAFDBS
   (such as hardware from the fruit company).
 
 - A preamble to adding support for nested virtualization to KVM,
   including vEL2 register state, rudimentary nested exception handling
   and masking unsupported features for nested guests.
 
 - Fixes to the PSCI relay that avoid an unexpected host SVE trap when
   resuming a CPU when running pKVM.
 
 - VGIC maintenance interrupt support for the AIC
 
 - Improvements to the arch timer emulation, primarily aimed at reducing
   the trap overhead of running nested.
 
 - Add CONFIG_USERFAULTFD to the KVM selftests config fragment in the
   interest of CI systems.
 
 - Avoid VM-wide stop-the-world operations when a vCPU accesses its own
   redistributor.
 
 - Serialize when toggling CPACR_EL1.SMEN to avoid unexpected exceptions
   in the host.
 
 - Aesthetic and comment/kerneldoc fixes
 
 - Drop the vestiges of the old Columbia mailing list and add [Oliver]
   as co-maintainer
 
 This also drags in arm64's 'for-next/sme2' branch, because both it and
 the PSCI relay changes touch the EL2 initialization code.
 
 RISC-V:
 
 - Fix wrong usage of PGDIR_SIZE instead of PUD_SIZE
 
 - Correctly place the guest in S-mode after redirecting a trap to the guest
 
 - Redirect illegal instruction traps to guest
 
 - SBI PMU support for guest
 
 s390:
 
 - Two patches sorting out confusion between virtual and physical
   addresses, which currently are the same on s390.
 
 - A new ioctl that performs cmpxchg on guest memory
 
 - A few fixes
 
 x86:
 
 - Change tdp_mmu to a read-only parameter
 
 - Separate TDP and shadow MMU page fault paths
 
 - Enable Hyper-V invariant TSC control
 
 - Fix a variety of APICv and AVIC bugs, some of them real-world,
   some of them affecting architecurally legal but unlikely to
   happen in practice
 
 - Mark APIC timer as expired if its in one-shot mode and the count
   underflows while the vCPU task was being migrated
 
 - Advertise support for Intel's new fast REP string features
 
 - Fix a double-shootdown issue in the emergency reboot code
 
 - Ensure GIF=1 and disable SVM during an emergency reboot, i.e. give SVM
   similar treatment to VMX
 
 - Update Xen's TSC info CPUID sub-leaves as appropriate
 
 - Add support for Hyper-V's extended hypercalls, where "support" at this
   point is just forwarding the hypercalls to userspace
 
 - Clean up the kvm->lock vs. kvm->srcu sequences when updating the PMU and
   MSR filters
 
 - One-off fixes and cleanups
 
 - Fix and cleanup the range-based TLB flushing code, used when KVM is
   running on Hyper-V
 
 - Add support for filtering PMU events using a mask.  If userspace
   wants to restrict heavily what events the guest can use, it can now
   do so without needing an absurd number of filter entries
 
 - Clean up KVM's handling of "PMU MSRs to save", especially when vPMU
   support is disabled
 
 - Add PEBS support for Intel Sapphire Rapids
 
 - Fix a mostly benign overflow bug in SEV's send|receive_update_data()
 
 - Move several SVM-specific flags into vcpu_svm
 
 x86 Intel:
 
 - Handle NMI VM-Exits before leaving the noinstr region
 
 - A few trivial cleanups in the VM-Enter flows
 
 - Stop enabling VMFUNC for L1 purely to document that KVM doesn't support
   EPTP switching (or any other VM function) for L1
 
 - Fix a crash when using eVMCS's enlighted MSR bitmaps
 
 Generic:
 
 - Clean up the hardware enable and initialization flow, which was
   scattered around multiple arch-specific hooks.  Instead, just
   let the arch code call into generic code.  Both x86 and ARM should
   benefit from not having to fight common KVM code's notion of how
   to do initialization.
 
 - Account allocations in generic kvm_arch_alloc_vm()
 
 - Fix a memory leak if coalesced MMIO unregistration fails
 
 selftests:
 
 - On x86, cache the CPU vendor (AMD vs. Intel) and use the info to emit
   the correct hypercall instruction instead of relying on KVM to patch
   in VMMCALL
 
 - Use TAP interface for kvm_binary_stats_test and tsc_msrs_test
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmP2YA0UHHBib256aW5p
 QHJlZGhhdC5jb20ACgkQv/vSX3jHroPg/Qf+J6nT+TkIa+8Ei+fN1oMTDp4YuIOx
 mXvJ9mRK9sQ+tAUVwvDz3qN/fK5mjsYbRHIDlVc5p2Q3bCrVGDDqXPFfCcLx1u+O
 9U9xjkO4JxD2LS9pc70FYOyzVNeJ8VMGOBbC2b0lkdYZ4KnUc6e/WWFKJs96bK+H
 duo+RIVyaMthnvbTwSv1K3qQb61n6lSJXplywS8KWFK6NZAmBiEFDAWGRYQE9lLs
 VcVcG0iDJNL/BQJ5InKCcvXVGskcCm9erDszPo7w4Bypa4S9AMS42DHUaRZrBJwV
 /WqdH7ckIz7+OSV0W1j+bKTHAFVTCjXYOM7wQykgjawjICzMSnnG9Gpskw==
 =goe1
 -----END PGP SIGNATURE-----

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull kvm updates from Paolo Bonzini:
 "ARM:

   - Provide a virtual cache topology to the guest to avoid
     inconsistencies with migration on heterogenous systems. Non secure
     software has no practical need to traverse the caches by set/way in
     the first place

   - Add support for taking stage-2 access faults in parallel. This was
     an accidental omission in the original parallel faults
     implementation, but should provide a marginal improvement to
     machines w/o FEAT_HAFDBS (such as hardware from the fruit company)

   - A preamble to adding support for nested virtualization to KVM,
     including vEL2 register state, rudimentary nested exception
     handling and masking unsupported features for nested guests

   - Fixes to the PSCI relay that avoid an unexpected host SVE trap when
     resuming a CPU when running pKVM

   - VGIC maintenance interrupt support for the AIC

   - Improvements to the arch timer emulation, primarily aimed at
     reducing the trap overhead of running nested

   - Add CONFIG_USERFAULTFD to the KVM selftests config fragment in the
     interest of CI systems

   - Avoid VM-wide stop-the-world operations when a vCPU accesses its
     own redistributor

   - Serialize when toggling CPACR_EL1.SMEN to avoid unexpected
     exceptions in the host

   - Aesthetic and comment/kerneldoc fixes

   - Drop the vestiges of the old Columbia mailing list and add [Oliver]
     as co-maintainer

  RISC-V:

   - Fix wrong usage of PGDIR_SIZE instead of PUD_SIZE

   - Correctly place the guest in S-mode after redirecting a trap to the
     guest

   - Redirect illegal instruction traps to guest

   - SBI PMU support for guest

  s390:

   - Sort out confusion between virtual and physical addresses, which
     currently are the same on s390

   - A new ioctl that performs cmpxchg on guest memory

   - A few fixes

  x86:

   - Change tdp_mmu to a read-only parameter

   - Separate TDP and shadow MMU page fault paths

   - Enable Hyper-V invariant TSC control

   - Fix a variety of APICv and AVIC bugs, some of them real-world, some
     of them affecting architecurally legal but unlikely to happen in
     practice

   - Mark APIC timer as expired if its in one-shot mode and the count
     underflows while the vCPU task was being migrated

   - Advertise support for Intel's new fast REP string features

   - Fix a double-shootdown issue in the emergency reboot code

   - Ensure GIF=1 and disable SVM during an emergency reboot, i.e. give
     SVM similar treatment to VMX

   - Update Xen's TSC info CPUID sub-leaves as appropriate

   - Add support for Hyper-V's extended hypercalls, where "support" at
     this point is just forwarding the hypercalls to userspace

   - Clean up the kvm->lock vs. kvm->srcu sequences when updating the
     PMU and MSR filters

   - One-off fixes and cleanups

   - Fix and cleanup the range-based TLB flushing code, used when KVM is
     running on Hyper-V

   - Add support for filtering PMU events using a mask. If userspace
     wants to restrict heavily what events the guest can use, it can now
     do so without needing an absurd number of filter entries

   - Clean up KVM's handling of "PMU MSRs to save", especially when vPMU
     support is disabled

   - Add PEBS support for Intel Sapphire Rapids

   - Fix a mostly benign overflow bug in SEV's
     send|receive_update_data()

   - Move several SVM-specific flags into vcpu_svm

  x86 Intel:

   - Handle NMI VM-Exits before leaving the noinstr region

   - A few trivial cleanups in the VM-Enter flows

   - Stop enabling VMFUNC for L1 purely to document that KVM doesn't
     support EPTP switching (or any other VM function) for L1

   - Fix a crash when using eVMCS's enlighted MSR bitmaps

  Generic:

   - Clean up the hardware enable and initialization flow, which was
     scattered around multiple arch-specific hooks. Instead, just let
     the arch code call into generic code. Both x86 and ARM should
     benefit from not having to fight common KVM code's notion of how to
     do initialization

   - Account allocations in generic kvm_arch_alloc_vm()

   - Fix a memory leak if coalesced MMIO unregistration fails

  selftests:

   - On x86, cache the CPU vendor (AMD vs. Intel) and use the info to
     emit the correct hypercall instruction instead of relying on KVM to
     patch in VMMCALL

   - Use TAP interface for kvm_binary_stats_test and tsc_msrs_test"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (325 commits)
  KVM: SVM: hyper-v: placate modpost section mismatch error
  KVM: x86/mmu: Make tdp_mmu_allowed static
  KVM: arm64: nv: Use reg_to_encoding() to get sysreg ID
  KVM: arm64: nv: Only toggle cache for virtual EL2 when SCTLR_EL2 changes
  KVM: arm64: nv: Filter out unsupported features from ID regs
  KVM: arm64: nv: Emulate EL12 register accesses from the virtual EL2
  KVM: arm64: nv: Allow a sysreg to be hidden from userspace only
  KVM: arm64: nv: Emulate PSTATE.M for a guest hypervisor
  KVM: arm64: nv: Add accessors for SPSR_EL1, ELR_EL1 and VBAR_EL1 from virtual EL2
  KVM: arm64: nv: Handle SMCs taken from virtual EL2
  KVM: arm64: nv: Handle trapped ERET from virtual EL2
  KVM: arm64: nv: Inject HVC exceptions to the virtual EL2
  KVM: arm64: nv: Support virtual EL2 exceptions
  KVM: arm64: nv: Handle HCR_EL2.NV system register traps
  KVM: arm64: nv: Add nested virt VCPU primitives for vEL2 VCPU state
  KVM: arm64: nv: Add EL2 system registers to vcpu context
  KVM: arm64: nv: Allow userspace to set PSR_MODE_EL2x
  KVM: arm64: nv: Reset VCPU to EL2 registers if VCPU nested virt is set
  KVM: arm64: nv: Introduce nested virtualization VCPU feature
  KVM: arm64: Use the S2 MMU context to iterate over S2 table
  ...
2023-02-25 11:30:21 -08:00
Linus Torvalds
a93e884edf Driver core changes for 6.3-rc1
Here is the large set of driver core changes for 6.3-rc1.
 
 There's a lot of changes this development cycle, most of the work falls
 into two different categories:
   - fw_devlink fixes and updates.  This has gone through numerous review
     cycles and lots of review and testing by lots of different devices.
     Hopefully all should be good now, and Saravana will be keeping a
     watch for any potential regression on odd embedded systems.
   - driver core changes to work to make struct bus_type able to be moved
     into read-only memory (i.e. const)  The recent work with Rust has
     pointed out a number of areas in the driver core where we are
     passing around and working with structures that really do not have
     to be dynamic at all, and they should be able to be read-only making
     things safer overall.  This is the contuation of that work (started
     last release with kobject changes) in moving struct bus_type to be
     constant.  We didn't quite make it for this release, but the
     remaining patches will be finished up for the release after this
     one, but the groundwork has been laid for this effort.
 
 Other than that we have in here:
   - debugfs memory leak fixes in some subsystems
   - error path cleanups and fixes for some never-able-to-be-hit
     codepaths.
   - cacheinfo rework and fixes
   - Other tiny fixes, full details are in the shortlog
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCY/ipdg8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ynL3gCgwzbcWu0So3piZyLiJKxsVo9C2EsAn3sZ9gN6
 6oeFOjD3JDju3cQsfGgd
 =Su6W
 -----END PGP SIGNATURE-----

Merge tag 'driver-core-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core updates from Greg KH:
 "Here is the large set of driver core changes for 6.3-rc1.

  There's a lot of changes this development cycle, most of the work
  falls into two different categories:

   - fw_devlink fixes and updates. This has gone through numerous review
     cycles and lots of review and testing by lots of different devices.
     Hopefully all should be good now, and Saravana will be keeping a
     watch for any potential regression on odd embedded systems.

   - driver core changes to work to make struct bus_type able to be
     moved into read-only memory (i.e. const) The recent work with Rust
     has pointed out a number of areas in the driver core where we are
     passing around and working with structures that really do not have
     to be dynamic at all, and they should be able to be read-only
     making things safer overall. This is the contuation of that work
     (started last release with kobject changes) in moving struct
     bus_type to be constant. We didn't quite make it for this release,
     but the remaining patches will be finished up for the release after
     this one, but the groundwork has been laid for this effort.

  Other than that we have in here:

   - debugfs memory leak fixes in some subsystems

   - error path cleanups and fixes for some never-able-to-be-hit
     codepaths.

   - cacheinfo rework and fixes

   - Other tiny fixes, full details are in the shortlog

  All of these have been in linux-next for a while with no reported
  problems"

[ Geert Uytterhoeven points out that that last sentence isn't true, and
  that there's a pending report that has a fix that is queued up - Linus ]

* tag 'driver-core-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (124 commits)
  debugfs: drop inline constant formatting for ERR_PTR(-ERROR)
  OPP: fix error checking in opp_migrate_dentry()
  debugfs: update comment of debugfs_rename()
  i3c: fix device.h kernel-doc warnings
  dma-mapping: no need to pass a bus_type into get_arch_dma_ops()
  driver core: class: move EXPORT_SYMBOL_GPL() lines to the correct place
  Revert "driver core: add error handling for devtmpfs_create_node()"
  Revert "devtmpfs: add debug info to handle()"
  Revert "devtmpfs: remove return value of devtmpfs_delete_node()"
  driver core: cpu: don't hand-override the uevent bus_type callback.
  devtmpfs: remove return value of devtmpfs_delete_node()
  devtmpfs: add debug info to handle()
  driver core: add error handling for devtmpfs_create_node()
  driver core: bus: update my copyright notice
  driver core: bus: add bus_get_dev_root() function
  driver core: bus: constify bus_unregister()
  driver core: bus: constify some internal functions
  driver core: bus: constify bus_get_kset()
  driver core: bus: constify bus_register/unregister_notifier()
  driver core: remove private pointer from struct bus_type
  ...
2023-02-24 12:58:55 -08:00
Linus Torvalds
17cd4d6f05 TTY/Serial driver updates for 6.3-rc1
Here is the big set of serial and tty driver updates for 6.3-rc1.
 
 Once again, Jiri and Ilpo have done a number of core vt and tty/serial
 layer cleanups that were much needed and appreciated.  Other than that,
 it's just a bunch of little tty/serial driver updates:
   - qcom-geni-serial driver updates
   - liteuart driver updates
   - hvcs driver cleanups
   - n_gsm updates and additions for new features
   - more 8250 device support added
   - fpga/dfl update and additions
   - imx serial driver updates
   - fsl_lpuart updates
   - other tiny fixes and updates for serial drivers
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCY/itAw8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ykJbQCfWv/J4ZElO108iHBU5mJCDagUDBgAnAtLLN6A
 SEAnnokGCDtA/BNIXeES
 =luRi
 -----END PGP SIGNATURE-----

Merge tag 'tty-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull tty / serial driver updates from Greg KH:
 "Here is the big set of serial and tty driver updates for 6.3-rc1.

  Once again, Jiri and Ilpo have done a number of core vt and tty/serial
  layer cleanups that were much needed and appreciated. Other than that,
  it's just a bunch of little tty/serial driver updates:

   - qcom-geni-serial driver updates

   - liteuart driver updates

   - hvcs driver cleanups

   - n_gsm updates and additions for new features

   - more 8250 device support added

   - fpga/dfl update and additions

   - imx serial driver updates

   - fsl_lpuart updates

   - other tiny fixes and updates for serial drivers

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'tty-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (143 commits)
  tty: n_gsm: add keep alive support
  serial: imx: remove a redundant check
  dt-bindings: serial: snps-dw-apb-uart: add dma & dma-names properties
  soc: qcom: geni-se: Move qcom-geni-se.h to linux/soc/qcom/geni-se.h
  tty: n_gsm: add TIOCMIWAIT support
  tty: n_gsm: add RING/CD control support
  tty: n_gsm: mark unusable ioctl structure fields accordingly
  serial: imx: get rid of registers shadowing
  serial: imx: refine local variables in rxint()
  serial: imx: stop using USR2 in FIFO reading loop
  serial: imx: remove redundant USR2 read from FIFO reading loop
  serial: imx: do not break from FIFO reading loop prematurely
  serial: imx: do not sysrq broken chars
  serial: imx: work-around for hardware RX flood
  serial: imx: factor-out common code to imx_uart_soft_reset()
  serial: 8250_pci1xxxx: Add power management functions to quad-uart driver
  serial: 8250_pci1xxxx: Add RS485 support to quad-uart driver
  serial: 8250_pci1xxxx: Add driver for quad-uart support
  serial: 8250_pci: Add serial8250_pci_setup_port definition in 8250_pcilib.c
  tty: pcn_uart: fix memory leak with using debugfs_lookup()
  ...
2023-02-24 12:17:14 -08:00
Linus Torvalds
72bffe7e1e USB / Thunderbolt driver changes for 6.3-rc1
Here is the big set of USB and Thunderbolt driver changes for 6.3-rc1.
 
 Nothing major in here, just lots of good development, including:
   - Thunderbolt additions for new device support and features
   - xhci driver updates and cleanups
   - USB gadget media driver updates (includes media core changes that
     were acked by the v4l2 maintainers)
   - lots of other USB gadget driver updates for new features
   - dwc3 driver updates and fixes
   - minor debugfs leak fixes
   - typec driver updates and additions
   - dt-bindings conversions to yaml
   - other small bugfixes and driver updates
 
 All have been in linux-next for a while with no reported issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCY/ivpQ8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ymkdQCeOS6N613eggYrXwnbjJhxMQDtKAcAmweK6kXh
 3o1IKOYqIMOx5E7zxn6W
 =7ajf
 -----END PGP SIGNATURE-----

Merge tag 'usb-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB / Thunderbolt driver updates from Greg KH:
 "Here is the big set of USB and Thunderbolt driver changes for 6.3-rc1.

  Nothing major in here, just lots of good development, including:

   - Thunderbolt additions for new device support and features

   - xhci driver updates and cleanups

   - USB gadget media driver updates (includes media core changes that
     were acked by the v4l2 maintainers)

   - lots of other USB gadget driver updates for new features

   - dwc3 driver updates and fixes

   - minor debugfs leak fixes

   - typec driver updates and additions

   - dt-bindings conversions to yaml

   - other small bugfixes and driver updates

  All have been in linux-next for a while with no reported issues"

* tag 'usb-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (237 commits)
  usb: dwc3: xilinx: Remove unused of_gpio,h
  usb: typec: pd: Add higher capability sysfs for sink PDO
  usb: typec: pd: Remove usb_suspend_supported sysfs from sink PDO
  usb: dwc3: pci: add support for the Intel Meteor Lake-M
  usb: gadget: u_ether: Don't warn in gether_setup_name_default()
  usb: gadget: u_ether: Convert prints to device prints
  usb: gadget: u_serial: Add null pointer check in gserial_resume
  usb: gadget: uvc: fix missing mutex_unlock() if kstrtou8() fails
  xhci: host: potential NULL dereference in xhci_generic_plat_probe()
  dt-bindings: usb: amlogic,meson-g12a-usb-ctrl: make G12A usb3-phy0 optional
  usb: host: fsl-mph-dr-of: reuse device_set_of_node_from_dev
  of: device: Do not ignore error code in of_device_uevent_modalias
  of: device: Ignore modalias of reused nodes
  usb: gadget: configfs: Fix set but not used variable warning
  usb: gadget: uvc: Use custom strings if available
  usb: gadget: uvc: Allow linking function to string descs
  usb: gadget: uvc: Pick up custom string descriptor IDs
  usb: gadget: uvc: Allow linking XUs to string descriptors
  usb: gadget: configfs: Attach arbitrary strings to cdev
  usb: gadget: configfs: Support arbitrary string descriptors
  ...
2023-02-24 12:07:00 -08:00