Xing Zheng 3770821fa3 clk: rockchip: fix incorrect rk3399 spdif-DPTX divider bits ... The CLKSEL_CON32 bit_0 is controlled for spdif_8ch, not spdif_rec_dptx, it should be bit_8, let's fix it. Fixes: 115510053e ("clk: rockchip: add clock controller for the RK3399") Reported-by: Chris Zhong <zyw@rock-chips.com> Tested-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Cc: stable@vger.kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>		2016-07-01 01:50:17 +02:00
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clk-cpu.c	clk: rockchip: allow varying mux parameters for cpuclk pll-sources	2016-03-27 13:03:33 +02:00
clk-inverter.c	clk: rockchip: don't return NULL when registering inverter fails	2016-02-15 23:35:20 +01:00
clk-mmc-phase.c	clk: rockchip: fix checkpatch warning in core code	2016-04-20 09:53:39 +02:00
clk-pll.c	clk: rockchip: drop old_rate calculation on pll rate changes	2016-05-09 16:04:39 +02:00
clk-rk3036.c	clk: rockchip: release io resource when failing to init clk	2016-03-27 13:03:35 +02:00
clk-rk3188.c	clk: rockchip: release io resource when failing to init clk	2016-03-27 13:03:35 +02:00
clk-rk3228.c	clk: rockchip: export rk3228 MAC clocks	2016-07-01 01:50:11 +02:00
clk-rk3288.c	clk: rockchip: release io resource when failing to init clk	2016-03-27 13:03:35 +02:00
clk-rk3368.c	clk: rockchip: release io resource when failing to init clk	2016-03-27 13:03:35 +02:00
clk-rk3399.c	clk: rockchip: fix incorrect rk3399 spdif-DPTX divider bits	2016-07-01 01:50:17 +02:00
clk-rockchip.c
clk.c	clk: rockchip: simplify GRF handling in pll clocks	2016-05-09 16:04:15 +02:00
clk.h	clk: rockchip: simplify GRF handling in pll clocks	2016-05-09 16:04:15 +02:00
Makefile	clk: rockchip: add clock controller for the RK3399	2016-03-28 14:57:07 +02:00
softrst.c	clk: rockchip: Make reset_control_ops const	2016-03-29 16:29:46 -07:00