The casting from int to long on 64-bit platform is error prone.
Replace it with proper type of the variable on stack.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Moorestown and Medfield are quite old Intel Atom based
32-bit platforms, which were in limited use in some Android phones,
tablets and consumer electronics more than eight years ago.
There are no bugs or problems ever reported outside from Intel
for breaking any of that platforms for years. It seems no real
users exists who run more or less fresh kernel on it. The commit
05f4434bc1 ("ASoC: Intel: remove mfld_machine") also in align
with this theory.
Due to above and to reduce a burden of supporting outdated drivers
we remove the support of outdated platforms completely.
Moreover this code duplicates gpio-pxa since the IP has been derived
from XScale implementation. If anybody wants to resurrect this
it has to be part of gpio-pxa.c.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Intel Moorestown and Medfield are quite old Intel Atom based
32-bit platforms, which were in limited use in some Android phones,
tablets and consumer electronics more than eight years ago.
There are no bugs or problems ever reported outside from Intel
for breaking any of that platforms for years. It seems no real
users exists who run more or less fresh kernel on it. The commit
05f4434bc1 ("ASoC: Intel: remove mfld_machine") also in align
with this theory.
Due to above and to reduce a burden of supporting outdated drivers
we remove the support of outdated platforms completely.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Instead of doing it in place, convert GPIO_LOOKUP_IDX() and GPIO_HOG()
to be compund literals that's allow to use them as rvalue in assignments.
Due to above conversion, use compound literal from the header
in the gpio-aggregator.c.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
We already have a nice helper called get_options() which can be used
to validate the input format. Replace isrange() by using it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Allow get_options() to take 0 as a number of integers parameter to validate
the input.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
get_options() API has some tricks to optimize that may be not so obvious
to the caller. Update documentation to reflect current behaviour.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
If we get bias set request, for example, from GpioIo() resource,
we silently ignore it. Make bias configuration available for GPIOs.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Update the example as well. Add the '#pwm-cells' and 'clocks' properties
for a complete working example.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Use the marvell,pwm-offset DT property to store the location of PWM
signal duration registers.
Since we have more than two GPIO chips per system, we can't use the
alias id to differentiate between them. Use the offset value for that.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The irq_set_affinity callback should not be set if parent IRQ domain
doesn't present because gpio-tegra driver callback fails in this case,
causing a noisy error messages on system suspend:
Disabling non-boot CPUs ...
IRQ 26: no longer affine to CPU1
IRQ128: set affinity failed(-22).
IRQ130: set affinity failed(-22).
IRQ131: set affinity failed(-22).
IRQ 27: no longer affine to CPU2
IRQ128: set affinity failed(-22).
IRQ130: set affinity failed(-22).
IRQ131: set affinity failed(-22).
IRQ 28: no longer affine to CPU3
IRQ128: set affinity failed(-22).
IRQ130: set affinity failed(-22).
IRQ131: set affinity failed(-22).
Entering suspend state LP1
Hence just don't specify the irq_set_affinity callback if parent PMC
IRQ domain is missing. Tegra isn't capable of setting affinity per GPIO,
affinity could be set only per GPIO bank, thus there is nothing to do
for gpio-tegra in regards to CPU affinity without the parent IRQ domain.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Tested-by: Dmitry Osipenko <digetx@gmail.com> # A500 T20 and Nexus7 T30
Fixes: efcdca286eef ("gpio: tegra: Convert to gpio_irq_chip")
Reported-by: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Support building driver as a loadable kernel module. This allows to
reduce size of a kernel zImage, which is important for some devices
since size of kernel partition may be limited and since some bootloader
variants have known problems in regards to the initrd placement if kernel
image is too big.
$ lsmod
Module Size Used by
gpio_tegra 16384 27
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Clean up inconsistent whitespaces and tabs in the definition of
tegra_gpio_driver to make code look better a tad.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Use resource-managed variant of debugfs_create_file(0444) to prepare code
for the modularization of the driver.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Don't cross 80 chars of line length in order to keep formatting of the
code consistent.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Hardware appears to treat zero value as 2^32. Take advantage of this
fact to support on/off values of up to UINT_MAX+1 == 2^32. Adjust both
.apply and .get_state to handle zero as a special case.
Rounded up division result in .get_state can't be zero, since the
dividend is now larger than 0. Remove check for this case.
Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Analyzed-by: Russell King <linux@armlinux.org.uk>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
PWM on/off registers are limited to UINT_MAX. However the state period
and duty_cycle fields are ns values of type u64. There is no reason to
limit them to UINT_MAX.
Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Round up the divisions in .get_state() to make applying the read out
configuration idempotent in most cases as .apply rounds down.
Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
gpio-mockup doesn't require SYSFS to be selected so drop that bit from
the Kconfig text.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Replace a comma between expression statements by a semicolon.
Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Replace a comma between expression statements by a semicolon.
Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Replace a comma between expression statements by a semicolon.
Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Replace a comma between expression statements by a semicolon.
Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The zte zx platform is getting removed, so this driver is no
longer needed.
Cc: Jun Nie <jun.nie@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The description of the flags field of the struct gpio_v2_line_info
mentions "the GPIO lines" while the info only applies to an individual
GPIO line. This was accidentally changed from "the GPIO line" during
formatting improvements.
Reword to "this GPIO line" to clarify and to be consistent with other
struct gpio_v2_line_info fields.
Fixes: 2cc522d393 ("gpio: uapi: kernel-doc formatting improvements")
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
GPIO CDEV is now optional and required for the selftests so add it to
the config.
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Add a port to the GPIO uAPI v2 interface and make it the default.
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
gpio-mockup-chardev helper has been obsoleted and removed, so also remove
the tools/gpio code that it, and nothing else, was using.
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
GPIO Makefile has been greatly simplified so remove references to lines
which no longer exist.
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Build restrictions related to the gpio-mockup-chardev helper are
no longer relevant so remove them.
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
GPIO selftests have changed to new gpio-mockup-cdev helper, so remove
old gpio-mockup-chardev helper.
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The GPIO mockup selftests are overly complicated with separate
implementations of the tests for sysfs and cdev uAPI, and with the cdev
implementation being dependent on tools/gpio and libmount.
Rework the test implementation to provide a common test suite with a
simplified pluggable uAPI interface. The cdev implementation utilises
the GPIO uAPI directly to remove the dependence on tools/gpio.
The simplified uAPI interface removes the need for any file system mount
checks in C, and so removes the dependence on libmount.
The rework also fixes the sysfs test implementation which has been broken
since the device created in the multiple gpiochip case was split into
separate devices.
Fixes: 8a39f597bc ("gpio: mockup: rework device probing")
Signed-off-by: Kent Gibson <warthog618@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The GPIO bank wake interrupt setting was erroneously removed after
conversion to gpio_irq_chip, thus the wake interrupt programming is
broken now. Secondly, the wake_enb of the GPIO driver should be changed
only after the successful toggling of the IRQ wake-state. Restore the wake
interrupt setting and the programming order.
Fixes: efcdca286eef ("gpio: tegra: Convert to gpio_irq_chip")
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Some supported chips (e.g. pca9505) support 40 lines. To be able to give
each line a name the length of the gpio-line-names property must be
allowed to contain up to 40 entries.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The previous patch added support for this chip. Add its name to the list
of allowed compatibles.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
According to the reference manual "The PCA9505 is identical to the
PCA9506 except that it includes 100 kΩ internal pull-up resistors on all
the I/Os." So the pca9506 device can be considered identical to the
pca9505 for the gpio driver.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Add support for the GPIO controller block in the R-Car V3U (R8A779A0)
SoC, which is very similar to the block found on other R-Car Gen3 SoCs.
However, this block has a new General Input Enable Register (INEN),
whose reset state is to have all inputs disabled.
Enable input for all available pins in probe and resume, to support the
use of the General Input Register (INDT) for reading pin state at all
times. This preserves backwards compatibility with other R-Car Gen3
SoCs, as recommended by the Hardware Manual.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Currently, the R-Car GPIO driver treats R-Car Gen2 and R-Car Gen3 GPIO
controllers the same. However, there exist small differences, like the
behavior of the General Input Register (INDT):
- On R-Car Gen1, R-Car Gen2, and RZ/G1, INDT only reflects the state
of an input pin if the GPIO is configured for input,
- On R-Car Gen3 and RZ/G2, INDT always reflects the state of the input
pins.
Hence to accommodate all variants, the driver does not use the INDT
register to read the status of a GPIO line when configured for output,
at the expense of doing 2 or 3 register reads instead of 1.
Given register accesses are slow, change the .get() and .get_multiple()
callbacks to always use INDT to read pin state on SoCs where this is
supported.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Document the compatible value for the GPIO block in the Renesas R-Car
V3U (R8A779A0) SoC.
While this GPIO block is mostly compatible with GPIO blocks on R-Car
Gen3 SoCs, there are small differences, and one of the new registers
needs to be configured differently from its initial reset state.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Using a helper local variable to store the address of &pdev->dev adds
to readability and allows us to avoid unnecessary line breaks.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Convert the Tegra GPIO driver to use the gpio_irq_chip infrastructure.
This allows a bit of boiler plate to be removed and while at it enables
support for hierarchical domains, which is useful to support PMC wake
events on Tegra210 and earlier.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Add compatible string for AM64 SoC in device tree binding of davinci GPIO
modules as the same IP is used.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The ROHM BD70528 and BD71828 GPIO drivers only need the regmap
pointer from parent. Regmap can be obtained via dev_get_regmap()
so do not require parent to populate driver data for that.
Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
