Commit graph

3082 commits

Author SHA1 Message Date
Linus Torvalds
9cf5b508bd remoteproc updates for v6.2
rproc-virtio device names are now auto generated, to avoid conflicts
 between remoteproc instances.
 
 The imx_rproc driver is extended with support for communicating with and
 attaching to a running M4 on i.MX8QXP, as well as support for
 attaching to the M4 after self-recovering from a crash. Support is
 added for i.MX8QM and mailbox channels are reconnected during the
 recovery process, in order to avoid data corruption.
 
 The Xilinx Zynqmp firmware interface is extended and support for the
 Xilinx R5 RPU is introduced.
 
 Various resources leaks, primarily in error paths, throughout the
 Qualcomm drivers are corrected.
 
 Lastly a fix to ensure that pm_relax is invoked even if the remoteproc
 instance is stopped between a crash is being reported and the recovery
 handler is scheduled.
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Merge tag 'rproc-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux

Pull remoteproc updates from Bjorn Andersson:
 "rproc-virtio device names are now auto generated, to avoid conflicts
  between remoteproc instances.

  The imx_rproc driver is extended with support for communicating with
  and attaching to a running M4 on i.MX8QXP, as well as support for
  attaching to the M4 after self-recovering from a crash. Support is
  added for i.MX8QM and mailbox channels are reconnected during the
  recovery process, in order to avoid data corruption.

  The Xilinx Zynqmp firmware interface is extended and support for the
  Xilinx R5 RPU is introduced.

  Various resources leaks, primarily in error paths, throughout the
  Qualcomm drivers are corrected.

  Lastly a fix to ensure that pm_relax is invoked even if the remoteproc
  instance is stopped between a crash is being reported and the recovery
  handler is scheduled"

* tag 'rproc-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (25 commits)
  remoteproc: core: Do pm_relax when in RPROC_OFFLINE state
  remoteproc: qcom: q6v5: Fix missing clk_disable_unprepare() in q6v5_wcss_qcs404_power_on()
  remoteproc: qcom_q6v5_pas: Fix missing of_node_put() in adsp_alloc_memory_region()
  remoteproc: qcom_q6v5_pas: detach power domains on remove
  remoteproc: qcom_q6v5_pas: disable wakeup on probe fail or remove
  remoteproc: qcom: q6v5: Fix potential null-ptr-deref in q6v5_wcss_init_mmio()
  remoteproc: sysmon: fix memory leak in qcom_add_sysmon_subdev()
  remoteproc: sysmon: Make QMI message rules const
  drivers: remoteproc: Add Xilinx r5 remoteproc driver
  firmware: xilinx: Add RPU configuration APIs
  firmware: xilinx: Add shutdown/wakeup APIs
  firmware: xilinx: Add ZynqMP firmware ioctl enums for RPU configuration.
  arm64: dts: xilinx: zynqmp: Add RPU subsystem device node
  dt-bindings: remoteproc: Add Xilinx RPU subsystem bindings
  remoteproc: core: Use device_match_of_node()
  remoteproc: imx_rproc: Correct i.MX93 DRAM mapping
  remoteproc: imx_rproc: Enable attach recovery for i.MX8QM/QXP
  remoteproc: imx_rproc: Request mbox channel later
  remoteproc: imx_rproc: Support i.MX8QM
  remoteproc: imx_rproc: Support kicking Mcore from Linux for i.MX8QXP
  ...
2022-12-21 09:37:14 -08:00
Linus Torvalds
f2855eec19 - qcom: enable sc8280xp, sm8550 and sm4250 support
- ti: default to ARCH_K3 for msg manager
 - mediatek: add mt8188 and mt8186 support
             request irq only after got ready
 - zynq-ipi: fix error handling after device_register
 - mpfs: check sys-con status
 - rockchip: simplify by using device_get_match_data
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Merge tag 'mailbox-v6.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - qcom: enable sc8280xp, sm8550 and sm4250 support

 - ti: default to ARCH_K3 for msg manager

 - mediatek:
    - add mt8188 and mt8186 support
    - request irq only after got ready

 - zynq-ipi: fix error handling after device_register

 - mpfs: check sys-con status

 - rockchip: simplify by using device_get_match_data

* tag 'mailbox-v6.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  dt-bindings: mailbox: qcom-ipcc: Add compatible for SM8550
  mailbox: mtk-cmdq: Do not request irq until we are ready
  mailbox: zynq-ipi: fix error handling while device_register() fails
  mailbox: mtk-cmdq-mailbox: Use platform data directly instead of copying
  mailbox: arm_mhuv2: Fix return value check in mhuv2_probe()
  dt-bindings: mailbox: mediatek,gce-mailbox: add mt8188 compatible name
  dt-bindings: mailbox: add GCE header file for mt8188
  mailbox: mpfs: read the system controller's status
  mailbox: mtk-cmdq: add MT8186 support
  mailbox: mtk-cmdq: add gce ddr enable support flow
  mailbox: mtk-cmdq: add gce software ddr enable private data
  mailbox: mtk-cmdq: Use GCE_CTRL_BY_SW definition instead of number
  mailbox: rockchip: Use device_get_match_data() to simplify the code
  dt-bindings: mailbox: qcom-ipcc: Add sc8280xp compatible
  mailbox: config: ti-msgmgr: Default set to ARCH_K3 for TI msg manager
  mailbox: qcom-apcs-ipc: Add SM4250 APCS IPC support
  dt-bindings: mailbox: qcom: Add SM4250 APCS compatible
2022-12-21 09:31:18 -08:00
Linus Torvalds
e79041113b phy-for-6.2
- New support:
         - Allwinner H616 USB PHY and A100 DPHY support
         - TI J721s2, J784s4 and J721e support
 	- Freescale i.MX8MP PCIe PHY support
 	- New driver for Renesas Ethernet SERDES supporting R-Car S4-8
 	- Qualcomm SM8450 PCIe1 PHY support in EP mode
 
   - Updates:
         - again a big pile of updates on qcom-qmp-* drivers following the
           driver split and reorganization merged earlier
 	- Phy order of API calls documentation update
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Merge tag 'phy-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

Pull phy updates from Vinod Koul:
 "This tme we have again a big pile of qcom-qmp-* changes, one new
  driver and bunch of new hardware support.

  New hardware support:

   - Allwinner H616 USB PHY and A100 DPHY support

   - TI J721s2, J784s4 and J721e support

   - Freescale i.MX8MP PCIe PHY support

   - New driver for Renesas Ethernet SERDES supporting R-Car S4-8

   - Qualcomm SM8450 PCIe1 PHY support in EP mode

   - Qualcomm SC8280XP PCIe PHY support (including x4 mode)

   - Fixed Qualcomm SC8280XP USB4-USB3-DP PHY DT bindings

  Updates:

   - A big pile of updates on qcom-qmp-* drivers following the driver
     split and reorganization merged earlier

   - Phy order of API calls documentation update"

* tag 'phy-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (174 commits)
  phy: ti: phy-j721e-wiz: add j721s2-wiz-10g module support
  dt-bindings: phy-j721e-wiz: add j721s2 compatible string
  phy: use devm_platform_get_and_ioremap_resource()
  phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY variant
  phy: allwinner: phy-sun6i-mipi-dphy: Add a variant power-on hook
  phy: allwinner: phy-sun6i-mipi-dphy: Set the enable bit last
  phy: allwinner: phy-sun6i-mipi-dphy: Make RX support optional
  dt-bindings: sun6i-a31-mipi-dphy: Add the A100 DPHY variant
  dt-bindings: sun6i-a31-mipi-dphy: Add the interrupts property
  phy: qcom-qmp-pcie: drop redundant clock allocation
  phy: qcom-qmp-usb: drop redundant clock allocation
  phy: qcom-qmp: drop unused type header
  phy: qcom-qmp-usb: drop sc8280xp reference-clock source
  dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: drop reference-clock source
  phy: qcom-qmp-combo: add support for updated sc8280xp binding
  phy: qcom-qmp-combo: rename DP_PHY register pointer
  phy: qcom-qmp-combo: rename common-register pointers
  phy: qcom-qmp-combo: clean up DP clock callbacks
  phy: qcom-qmp-combo: separate clock and provider registration
  phy: qcom-qmp-combo: add clock registration helper
  ...
2022-12-19 08:40:58 -06:00
Linus Torvalds
b8fd76f418 IOMMU Updates for Linux v6.2
Including:
 
 	- Core code:
 	  - map/unmap_pages() cleanup
 	  - SVA and IOPF refactoring
 	  - Clean up and document return codes from device/domain
 	    attachment code
 
 	- AMD driver:
 	  - Rework and extend parsing code for ivrs_ioapic, ivrs_hpet
 	    and ivrs_acpihid command line options
 	  - Some smaller cleanups
 
 	- Intel driver:
 	  - Blocking domain support
 	  - Cleanups
 
 	- S390 driver:
 	  - Fixes and improvements for attach and aperture handling
 
 	- PAMU driver:
 	  - Resource leak fix and cleanup
 
 	- Rockchip driver:
 	  - Page table permission bit fix
 
 	- Mediatek driver:
 	  - Improve safety from invalid dts input
 	  - Smaller fixes and improvements
 
 	- Exynos driver:
 	  - Fix driver initialization sequence
 
 	- Sun50i driver:
 	  - Remove IOMMU_DOMAIN_IDENTITY as it has not been working
 	    forever
 	  - Various other fixes
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Merge tag 'iommu-updates-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull iommu updates from Joerg Roedel:
 "Core code:
   - map/unmap_pages() cleanup
   - SVA and IOPF refactoring
   - Clean up and document return codes from device/domain attachment

  AMD driver:
   - Rework and extend parsing code for ivrs_ioapic, ivrs_hpet and
     ivrs_acpihid command line options
   - Some smaller cleanups

  Intel driver:
   - Blocking domain support
   - Cleanups

  S390 driver:
   - Fixes and improvements for attach and aperture handling

  PAMU driver:
   - Resource leak fix and cleanup

  Rockchip driver:
   - Page table permission bit fix

  Mediatek driver:
   - Improve safety from invalid dts input
   - Smaller fixes and improvements

  Exynos driver:
   - Fix driver initialization sequence

  Sun50i driver:
   - Remove IOMMU_DOMAIN_IDENTITY as it has not been working forever
   - Various other fixes"

* tag 'iommu-updates-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (74 commits)
  iommu/mediatek: Fix forever loop in error handling
  iommu/mediatek: Fix crash on isr after kexec()
  iommu/sun50i: Remove IOMMU_DOMAIN_IDENTITY
  iommu/amd: Fix typo in macro parameter name
  iommu/mediatek: Remove unused "mapping" member from mtk_iommu_data
  iommu/mediatek: Improve safety for mediatek,smi property in larb nodes
  iommu/mediatek: Validate number of phandles associated with "mediatek,larbs"
  iommu/mediatek: Add error path for loop of mm_dts_parse
  iommu/mediatek: Use component_match_add
  iommu/mediatek: Add platform_device_put for recovering the device refcnt
  iommu/fsl_pamu: Fix resource leak in fsl_pamu_probe()
  iommu/vt-d: Use real field for indication of first level
  iommu/vt-d: Remove unnecessary domain_context_mapped()
  iommu/vt-d: Rename domain_add_dev_info()
  iommu/vt-d: Rename iommu_disable_dev_iotlb()
  iommu/vt-d: Add blocking domain support
  iommu/vt-d: Add device_block_translation() helper
  iommu/vt-d: Allocate pasid table in device probe path
  iommu/amd: Check return value of mmu_notifier_register()
  iommu/amd: Fix pci device refcount leak in ppr_notifier()
  ...
2022-12-19 08:34:39 -06:00
Elvis Wang
359f608f66 dt-bindings: mailbox: add GCE header file for mt8188
Add Global Command Engine(GCE) header file to define the GCE thread priority,
GCE subsys id, event and constant for mt8188.

Signed-off-by: Elvis Wang <Elvis.Wang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno<angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:30 -06:00
Linus Torvalds
b611996ef2 linux-watchdog 6.2-rc1 tag
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Merge tag 'linux-watchdog-6.2-rc1' of git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:

 - Add Advantech EC watchdog driver

 - Add support for MT6795 Helio X10 watchdog and toprgu

 - Add support for MT8188 watchdog device

 - Remove #ifdef guards for PM related functions

 - Other fixes and improvements

* tag 'linux-watchdog-6.2-rc1' of git://www.linux-watchdog.org/linux-watchdog:
  watchdog: aspeed: Enable pre-timeout interrupt
  watchdog: iTCO_wdt: Set NO_REBOOT if the watchdog is not already running
  watchdog: rn5t618: add support for read out bootstatus
  watchdog: kempld: Remove #ifdef guards for PM related functions
  watchdog: omap: Remove #ifdef guards for PM related functions
  watchdog: twl4030: Remove #ifdef guards for PM related functions
  watchdog: at91rm9200: Remove #ifdef guards for PM related functions
  watchdog: Add Advantech EC watchdog driver
  dt-bindings: watchdog: mediatek,mtk-wdt: Add compatible for MT8173
  dt-bindings: watchdog: mediatek,mtk-wdt: Add compatible for MT6795
  dt-bindings: watchdog: mediatek: Convert mtk-wdt to json-schema
  watchdog: mediatek: mt8188: add wdt support
  dt-bindings: reset: mt8188: add toprgu reset-controller header file
  dt-bindings: watchdog: Add compatible for MediaTek MT8188
  watchdog: mtk_wdt: Add support for MT6795 Helio X10 watchdog and toprgu
2022-12-17 08:34:01 -06:00
Linus Torvalds
0015edd6f6 A pile of clk driver updates with a small tracepoint patch to the clk core this
time around. The core framework is effectively unchanged, with the majority of
 the diff going to the Qualcomm clk driver directory because they added two 3k
 line files that are almost all clk data (Abel Vesa from Linaro tried to shrink
 the number of lines down, but it doesn't seem to be possible without
 sacrificing readability). The second big driver this time around is the
 Rockchip rk3588 clk and reset unit, at _only_ 2.5k lines.
 
 Ignoring the big clk drivers from the familiar SoC vendors, there's just a
 bunch of little clk driver updates and fixes throughout here. It's the usual
 set of clk data fixups to describe proper parents, or add frequencies to
 frequency tables, or plug memory leaks when function calls fail. Also, some
 drivers are converted to use modern clk_hw APIs, which is always nice to see.
 And data is deduplicated, leading to a smaller kernel Image. Overall this batch
 has a larger collection of cleanups than it typically does. Maybe that means
 there are less new SoCs right now that need supporting, and the focus has
 shifted to quality and reliability. I can dream.
 
 New Drivers:
  - Frequency hopping controller hardware on MediaTek MT8186
  - Global clock controller for Qualcomm SM8550
  - Display clock controller for Qualcomm SC8280XP
  - RPMh clock controller for Qualcomm QDU1000 and QRU1000 SoCs
  - CPU PLL on MStar/SigmaStar SoCs
  - Support for the clock and reset unit of the Rockchip rk3588
 
 Updates:
  - Tracepoints for clk_rate_request structures
  - Debugfs support for fractional divider clk
  - Make MxL's CGU driver secure compatible
  - Ingenic JZ4755 SoC clk support
  - Support audio clks on X1000 SoCs
  - Remove flags from univ/main/syspll child fixed factor clocks across
    MediaTek platforms
  - Fix clock dependency for ADC on MediaTek MT7986
  - Fix parent for FlexSPI clock for i.MX93
  - Add USB suspend clock on i.MX8MP
  - Unmap anatop base on error for i.MX93 driver
  - Change enet clock parent to wakeup_axi_root for i.MX93
  - Drop LPIT1, LPIT2, TPM1 and TPM3 clocks for i.MX93
  - Mark HSIO bus clock and SYS_CNT clock as critical on i.MX93
  - Add 320MHz and 640MHz entries to PLL146x
  - Add audio shared gate and SAI clocks for i.MX8MP
  - Fix a possible memory leak in the error path of rockchip PLL creation
  - Fix header guard for V3S clocks
  - Add IR module clock for f1c100s
  - Correct the parent clocks for the (High Speed) Serial Communication
    Interfaces with FIFO ((H)SCIF) modules and the mixed-up Ethernet
    Switch clocks on Renesas R-Car S4-8
  - Add timer (TMU, CMT) and Cortex-A76 CPU core (Z0) clocks on Renesas
    R-Car V4H
  - Two PLL driver fixups for the Amlogic clk driver
  - Round SD clock rate to improve parent clock selection
  - Add Ethernet Switch and internal SASYNCPER clocks on Renesas R-Car
    S4-8
  - Add DMA (SYS-DMAC), SPI (MSIOF), external interrupt (INTC-EX) serial
    (SCIF), PWM (PWM and TPU), SDHI, and HyperFLASH/QSPI (RPC-IF) clocks
    on Renesas R-Car V4H
  - Add Multi-Function Timer Pulse Unit (MTU3a) clock and reset on
    Renesas RZ/G2L
  - Fix endless loop on Renesas RZ/N1
  - Correct the parent clocks for the High Speed Serial Communication
    Interfaces with FIFO (HSCIF) modules on the Renesas R-Car V4H SoC
    Note: HSCIF0 is used for the serial console on the White-Hawk
    development board
  - Various clk DT binding improvements and conversions to YAML
  - Qualcomm SM8150/SM8250 display clock controller cleaned up
  - Some missing clocks for Qualcomm SM8350 added
  - Qualcomm MSM8974 Global and Multimedia clock controllers transitioned
    to parent_data and parent_hws
  - Use parent_data and add network resets for Qualcomm IPQ8074
  - Qualcomm Krait clock controller modernized
  - Fix pm_runtime usage in Qualcomm SC7180 and SC7280 LPASS clock
    controllers
  - Enable retention mode on Qualcomm SM8250 USB GDSCs
  - Cleanup Qualcomm RPM and RPMh clock drivers to avoid duplicating
    clocks which definition could be shared between platforms
  - Various NULL pointer checks added for allocations
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk driver updates from Stephen Boyd:
 "A pile of clk driver updates with a small tracepoint patch to the clk
  core this time around.

  The core framework is effectively unchanged, with the majority of the
  diff going to the Qualcomm clk driver directory because they added two
  3k line files that are almost all clk data (Abel Vesa from Linaro
  tried to shrink the number of lines down, but it doesn't seem to be
  possible without sacrificing readability).

  The second big driver this time around is the Rockchip rk3588 clk and
  reset unit, at _only_ 2.5k lines.

  Ignoring the big clk drivers from the familiar SoC vendors, there's
  just a bunch of little clk driver updates and fixes throughout here.

  It's the usual set of clk data fixups to describe proper parents, or
  add frequencies to frequency tables, or plug memory leaks when
  function calls fail. Also, some drivers are converted to use modern
  clk_hw APIs, which is always nice to see. And data is deduplicated,
  leading to a smaller kernel Image.

  Overall this batch has a larger collection of cleanups than it
  typically does. Maybe that means there are less new SoCs right now
  that need supporting, and the focus has shifted to quality and
  reliability. I can dream.

  New Drivers:
   - Frequency hopping controller hardware on MediaTek MT8186
   - Global clock controller for Qualcomm SM8550
   - Display clock controller for Qualcomm SC8280XP
   - RPMh clock controller for Qualcomm QDU1000 and QRU1000 SoCs
   - CPU PLL on MStar/SigmaStar SoCs
   - Support for the clock and reset unit of the Rockchip rk3588

  Updates:
   - Tracepoints for clk_rate_request structures
   - Debugfs support for fractional divider clk
   - Make MxL's CGU driver secure compatible
   - Ingenic JZ4755 SoC clk support
   - Support audio clks on X1000 SoCs
   - Remove flags from univ/main/syspll child fixed factor clocks across
     MediaTek platforms
   - Fix clock dependency for ADC on MediaTek MT7986
   - Fix parent for FlexSPI clock for i.MX93
   - Add USB suspend clock on i.MX8MP
   - Unmap anatop base on error for i.MX93 driver
   - Change enet clock parent to wakeup_axi_root for i.MX93
   - Drop LPIT1, LPIT2, TPM1 and TPM3 clocks for i.MX93
   - Mark HSIO bus clock and SYS_CNT clock as critical on i.MX93
   - Add 320MHz and 640MHz entries to PLL146x
   - Add audio shared gate and SAI clocks for i.MX8MP
   - Fix a possible memory leak in the error path of rockchip PLL
     creation
   - Fix header guard for V3S clocks
   - Add IR module clock for f1c100s
   - Correct the parent clocks for the (High Speed) Serial Communication
     Interfaces with FIFO ((H)SCIF) modules and the mixed-up Ethernet
     Switch clocks on Renesas R-Car S4-8
   - Add timer (TMU, CMT) and Cortex-A76 CPU core (Z0) clocks on Renesas
     R-Car V4H
   - Two PLL driver fixups for the Amlogic clk driver
   - Round SD clock rate to improve parent clock selection
   - Add Ethernet Switch and internal SASYNCPER clocks on Renesas R-Car
     S4-8
   - Add DMA (SYS-DMAC), SPI (MSIOF), external interrupt (INTC-EX)
     serial (SCIF), PWM (PWM and TPU), SDHI, and HyperFLASH/QSPI
     (RPC-IF) clocks on Renesas R-Car V4H
   - Add Multi-Function Timer Pulse Unit (MTU3a) clock and reset on
     Renesas RZ/G2L
   - Fix endless loop on Renesas RZ/N1
   - Correct the parent clocks for the High Speed Serial Communication
     Interfaces with FIFO (HSCIF) modules on the Renesas R-Car V4H SoC
     Note: HSCIF0 is used for the serial console on the White-Hawk
     development board
   - Various clk DT binding improvements and conversions to YAML
   - Qualcomm SM8150/SM8250 display clock controller cleaned up
   - Some missing clocks for Qualcomm SM8350 added
   - Qualcomm MSM8974 Global and Multimedia clock controllers
     transitioned to parent_data and parent_hws
   - Use parent_data and add network resets for Qualcomm IPQ8074
   - Qualcomm Krait clock controller modernized
   - Fix pm_runtime usage in Qualcomm SC7180 and SC7280 LPASS clock
     controllers
   - Enable retention mode on Qualcomm SM8250 USB GDSCs
   - Cleanup Qualcomm RPM and RPMh clock drivers to avoid duplicating
     clocks which definition could be shared between platforms
   - Various NULL pointer checks added for allocations"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (188 commits)
  clk: nomadik: correct struct name kernel-doc warning
  clk: lmk04832: fix kernel-doc warnings
  clk: lmk04832: drop superfluous #include
  clk: lmk04832: drop unnecessary semicolons
  clk: lmk04832: declare variables as const when possible
  clk: socfpga: Fix memory leak in socfpga_gate_init()
  clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIRE
  clk: st: Fix memory leak in st_of_quadfs_setup()
  clk: samsung: Fix memory leak in _samsung_clk_register_pll()
  clk: Add trace events for rate requests
  clk: Store clk_core for clk_rate_request
  clk: qcom: rpmh: add support for SM6350 rpmh IPA clock
  clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: mmcc-msm8974: move clock parent tables down
  clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: gcc-msm8974: move clock parent tables down
  clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  dt-bindings: clocks: qcom,mmcc: define clocks/clock-names for MSM8974
  dt-bindings: clock: split qcom,gcc-msm8974,-msm8226 to the separate file
  ...
2022-12-13 13:46:07 -08:00
Linus Torvalds
361c89a0da Pin control changes for the v6.2 kernel cycle:
Core changes:
 
 - Minor but nice and important documentation clean-ups.
 
 New drivers:
 
 - New subdriver for the Qualcomm SDM670 SoC.
 
 - New subdriver for the Intel Moorefield SoC.
 
 - New trivial support for the NXP Freescale i.MXRT1170 SoC.
 
 Other changes and improvements
 
 - A major clean-up of the Qualcomm pin control device tree bindings
   by Krzysztof.
 
 - A major header clean-up by Andy.
 
 - Some immutable irqchip clean-up for the Actions Semiconductor
   and Nuvoton drivers.
 
 - GPIO helpers for The Cypress cy8c95x0 driver.
 
 - Bias handling in the Mediatek MT7986 driver.
 
 - Remove the unused pins-are-numbered concept that never flew.
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Merge tag 'pinctrl-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "The two large chunks is the header clean-up from Andy and the Qualcomm
  DT bindings clean-up from Krzysztof. Each which could give rise to
  conflicts, but I haven't seen any.

  The YAML conversions happening around the device tree is the biggest
  item in the series and is the result of Rob Herrings ambition to
  autovalidate these trees against strict schemas and it is paying off
  in lots of bugs found and ever prettier device trees. Sooner or later
  the transition will be complete, Krzysztof is fixing up all of the
  Qualcomm stuff, which is pretty voluminous.

  Core changes:

   - minor but nice and important documentation clean-ups

  New drivers:

   - subdriver for the Qualcomm SDM670 SoC

   - subdriver for the Intel Moorefield SoC

   - trivial support for the NXP Freescale i.MXRT1170 SoC

  Other changes and improvements

   - major clean-up of the Qualcomm pin control device tree bindings by
     Krzysztof

   - major header clean-up by Andy

   - some immutable irqchip clean-up for the Actions Semiconductor and
     Nuvoton drivers

   - GPIO helpers for The Cypress cy8c95x0 driver

   - bias handling in the Mediatek MT7986 driver

   - remove the unused pins-are-numbered concept that never flew"

* tag 'pinctrl-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (231 commits)
  pinctrl: thunderbay: fix possible memory leak in thunderbay_build_functions()
  dt-bindings: pinctrl: st,stm32: Deprecate pins-are-numbered
  dt-bindings: pinctrl: mediatek,mt65xx: Deprecate pins-are-numbered
  pinctrl: stm32: Remove check for pins-are-numbered
  pinctrl: mediatek: common: Remove check for pins-are-numbered
  pinctrl: qcom: remove duplicate included header files
  pinctrl: sunxi: d1: Add CAN bus pinmuxes
  pinctrl: loongson2: Fix some const correctness
  pinctrl: pinconf-generic: add missing of_node_put()
  pinctrl: intel: Enumerate PWM device when community has a capability
  pwm: lpss: Rename pwm_lpss_probe() --> devm_pwm_lpss_probe()
  pwm: lpss: Allow other drivers to enable PWM LPSS
  pwm: lpss: Include headers we are the direct user of
  pwm: lpss: Rename MAX_PWMS --> LPSS_MAX_PWMS
  pwm: Add a stub for devm_pwmchip_add()
  pinctrl: k210: call of_node_put()
  pinctrl: starfive: Use existing variable gpio
  dt-bindings: pinctrl: semtech,sx150xq: fix match patterns for 16 GPIOs matching
  pinconf-generic: fix style issues in pin_config_param doc
  pinctrl: pinctrl-loongson2: fix Kconfig dependency
  ...
2022-12-13 13:03:06 -08:00
Linus Torvalds
cdb9d35377 media updates for v6.2-rc1
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Merge tag 'media/v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media

Pull media updates from Mauro Carvalho Chehab:

 - DVB core changes to avoid refcount troubles and UAF

 - DVB API/core has gained support for DVB-C2 and DVB-S2X

 - New sensor drivers: ov08x40, ov4689.c, st-vgxy61 and tc358746.c

 - Removal of an unused sensor driver: s5k4ecgx

 - Move microchip_csi2dc to a new directory, named after the
   manufacturer

 - Add media controller support to Microship drivers

 - Old Atmel/Microship drivers that don't use media controler got moved
   to staging

 - New drivers added for Renesas RZ/G2L CRU and MIPI CSI-2 support

 - Allwinner A31 camera sensor driver code was now split into a bridge
   and a separate processor driver

 - Added a virtual stateless decoder driver in order to test core
   support for stateless drivers and test userspace apps using it

 - removed platform-based support for ov9650, as this is not used
   anymore

 - atomisp now uses videobuf2 and supports normal mmap mode

 - the imx7-media-csi driver got promoted from staging

 - rcar-vin driver has gained support for gen3 UDS (Up Down Scaler)

 - most i2c drivers now use I2C .probe_new() kAPI

 - lots of drivers fixes, cleanups and improvements

* tag 'media/v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (544 commits)
  media: s5c73m3: Switch to GPIO descriptors
  media: i2c: s5k5baf: switch to using gpiod API
  media: i2c: s5k6a3: switch to using gpiod API
  media: imx: remove code for non-existing config IMX_GPT_ICAP
  media: si470x: Fix use-after-free in si470x_int_in_callback()
  media: staging: stkwebcam: Restore MEDIA_{USB,CAMERA}_SUPPORT dependencies
  media: coda: Add check for kmalloc
  media: coda: Add check for dcoda_iram_alloc
  dt-bindings: media: s5c73m3: Fix reset-gpio descriptor
  media: dt-bindings: allwinner: h6-vpu-g2: Add IOMMU reference property
  media: s5k4ecgx: Delete driver
  media: s5k4ecgx: Switch to GPIO descriptors
  media: Switch to use dev_err_probe() helper
  headers: Remove some left-over license text in include/uapi/linux/v4l2-*
  headers: Remove some left-over license text in include/uapi/linux/dvb/
  media: usb: pwc-uncompress: Use flex array destination for memcpy()
  media: s5p-mfc: Fix to handle reference queue during finishing
  media: s5p-mfc: Clear workbit to handle error condition
  media: s5p-mfc: Fix in register read and write for H264
  media: imx: Use get_mbus_config instead of parsing upstream DT endpoints
  ...
2022-12-13 11:36:58 -08:00
Stephen Boyd
0e2c9884cb Merge branches 'clk-mediatek', 'clk-trace', 'clk-qcom' and 'clk-microchip' into clk-next
- Tracepoints for clk_rate_request structures

* clk-mediatek:
  clk: mediatek: fix dependency of MT7986 ADC clocks
  clk: mediatek: Change PLL register API for MT8186
  clk: mediatek: Add new clock driver to handle FHCTL hardware
  dt-bindings: clock: mediatek: Add new bindings of MediaTek frequency hopping
  clk: mediatek: Export PLL operations symbols
  clk: mediatek: mt8186-topckgen: Add GPU clock mux notifier
  clk: mediatek: mt8186-mfg: Propagate rate changes to parent
  clk: mediatek: mt8195-topckgen: Drop flags for main/univpll fixed factors
  clk: mediatek: mt8192: Drop flags for main/univpll fixed factors
  clk: mediatek: mt6795-topckgen: Drop flags for main/sys/univpll fixed factors
  clk: mediatek: mt8173: Drop flags for main/sys/univpll fixed factors
  clk: mediatek: mt8183: Drop flags for sys/univpll fixed factors
  clk: mediatek: mt8183: Compress top_divs array entries
  clk: mediatek: mt8186-topckgen: Drop flags for main/univpll fixed factors
  clk: mediatek: clk-mtk: Allow specifying flags on mtk_fixed_factor clocks

* clk-trace:
  clk: Add trace events for rate requests
  clk: Store clk_core for clk_rate_request

* clk-qcom: (69 commits)
  clk: qcom: rpmh: add support for SM6350 rpmh IPA clock
  clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: mmcc-msm8974: move clock parent tables down
  clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_names
  clk: qcom: gcc-msm8974: move clock parent tables down
  clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
  dt-bindings: clocks: qcom,mmcc: define clocks/clock-names for MSM8974
  dt-bindings: clock: split qcom,gcc-msm8974,-msm8226 to the separate file
  clk: qcom: gcc-ipq4019: switch to devm_clk_notifier_register
  clk: qcom: rpmh: remove usage of platform name
  clk: qcom: rpmh: rename VRM clock data
  clk: qcom: rpmh: rename ARC clock data
  clk: qcom: rpmh: support separate symbol name for the RPMH clocks
  clk: qcom: rpmh: remove platform names from BCM clocks
  clk: qcom: rpmh: drop all _ao names
  clk: qcom: rpmh: reuse common duplicate clocks
  clk: qcom: rpmh: group clock definitions together
  clk: qcom: rpm: drop the platform from clock definitions
  clk: qcom: rpm: drop the _clk suffix completely
  ...

* clk-microchip:
  clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIRE
  clk: microchip: check for null return of devm_kzalloc()
2022-12-12 11:13:28 -08:00
Stephen Boyd
e0a1d1394b Merge branches 'clk-spear', 'clk-fract', 'clk-rockchip' and 'clk-imx' into clk-next
- Debugfs support for fractional divider clk

* clk-spear:
  clk: spear: Fix SSP clock definition on SPEAr600
  clk: spear: Fix CLCD clock definition on SPEAr600

* clk-fract:
  clk: fractional-divider: Regroup inclusions
  clk: fractional-divider: Show numerator and denominator in debugfs
  clk: fractional-divider: Split out clk_fd_get_div() helper

* clk-rockchip:
  clk: rockchip: Fix memory leak in rockchip_clk_register_pll()
  clk: rockchip: add clock controller for the RK3588
  clk: rockchip: add lookup table support
  clk: rockchip: simplify rockchip_clk_add_lookup
  clk: rockchip: allow additional mux options for cpu-clock frequency changes
  clk: rockchip: add pll type for RK3588
  clk: rockchip: add register offset of the cores select parent
  dt-bindings: clock: add rk3588 cru bindings
  dt-bindings: reset: add rk3588 reset definitions
  dt-bindings: clock: add rk3588 clock definitions
  clk: rockchip: use proper crypto0 name on rk3399

* clk-imx:
  clk: imx: rename imx_obtain_fixed_clk_hw() to imx_get_clk_hw_by_name()
  clk: imx8mn: fix imx8mn_enet_phy_sels clocks list
  clk: imx8mn: fix imx8mn_sai2_sels clocks list
  clk: imx: rename video_pll1 to video_pll
  clk: imx: replace osc_hdmi with dummy
  clk: imx8mn: rename vpu_pll to m7_alt_pll
  clk: imx: imxrt1050: add IMXRT1050_CLK_LCDIF_PIX clock gate
  clk: imx: imxrt1050: fix IMXRT1050_CLK_LCDIF_APB offsets
  clk: imx8mp: Add audio shared gate
  dt-bindings: clock: imx8mp: Add ids for the audio shared gate
  clk: imx: pll14xx: Add 320 MHz and 640 MHz entries for PLL146x
  clk: imx93: keep sys ctr clock always on
  clk: imx: keep hsio bus clock always on
  clk: imx93: drop tpm1/3, lpit1/2 clk
  dt-bindings: clock: imx93: drop TPM1/3 LPIT1/2 entry
  clk: imx93: correct enet clock
  clk: imx93: unmap anatop base in error handling path
  clk: imx: imx8mp: add shared clk gate for usb suspend clk
  dt-bindings: clocks: imx8mp: Add ID for usb suspend clock
  clk: imx93: correct the flexspi1 clock setting
2022-12-12 11:13:08 -08:00
Stephen Boyd
83907bf316 Merge branches 'clk-bindings', 'clk-renesas', 'clk-amlogic', 'clk-allwinner' and 'clk-ti' into clk-next
* clk-bindings:
  dt-bindings: clock: ti,cdce925: Convert to DT schema

* clk-renesas: (26 commits)
  clk: renesas: r8a779f0: Fix Ethernet Switch clocks
  clk: renesas: r8a779g0: Add Z0 clock support
  clk: renesas: r8a779g0: Add CMT clocks
  clk: renesas: r8a779g0: Add TMU and SASYNCRT clocks
  clk: renesas: r8a779f0: Fix SCIF parent clocks
  clk: renesas: r8a779f0: Fix HSCIF parent clocks
  clk: renesas: r9a06g032: Repair grave increment error
  clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PM
  clk: renesas: rzg2l: Fix typo in struct rzg2l_cpg_priv kerneldoc
  clk: renesas: r8a779a0: Fix SD0H clock name
  clk: renesas: r8a779g0: Add RPC-IF clock
  clk: renesas: r8a779g0: Add SDHI clocks
  clk: renesas: r8a779f0: Add SASYNCPER internal clock
  clk: renesas: r8a779f0: Fix SD0H clock name
  clk: renesas: r9a07g043: Drop WDT2 clock and reset entry
  clk: renesas: r9a07g044: Drop WDT2 clock and reset entry
  clk: renesas: r8a779g0: Add TPU clock
  clk: renesas: r8a779g0: Add PWM clock
  clk: renesas: r8a779g0: Add SCIF clocks
  clk: renesas: r9a07g044: Add MTU3a clock and reset entry
  ...

* clk-amlogic:
  clk: meson: pll: add pcie lock retry workaround
  clk: meson: pll: adjust timeout in meson_clk_pll_wait_lock()

* clk-allwinner:
  clk: sunxi-ng: f1c100s: Add IR mod clock
  clk: sunxi-ng: v3s: Correct the header guard of ccu-sun8i-v3s.h

* clk-ti:
  clk: ti: fix typo in ti_clk_retry_init() code comment
  clk: ti: dra7-atl: don't allocate `parent_names' variable
  clk: ti: change ti_clk_register[_omap_hw]() API
2022-12-12 11:12:52 -08:00
Linus Torvalds
01f3cbb296 SoC: DT changes for 6.2
The devicetree changes contain exactly 1000 non-merge changesets,
 including a number of new arm64 SoC variants from Qualcomm and Apple,
 as well as the Renesas r9a07g043f/u chip in both arm64 and riscv variants
 While we have occasionally merged support for non-arm SoCs in the past,
 this is now the normal path for riscv devicetree files.
 
 The most notable changes, by SoC platform, are:
 
  - The Apple T6000 (M1 Pro), T6001 (M1 Max) and T6002 (M2 Ultra)
    chips now have initial support. This is particularly nice as I am
    typing this on a T6002 Mac Studio with only a small number of driver
    patches.
 
  - Qualcomm MSM8996 Pro (Snapdragon 821), SM6115 (Snapdragon 662), SM4250
    (Snapdragon 460), SM6375 (Snapdragon 695), SDM670 (Snapdragon 670),
    MSM8976 (Snapdragon 652) and MSM8956 (Snapdragon 650) are all mobile
    phone chips that are closely related to others we already support.
    Adding those helps support more phones and we add several models
    from Sony (Xperia 10 IV, 5 IV, X, and X compact), OnePlus (One, 3,
    3T, and Nord N100), Xiaomi (Poco F1, Mi6), Huawei (Watch) and Google
    (Pixel 3a).  There are also new variants of the Herobrine and Trogdor
    chromebook motherboards.  SA8540P is an automotive SoC used in the
    Qdrive-3 development platform
 
  - Rockchips gains no new SoC variants, but a lot of new boards:
    three mobile gaming systems based on RK3326 Odroid-Go/rg351 family,
    two more Anbernic gaming systems based on RK3566 and a number of
    other RK356x based single-board computers.
 
  - Renesas RZ/G2UL (r9a07g043) was already supported for arm64, but as
    the newly added RZ/Five is based on the same design, this now gets
    reorganized in order to share most of the dts description between
    the two and add the RZ/Five SMARC EVK board support.
 
 Aside from that, there are the usual changes all over the tree:
 
  - New boards on other platforms contain two ASpeed BMC users, two
    Broadcom based Wifi routers, Zyxel NSA310S NAS, the i.MX6 based Kobo
    Aura2 ebook reader, two i.MX8 based development boards, two Uniphier
    Pro5 development boards, the STM32MP1 testbench board from DHCOR,
    the TI K3 based BeagleBone AI-64 board, and the Mediatek Helio X10
    based Sony Xperia M5 phone.
 
  - The Starfive JH7100 source gets reorganized in order to support the
    VisionFive V1 board.
 
  - Minor updates and cleanups for Intel SoCFPGA, Marvell PXA168,
    TI, ST, NXP, Apple, Broadcom, Juno, Marvell MVEBU, at91, nuvoton,
    Tegra, Mediatek, Renesas, Hisilicon, Allwinner, Samsung, ux500,
    spear, ...  The treewide cleanups now have a lot of fixes for cache
    nodes and other binding violoations.
 
  - Somewhat larger sets of reworks for NVIDIA Tegra, Qualcomm
    and Renesas platforms, adding a lot more on-chip device support
 
  - A rework of the way that DTB overlays are built.
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Merge tag 'soc-dt-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "The devicetree changes contain exactly 1000 non-merge changesets,
  including a number of new arm64 SoC variants from Qualcomm and Apple,
  as well as the Renesas r9a07g043f/u chip in both arm64 and riscv
  variants.

  While we have occasionally merged support for non-arm SoCs in the
  past, this is now the normal path for riscv devicetree files.

  The most notable changes, by SoC platform, are:

   - The Apple T6000 (M1 Pro), T6001 (M1 Max) and T6002 (M1 Ultra) chips
     now have initial support. This is particularly nice as I am typing
     this on a T6002 Mac Studio with only a small number of driver
     patches.

   - Qualcomm MSM8996 Pro (Snapdragon 821), SM6115 (Snapdragon 662),
     SM4250 (Snapdragon 460), SM6375 (Snapdragon 695), SDM670
     (Snapdragon 670), MSM8976 (Snapdragon 652) and MSM8956 (Snapdragon
     650) are all mobile phone chips that are closely related to others
     we already support.

     Adding those helps support more phones and we add several models
     from Sony (Xperia 10 IV, 5 IV, X, and X compact), OnePlus (One, 3,
     3T, and Nord N100), Xiaomi (Poco F1, Mi6), Huawei (Watch) and
     Google (Pixel 3a).

     There are also new variants of the Herobrine and Trogdor chromebook
     motherboards. SA8540P is an automotive SoC used in the Qdrive-3
     development platform

   - Rockchips gains no new SoC variants, but a lot of new boards: three
     mobile gaming systems based on RK3326 Odroid-Go/rg351 family, two
     more Anbernic gaming systems based on RK3566 and a number of other
     RK356x based single-board computers.

   - Renesas RZ/G2UL (r9a07g043) was already supported for arm64, but as
     the newly added RZ/Five is based on the same design, this now gets
     reorganized in order to share most of the dts description between
     the two and add the RZ/Five SMARC EVK board support.

  Aside from that, there are the usual changes all over the tree:

   - New boards on other platforms contain two ASpeed BMC users, two
     Broadcom based Wifi routers, Zyxel NSA310S NAS, the i.MX6 based
     Kobo Aura2 ebook reader, two i.MX8 based development boards, two
     Uniphier Pro5 development boards, the STM32MP1 testbench board from
     DHCOR, the TI K3 based BeagleBone AI-64 board, and the Mediatek
     Helio X10 based Sony Xperia M5 phone.

   - The Starfive JH7100 source gets reorganized in order to support the
     VisionFive V1 board.

   - Minor updates and cleanups for Intel SoCFPGA, Marvell PXA168, TI,
     ST, NXP, Apple, Broadcom, Juno, Marvell MVEBU, at91, nuvoton,
     Tegra, Mediatek, Renesas, Hisilicon, Allwinner, Samsung, ux500,
     spear, ... The treewide cleanups now have a lot of fixes for cache
     nodes and other binding violoations.

   - Somewhat larger sets of reworks for NVIDIA Tegra, Qualcomm and
     Renesas platforms, adding a lot more on-chip device support

   - A rework of the way that DTB overlays are built"

* tag 'soc-dt-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (979 commits)
  arm64: dts: apple: t6002: Fix GPU power domains
  arm64: dts: apple: t600x-pmgr: Fix search & replace typo
  arm64: dts: apple: Add t8103 L1/L2 cache properties and nodes
  arm64: dts: apple: Rename dart-sio* to sio-dart*
  arch: arm64: apple: t600x: Use standard "iommu" node name
  arch: arm64: apple: t8103: Use standard "iommu" node name
  ARM: dts: socfpga: Fix pca9548 i2c-mux node name
  dt-bindings: iio: adc: qcom,spmi-vadc: fix PM8350 define
  dt-bindings: iio: adc: qcom,spmi-vadc: extend example
  arm64: dts: qcom: sc8280xp: fix UFS DMA coherency
  arm64: dts: qcom: sc7280: Add DT for sc7280-herobrine-zombie
  arm64: dts: qcom: sm8250-sony-xperia-edo: fix no-mmc property for SDHCI
  arm64: dts: qcom: sdm845-sony-xperia-tama: fix no-mmc property for SDHCI
  arm64: dts: qcom: sda660-inforce-ifc6560: fix no-mmc property for SDHCI
  arm64: dts: qcom: sa8155p-adp: fix no-mmc property for SDHCI
  arm64: dts: qcom: qrb5165-rb: fix no-mmc property for SDHCI
  arm64: dts: qcom: sm8450: align MMC node names with dtschema
  arm64: dts: qcom: sc7180-trogdor: use generic node names
  arm64: dts: qcom: sm8450-hdk: add sound support
  arm64: dts: qcom: sm8450: add Soundwire and LPASS
  ...
2022-12-12 10:21:03 -08:00
Arnd Bergmann
9379885d07 More Qualcomm driver updates for 6.2
Socinfo is extended with knowledge about MSM8956, MSM8976, SM6115,
 SM4250, SM8150, SA8155 and SM8550.
 
 Support for RSC v3, as found in SM8550 is added to the RPMH RSC driver.
 
 Support for SM8550 and SM4250 ARC regulators are added to the RPM(h)
 power-domain drivers. SM8550 support is added to the LLCC driver.
 The AOSS QMP binding is declared compatible for SM8550.
 
 BWMON and LLCC now selects REGMAP_MMIO to ensure dependencies are built
 properly.
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Merge tag 'qcom-drivers-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

More Qualcomm driver updates for 6.2

Socinfo is extended with knowledge about MSM8956, MSM8976, SM6115,
SM4250, SM8150, SA8155 and SM8550.

Support for RSC v3, as found in SM8550 is added to the RPMH RSC driver.

Support for SM8550 and SM4250 ARC regulators are added to the RPM(h)
power-domain drivers. SM8550 support is added to the LLCC driver.
The AOSS QMP binding is declared compatible for SM8550.

BWMON and LLCC now selects REGMAP_MMIO to ensure dependencies are built
properly.

* tag 'qcom-drivers-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: socinfo: Add SM6115 / SM4250 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for SM6115 / SM4250 and variants
  soc: qcom: socinfo: Add SM8150 and SA8155 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for SM8150 and SA8155
  dt-bindings: soc: qcom: apr: document generic qcom,apr compatible
  soc: qcom: Select REMAP_MMIO for ICC_BWMON driver
  soc: qcom: Select REMAP_MMIO for LLCC driver
  soc: qcom: rpmpd: Add SM4250 support
  dt-bindings: power: rpmpd: Add SM4250 support
  dt-bindings: soc: qcom: aoss: Add compatible for SM8550
  soc: qcom: llcc: Add configuration data for SM8550
  dt-bindings: arm: msm: Add LLCC compatible for SM8550
  soc: qcom: llcc: Add v4.1 HW version support
  soc: qcom: socinfo: Add SM8550 ID
  soc: qcom: rpmh-rsc: Avoid unnecessary checks on irq-done response
  soc: qcom: rpmh-rsc: Add support for RSC v3 register offsets
  soc: qcom: rpmhpd: Add SM8550 power domains
  dt-bindings: power: rpmpd: Add SM8550 to rpmpd binding
  soc: qcom: socinfo: Add MSM8956/76 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for MSM8956 and MSM8976

Link: https://lore.kernel.org/r/20221207154134.3233779-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-12-07 22:07:48 +01:00
Bhupesh Sharma
67d1af1c50 dt-bindings: arm: qcom,ids: Add SoC IDs for SM6115 / SM4250 and variants
Add SoC IDs for Qualcomm SM6115 / SM4250 and variants.

Cc: Bjorn Andersson <andersson@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221201141619.2462705-4-bhupesh.sharma@linaro.org
2022-12-05 16:50:39 -06:00
Bhupesh Sharma
87f67727e0 dt-bindings: arm: qcom,ids: Add SoC IDs for SM8150 and SA8155
Add SoC IDs for Qualcomm SM8150 and SA8155 SoCs.

Cc: Bjorn Andersson <andersson@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221201141619.2462705-2-bhupesh.sharma@linaro.org
2022-12-05 16:50:39 -06:00
Bhupesh Sharma
45ac44ed10 dt-bindings: power: rpmpd: Add SM4250 support
Add compatible and constants for the power domains exposed by the
SM4250 RPM.

Cc: Bjorn Andersson <andersson@kernel.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221127112204.1486337-2-bhupesh.sharma@linaro.org
2022-12-05 16:30:36 -06:00
Abel Vesa
147f6534b8 soc: qcom: socinfo: Add SM8550 ID
Add the ID for the Qualcomm SM8550 SoC.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221116112438.2643607-1-abel.vesa@linaro.org
2022-12-05 15:12:27 -06:00
Abel Vesa
f0f4727a12 dt-bindings: power: rpmpd: Add SM8550 to rpmpd binding
Add compatible and constants for the power domains exposed by the RPMH
in the Qualcomm SM8550 platform.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221116111745.2633074-2-abel.vesa@linaro.org
2022-12-05 15:11:05 -06:00
AngeloGioacchino Del Regno
484d7b4075 dt-bindings: arm: qcom,ids: Add SoC IDs for MSM8956 and MSM8976
Document the identifier of MSM8956/76.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221111120156.48040-7-angelogioacchino.delregno@collabora.com
2022-12-05 14:44:46 -06:00
Abel Vesa
47ba9c50bb dt-bindings: clock: Add SM8550 GCC clocks
Add device tree bindings for global clock controller on SM8550 SoCs.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130112852.2977816-2-abel.vesa@linaro.org
2022-12-01 17:26:41 -06:00
Robert Marko
bb524058eb dt-bindings: clock: qcom: ipq8074: add missing networking resets
Add bindings for the missing networking resets found in IPQ8074 GCC.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107132901.489240-2-robimarko@gmail.com
2022-12-01 17:26:35 -06:00
Arnd Bergmann
bcbc468528 Qualcomm ARM64 DTS updates for 6.2
This introduces support for SM4250, SM6115, SM6375 and SDM670 platforms
 and Sony Xperia 10 IV, Google Pixel 3a, OnePlus 3, OnePlus 3T, Google
 Pazquel and OnePlus Nord N100.
 
 A wide variety of updates to align with DeviceTree bindings across
 many/most platforms is introduced, and incorrectly styled comments are
 adjusted across the tree.
 
 Apps RSC is added to the cluster-idle power-domain across SM8150,
 SM8250, SM8350 and SM8450, to ensure sleep and wake votes are flushed as
 the last core is being powered down.
 
 Remoteproc firmware patches are aligned with agreed upon structure used
 in linux-firmware across Inforce 6560, Lenovo Miix 630, various Sony
 Xperia devices and Samsung Galaxy Book2 (although these are not
 available in linux-firmware today).
 
 On IPQ8074 CPU clocks are added, thermal zones are introduced and vqmmc
 supply is specified for the HK01 board.
 
 Alcatel OneTouch Idol 3 gains LED nodes and Samsung Galaxy A3U gained
 vibrator support.
 
 The application subsystem's IOMMU and the display subsystem is enabled
 for MSM8953.
 
 A new CPU frequency table is introduced for MSM8996Pro, to properly
 describe it separate of MSM8996. The GPU opp-table is extended as well.
 
 On SC7180 USB is marked as a wakeup source, USB gains required-opps to
 ensure that the core voltage rail is voted for as needed. The
 description of the fingerprint sensor in Trogdor is corrected.
 
 On SC7280 Wake-on-WLAN is introduced, and PHY parameters for the SNPS
 USB PHY is defined across SC7280.
 
 The memory map across Google Herobrine is adjusted, to regain unused
 memory on the WiFi SKUs.  A LTE SKU of the Evoker board is introduced
 and the bard gains touchscreen.
 NVME support is disabled on Villager boards, as it's not used.
 
 PCIe support is introduced on SC8280XP, with NVMe, SDX55 (5G) and WiFi
 enabled on the Lenovo Thinkpad X13s and Compute Reference Device. ADCs
 and thermal zones are intrduced for the same. Lenovo Thinkpad X13s
 gains LID switch support.
 
 Fairphone FP3 gains touchscreen support.
 
 Support for Xiaomi Poco F1 variant with EBBG panel.
 
 The round-robin ADC is enabled across DB845c, OnePlus devices and
 Pocophone F1 devices.
 
 The displayport controller on SDM845 is introduced.
 
 SM6350 gains SDHCI support and on Sony Xperia 10 III sd-card,
 touchscreen and GPI DMA is enabled.
 
 Fairphone FP4 got SD-card support.
 
 UFS PHY register ranges are corrected across SM8150, SM8250, SM8350 and
 SM8450.
 
 Sony Xperia 1 II got NFC support and Sony Xperia 5 III got PMIC
 regulators defined and USB definition corrected, to enable USB3.
 
 The SDHCI controller is described for SM8450 and microSD support is
 enabled for the HDK and QRD devices.
 
 SM8450 also gains camera CCI interface and display clock controller.
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Merge tag 'qcom-arm64-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm ARM64 DTS updates for 6.2

This introduces support for SM4250, SM6115, SM6375 and SDM670 platforms
and Sony Xperia 10 IV, Google Pixel 3a, OnePlus 3, OnePlus 3T, Google
Pazquel and OnePlus Nord N100.

A wide variety of updates to align with DeviceTree bindings across
many/most platforms is introduced, and incorrectly styled comments are
adjusted across the tree.

Apps RSC is added to the cluster-idle power-domain across SM8150,
SM8250, SM8350 and SM8450, to ensure sleep and wake votes are flushed as
the last core is being powered down.

Remoteproc firmware patches are aligned with agreed upon structure used
in linux-firmware across Inforce 6560, Lenovo Miix 630, various Sony
Xperia devices and Samsung Galaxy Book2 (although these are not
available in linux-firmware today).

On IPQ8074 CPU clocks are added, thermal zones are introduced and vqmmc
supply is specified for the HK01 board.

Alcatel OneTouch Idol 3 gains LED nodes and Samsung Galaxy A3U gained
vibrator support.

The application subsystem's IOMMU and the display subsystem is enabled
for MSM8953.

A new CPU frequency table is introduced for MSM8996Pro, to properly
describe it separate of MSM8996. The GPU opp-table is extended as well.

On SC7180 USB is marked as a wakeup source, USB gains required-opps to
ensure that the core voltage rail is voted for as needed. The
description of the fingerprint sensor in Trogdor is corrected.

On SC7280 Wake-on-WLAN is introduced, and PHY parameters for the SNPS
USB PHY is defined across SC7280.

The memory map across Google Herobrine is adjusted, to regain unused
memory on the WiFi SKUs.  A LTE SKU of the Evoker board is introduced
and the bard gains touchscreen.
NVME support is disabled on Villager boards, as it's not used.

PCIe support is introduced on SC8280XP, with NVMe, SDX55 (5G) and WiFi
enabled on the Lenovo Thinkpad X13s and Compute Reference Device. ADCs
and thermal zones are intrduced for the same. Lenovo Thinkpad X13s
gains LID switch support.

Fairphone FP3 gains touchscreen support.

Support for Xiaomi Poco F1 variant with EBBG panel.

The round-robin ADC is enabled across DB845c, OnePlus devices and
Pocophone F1 devices.

The displayport controller on SDM845 is introduced.

SM6350 gains SDHCI support and on Sony Xperia 10 III sd-card,
touchscreen and GPI DMA is enabled.

Fairphone FP4 got SD-card support.

UFS PHY register ranges are corrected across SM8150, SM8250, SM8350 and
SM8450.

Sony Xperia 1 II got NFC support and Sony Xperia 5 III got PMIC
regulators defined and USB definition corrected, to enable USB3.

The SDHCI controller is described for SM8450 and microSD support is
enabled for the HDK and QRD devices.

SM8450 also gains camera CCI interface and display clock controller.

* tag 'qcom-arm64-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (261 commits)
  arm64: dts: qcom: sdm845-polaris: Don't duplicate DMA assignment
  arm64: dts: qcom: sm8350-sagami: Wire up USB regulators and fix USB3
  arm64: dts: qcom: sm8350-sagami: Add most RPMh regulators
  arm64: dts: qcom: sc7280: Make herobrine-audio-rt5682 mic dtsi's match more
  arm64: dts: qcom: trim addresses to 8 digits
  arm64: dts: msm8998: unify PCIe clock order withMSM8996
  arm64: dts: msm8998: add MSM8998 specific compatible
  arm64: dts: qcom: sc8280xp-x13s: enable WiFi controller
  arm64: dts: qcom: sc8280xp-x13s: enable modem
  arm64: dts: qcom: sc8280xp-x13s: enable NVMe SSD
  arm64: dts: qcom: sc8280xp-crd: enable WiFi controller
  arm64: dts: qcom: sc8280xp-crd: enable SDX55 modem
  arm64: dts: qcom: sc8280xp-crd: enable NVMe SSD
  arm64: dts: qcom: sc8280xp-crd: rename backlight and misc regulators
  arm64: dts: qcom: sa8295p-adp: enable PCIe
  arm64: dts: qcom: sc8280xp/sa8540p: add PCIe2-4 nodes
  arm64: dts: qcom: add sdm670 and pixel 3a device trees
  arm64: dts: qcom: sc7280: Add Google Herobrine WIFI SKU dts fragment
  arm64: dts: qcom: sc7280: Mark all Qualcomm reference boards as LTE
  arm64: dts: qcom: sm7225-fairphone-fp4: Enable SD card
  ...

Link: https://lore.kernel.org/r/20221124100650.1982448-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-30 15:01:31 +01:00
Arnd Bergmann
0c5f21291c
Merge tag 'v6.2-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into asahi-wip
New boards:
- Model A and blade baseboards for the SOQuartz (rk3568) SoM,
- Anberic RG351M, RG353V, RG353VS; Odroid Go Super, Advance gaming devices
- Odroid M1
- Theobroma px30 SoM with baseboard
- Rockchip's own rk3566 demo board

Some core support for per SoC specifics:
- crypto support for rk3399 and rk3328
- second I2S controller for rk3568
- Cache properties for follow the binding for rk3308 and rk3328

Bigger device support updates for:
- SOQuartz: PCIe2, video output, gpu, HDMI sound
- Rock 3A: eth regulator, eth clock input, Wifi+Bt, I2S, PCIe3

As well as some minor extensions for Rock960 (hdmi supplies),
rk3566-roc-pc (PCIe2), Rock 4C+ (thermal support), Pinephone Pro (Wifi+Bt)

* tag 'v6.2-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (51 commits)
  arm64: dts: rockchip: update cache properties for rk3308 and rk3328
  arm64: dts: rockchip: Add SOQuartz Model A baseboard
  dt-bindings: arm: rockchip: Add SOQuartz Model A
  arm64: dts: rockchip: Add SOQuartz blade board
  dt-bindings: arm: rockchip: Add SOQuartz Blade
  arm64: dts: rockchip: Add Anbernic RG351M
  arm64: dts: rockchip: Add Odroid Go Super
  arm64: dts: rockchip: Add Odroid Go Advance Black Edition
  dt-bindings: arm: rockchip: Add more RK3326 devices
  arm64: dts: rockchip: Move most of Odroid Go Advance DTS into a DTSI
  arm64: dts: rockchip: Add support of regulator for ethernet node on Rock 3A SBC
  arm64: dts: rockchip: Add support of external clock to ethernet node on Rock 3A SBC
  arm64: dts: rockchip: Add HDMI supplies on Rock960
  arm64: dts: rockchip: Add dts for rockchip rk3566 box demo board
  dt-bindings: rockchip: Add Rockchip rk3566 box demo board
  arm64: dts: rockchip: Enable PCIe 2 on SOQuartz CM4IO
  arm64: dts: rockchip: Enable HDMI sound on SOQuartz
  arm64: dts: rockchip: Enable video output and HDMI on SOQuartz
  arm64: dts: rockchip: Enable GPU on SOQuartz CM4
  arm64: dts: rockchip: enable pcie2 on rk3566-roc-pc
  ...

Link: https://lore.kernel.org/r/4716610.aeNJFYEL58@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-29 21:16:07 +01:00
Tanmay Shah
ba4fde74fc dt-bindings: remoteproc: Add Xilinx RPU subsystem bindings
Xilinx ZynqMP platform has dual-core ARM Cortex R5 Realtime Processing
Unit(RPU) subsystem. This patch adds dt-bindings for RPU subsystem
(cluster).

Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221114233940.2096237-2-tanmay.shah@amd.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2022-11-25 09:08:45 -07:00
Dario Binacchi
bedcf9d1dc clk: imx: rename video_pll1 to video_pll
Unlike audio_pll1 and audio_pll2, there is no video_pll2. Further, the
name used in the RM is video_pll. So, let's rename "video_pll1" to
"video_pll" to be consistent with the RM and avoid misunderstandings.

The IMX8MN_VIDEO_PLL1* constants have not been removed to ensure
backward compatibility of the patch.

No functional changes intended.

Fixes: 96d6392b54 ("clk: imx: Add support for i.MX8MN clock driver")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20221117113637.1978703-4-dario.binacchi@amarulasolutions.com
2022-11-25 11:18:16 +02:00
Dario Binacchi
a429c60bae clk: imx8mn: rename vpu_pll to m7_alt_pll
The IMX8MN platform does not have any video processing unit (VPU), and
indeed in the reference manual (document IMX8MNRM Rev 2, 07/2022) there
is no occurrence of its pll. From an analysis of the code and the RM
itself, I think vpu pll is used instead of m7 alternate pll, probably
for copy and paste of code taken from modules of similar architectures.

As an example for all, if we consider the second row of the "Clock Root"
table of chapter 5 (Clocks and Power Management) of the RM:

     Clock Root     offset     Source Select (CCM_TARGET_ROOTn[MUX])
        ...          ...                    ...
  ARM_M7_CLK_ROOT   0x8080            000 - 24M_REF_CLK
                                      001 - SYSTEM_PLL2_DIV5
				      010 - SYSTEM_PLL2_DIV4
				      011 - M7_ALT_PLL_CLK
				      100 - SYSTEM_PLL1_CLK
				      101 - AUDIO_PLL1_CLK
				      110 - VIDEO_PLL_CLK
				      111 - SYSTEM_PLL3_CLK
        ...          ...                    ...

but in the source code, the imx8mn_m7_sels clocks list contains vpu_pll
for the source select bits 011b.

So, let's rename "vpu_pll" to "m7_alt_pll" to be consistent with the RM.

The IMX8MN_VPU_* constants have not been removed to ensure backward
compatibility of the patch.

No functional changes intended.

Fixes: 96d6392b54 ("clk: imx: Add support for i.MX8MN clock driver")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20221117113637.1978703-2-dario.binacchi@amarulasolutions.com
2022-11-25 11:17:34 +02:00
Laurent Pinchart
f7eeb00845 media: dt-bindings: media: Add macros for video interface bus types
Add a new dt-bindings/media/video-interfaces.h header that defines
macros corresponding to the bus types from media/video-interfaces.yaml.
This allows avoiding hardcoded constants in device tree sources.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Jacopo Mondi <jacopo@jmondi.org>
Reviewed-by: Paul Elder <paul.elder@ideasonboard.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
2022-11-25 08:41:45 +00:00
Johan Hovold
e1c4c5436b dt-bindings: phy: qcom,qmp-usb3-dp: fix sc8280xp binding
The current QMP USB3-DP PHY bindings are based on the original MSM8996
binding which provided multiple PHYs per IP block and these in turn were
described by child nodes.

The QMP USB3-DP PHY block provides a single multi-protocol PHY and even
if some resources are only used by either the USB or DP part of the
device there is no real benefit in describing these resources in child
nodes.

The original MSM8996 binding also ended up describing the individual
register blocks as belonging to either the wrapper node or the PHY child
nodes.

This is an unnecessary level of detail which has lead to problems when
later IP blocks using different register layouts have been forced to fit
the original mould rather than updating the binding. The bindings are
arguable also incomplete as they only the describe register blocks used
by the current Linux drivers (e.g. does not include the PCS LANE
registers).

This is specifically true for later USB4-USB3-DP QMP PHYs where the TX
registers are used by both the USB3 and DP parts of the PHY (and where
the USB4 part of the PHY was not covered by the binding at all). Notably
there are also no DP "RX" (sic) registers as described by the current
bindings and the DP "PCS" region is really a set of DP_PHY registers.

Add a new binding for the USB4-USB3-DP QMP PHYs found on SC8280XP which
further bindings can be based on.

Note that the binding uses a PHY index to access either the USB3 or DP
part of the PHY and that this can later be used also for the USB4 part
if needed.

Similarly, the clock inputs and outputs can later be extended to support
USB4.

Also note that the current binding is simply removed instead of being
deprecated as it was only recently merged and would not allow for
supporting DP mode.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221121085058.31213-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-11-24 22:51:50 +05:30
Arnd Bergmann
66b55cae49
Merge tag 'qcom-drivers-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
Qualcomm driver updates for 6.2

The qcom,msm-id and qcom,board-id DeviceTree properties are documented,
to allow them to be used in configurations or devices requiring these
and the socinfo driver is updated to reuse the introduced identifiers.

The rpmh-rsc driver is extended to register for PM runtime notifications
from the CPU clusters, in order to submit sleep and wake votes the last
core in a cluster is being powered down.

A mechanism for keeping rpmhpd resources voted until sync_state is
introduced, this ensures that power-domains required during boot are
kept enabled. The rpmhpd power-domains for SDM670 are also added.

Support for the new QDU1000/QRU1000 platform is introduced in the rpmhpd
and socinfo drivers.

The APR driver gains missing error handling. QMI message descriptors in
the PDR driver are made const.

Support for the RPM found in SM6375 is added. The SPM driver gains
support for MSM8939 and MSM8976 platforms.

The stats and command-db drvers are marked as not having PM support.

* tag 'qcom-drivers-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (36 commits)
  dt-bindings: firmware: scm: add sdm670 compatible
  soc: qcom: rpmh-rsc: Write CONTROL_TCS with next timer wakeup
  soc: qcom: rpmh-rsc: Save base address of drv
  PM: domains: Store the next hrtimer wakeup in genpd
  soc: qcom: rpmh-rsc: Attach RSC to cluster PM domain
  dt-bindings: soc: qcom: Update devicetree binding document for rpmh-rsc
  dt-bindings: soc: qcom: qcom,smd-rpm: Use qcom,smd-channels on MSM8976
  soc: qcom: apr: Add check for idr_alloc and of_property_read_string_index
  soc: qcom: socinfo: Add QDU1000/QRU1000 SoC IDs to the soc_id table
  dt-bindings: arm: qcom,ids: Add SoC IDs for QDU1000/QRU1000
  soc: qcom: rpmhpd: Add QDU1000/QRU1000 power domains
  dt-bindings: power: rpmpd: Add QDU1000/QRU1000 to rpmpd binding
  dt-bindings: qcom: smp2p: Add WPSS node names to pattern property
  soc: qcom: spm: Implement support for SAWv2.3, MSM8976 L2 PM
  dt-bindings: soc: qcom: spm: Add compatibles for MSM8976 L2
  soc: qcom: llcc: make irq truly optional
  soc: qcom: spm: Add MSM8939 SPM register data
  dt-bindings: soc: qcom: spm: Add MSM8939 CPU compatible
  dt-bindings: soc: qcom: aoss: Add sc8280xp compatible
  dt-bindings: firmware: document Qualcomm SM6375 SCM
  ...

Link: https://lore.kernel.org/r/20221122202748.1854487-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-23 12:02:44 +01:00
Arnd Bergmann
83cbe78a9c dt-bindings: Changes for v6.2-rc1
New memory client IDs and IOMMU stream IDs, as well as new compatible
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 tree bindings are converted to json-schema to allow formal validation.
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Merge tag 'tegra-for-6.2-dt-bindings-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

dt-bindings: Changes for v6.2-rc1

New memory client IDs and IOMMU stream IDs, as well as new compatible
strings are introduced to support more hardware on Tegra234. Some device
tree bindings are converted to json-schema to allow formal validation.

* tag 'tegra-for-6.2-dt-bindings-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: usb: tegra-xusb: Convert to json-schema
  dt-bindings: pwm: tegra: Convert to json-schema
  dt-bindings: pinctrl: tegra194: Separate instances
  dt-bindings: pinctrl: tegra: Convert to json-schema
  dt-bindings: PCI: tegra234: Add ECAM support
  dt-bindings: pwm: tegra: Document Tegra234 PWM
  dt-bindings: Add bindings for Tegra234 NVDEC
  dt-bindings: tegra: Update headers for Tegra234
  dt-bindings: Add headers for NVDEC on Tegra234

Link: https://lore.kernel.org/r/20221121171239.2041835-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-11-22 23:00:58 +01:00
Abel Vesa
36759c4fe2 dt-bindings: clock: imx8mp: Add ids for the audio shared gate
All these IDs are for one single HW gate (CCGR101) that is shared
between these root clocks.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/1667811007-19222-2-git-send-email-shengjiu.wang@nxp.com
2022-11-22 00:04:49 +02:00
Peng Fan
352a308af7 dt-bindings: clock: imx93: drop TPM1/3 LPIT1/2 entry
Per updated Reference Mannual, the TPM[1,3] LPIT[1,2] root clock entries
are reserved, it is because writing the CCM registers does nothing
because the TPM[1,3] and LPIT[1,2] IPs source from bus clk, not from the
TPM[1,3] LPIT[1,2] entries. And because there is no SW entity is using the
entries since adding them, let's drop them.

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20221028095211.2598312-4-peng.fan@oss.nxp.com
2022-11-21 22:40:53 +02:00
Li Jun
5c1f7f1090 dt-bindings: clocks: imx8mp: Add ID for usb suspend clock
usb suspend clock has a gate shared with usb_root_clk.

Fixes: 9c140d9926 ("clk: imx: Add support for i.MX8MP clock driver")
Cc: stable@vger.kernel.org # v5.19+
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/1664549663-20364-1-git-send-email-jun.li@nxp.com
2022-11-21 17:56:06 +02:00
Jon Hunter
41155b6f6d dt-bindings: tegra: Update headers for Tegra234
Update the device-tree clock, memory, power and reset headers for
Tegra234 by adding the definitions for all the various devices.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-21 13:27:17 +01:00
Runyang Chen
fea58041af dt-bindings: reset: mt8188: add toprgu reset-controller header file
Add toprgu reset-controller header file for MT8188

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20221026063327.20037-3-Runyang.Chen@mediatek.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2022-11-19 15:30:35 +01:00
Fabien Parent
59a316fdc4 dt-bindings: iommu: mediatek: add binding documentation for MT8365 SoC
Add IOMMU binding documentation for the MT8365 SoC.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Yong Wu <yong.wu@mediatek.com>
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20221001-iommu-support-v6-1-be4fe8da254b@baylibre.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-11-19 10:11:09 +01:00
Andre Przywara
f64603c972 clk: sunxi-ng: f1c100s: Add IR mod clock
For some reason the mod clock for the Allwinner F1C100s CIR (infrared
receiver) peripheral was not modeled in the CCU driver.

Add the clock description to the list, and wire it up in the clock list.
By assigning a new clock ID at the end, it extends the number of clocks.

This allows to use the CIR peripheral on any F1C100s series board.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221107005433.11079-5-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-11-16 19:49:18 +01:00
Konrad Dybcio
9285e61a56 dt-bindings: clock: add QCOM SM6375 display clock
Add device tree bindings for display clock controller for
Qualcomm Technology Inc's SM6375 SoC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221115155808.10899-1-konrad.dybcio@linaro.org
2022-11-15 10:46:31 -06:00
Sebastian Reichel
0a8eb7dae6 dt-bindings: reset: add rk3588 reset definitions
Add reset ID defines for rk3588.

Compared to the downstream bindings and previous rockchip
generations this uses continous gapless reset IDs starting
at 0 instead of register offsets as IDs. Thus all numbers
are different between upstream and downstream, but I kept
the names exactly the same.

Co-Developed-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20221018151407.63395-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-11-14 15:28:47 +01:00
Sebastian Reichel
f204a60e54 dt-bindings: clock: add rk3588 clock definitions
Add clock ID defines for rk3588.

Compared to the downstream bindings written by Elaine, this uses
continous gapless clock IDs starting at 0. Thus all numbers are
different between downstream and upstream, but I kept exactly the
same names.

Co-Developed-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20221018151407.63395-2-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-11-14 15:28:47 +01:00
Wei Li
c12c19877b dt-bindings: pinctrl: Correct the header guard of mt6795-pinfunc.h
Rename the header guard of mt6795-pinfunc.h from __DTS_MT8173_PINFUNC_H to
__DTS_MT6795_PINFUNC_H what corresponding with the file name.

Fixes: 81557a7156 ("dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings")
Signed-off-by: Wei Li <liwei391@huawei.com>
Link: https://lore.kernel.org/r/20221108094529.3597920-1-liwei391@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-11-10 09:19:43 +01:00
Bjorn Andersson
73d9c10a96 dt-bindings: clock: Add Qualcomm SC8280XP display clock bindings
The Qualcomm SC8280XP platform has two display clock controllers, add a
binding for these.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220926203800.16771-2-quic_bjorande@quicinc.com
2022-11-09 21:16:04 -06:00
Melody Olvera
3b1611f252 dt-bindings: arm: qcom,ids: Add SoC IDs for QDU1000/QRU1000
Add SoC IDs for Qualcomm QDU1000 and QRU1000 platforms and their
variants.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026190549.4005703-5-quic_molvera@quicinc.com
2022-11-07 11:49:41 -06:00
Melody Olvera
8aa5cac4a2 dt-bindings: power: rpmpd: Add QDU1000/QRU1000 to rpmpd binding
Add compatible and constants for the power domains exposed by the RPMH
in the Qualcomm QDU1000 and QRU1000 platforms.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026190549.4005703-3-quic_molvera@quicinc.com
2022-11-07 11:49:41 -06:00
Manivannan Sadhasivam
22f1d06f4f dt-bindings: iio: qcom: adc7-pm8350: Allow specifying SID for channels
As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC
has the static Slave ID (SID) assigned by default. The primary PMIC
PMK8350 is responsible for collecting the temperature/voltage data from
the slave PMICs and exposing them via it's registers.

For getting the measurements from the slave PMICs, PMK8350 uses the
channel ID encoded with the SID of the relevant PMIC. So far, the
dt-binding for the slave PMIC PM8350 assumed that there will be only
one PM8350 in a system. So it harcoded SID 1 with channel IDs.

But this got changed in platforms such as Lenovo X13s where there are a
couple of PM8350 PMICs available. So to address multiple PM8350s, change
the binding to accept the SID specified by the user and use it for
encoding the channel ID.

It should be noted that, even though the SID is static it is not
globally unique. Only the primary PMIC has the unique SID id 0.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-2-manivannan.sadhasivam@linaro.org
2022-11-06 21:11:11 -06:00
Robert Foss
c2b6ad7295 dt-bindings: clock: dispcc-sm8250: Add EDP_LINK_DIV_CLK_SRC index
Add this previously missing index, since it is supported by the SoCs
targeted by the dispcc-sm8250 driver.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221102090140.965450-4-robert.foss@linaro.org
2022-11-05 23:38:19 -05:00
Siarhei Volkau
4cb21b9ede dt-bindings: clock: Add Ingenic JZ4755 CGU header
This will be used from the devicetree bindings to specify the clocks
that should be obtained from the jz4755-cgu driver.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221027192024.484320-3-lis8215@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-27 14:51:23 -07:00
Aidan MacDonald
5e5b1005f9 dt-bindings: ingenic,x1000-cgu: Add audio clocks
Add bindings for audio-related clocks on the Ingenic X1000 SoC.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20221026194345.243007-5-aidanmacdonald.0x0@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-10-27 11:59:05 -07:00
Mikko Perttunen
0e2b014eeb dt-bindings: Add headers for NVDEC on Tegra234
Add clock, memory controller, powergate and reset dt-binding headers
necessary for NVDEC.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-10-24 14:53:35 +02:00