Commit graph

1388 commits

Author SHA1 Message Date
Christian König
0f30a397d9 drm/amdgpu: implement UVD VM mode for Stoney v2
Starting with Stoney we support running UVD in VM mode as well.

v2: rebased, only enable on Polaris for now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:36:57 -04:00
Markus Elfring
b4fc5972c1 drm/amdgpu: Change assignment for a variable in amdgpu_cgs_acpi_eval_object()
Indicate successful function execution only at the end.
Thus omit initialisation for the variable "result" at the beginning.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:36:54 -04:00
Markus Elfring
eb09d7a7c9 drm/amdgpu: Delete an unnecessary variable initialisation in amdgpu_cgs_acpi_eval_object()
The variable "argument" will be set to an appropriate value a bit later.
Thus omit the explicit initialisation at the beginning.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:36:53 -04:00
Markus Elfring
dffa6d4f80 drm/amdgpu: Delete a variable in amdgpu_cgs_acpi_eval_object()
The local variable "func_no" was assigned a value at two places.
But it was not read within this function. Thus delete it.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:36:53 -04:00
Markus Elfring
1a8e5f28c9 drm/amdgpu: One function call less in amdgpu_cgs_acpi_eval_object() after error detection
The kfree() function was called in one case by the
amdgpu_cgs_acpi_eval_object() function during error handling
even if the passed variable "obj" contained a null pointer.

* Adjust jump targets according to the Linux coding style convention.

* Delete unnecessary initialisations for the variables "obj"
  and "params" then.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:36:52 -04:00
Markus Elfring
1721c69c33 drm/amdgpu: Delete an unnecessary check before drm_gem_object_unreference_unlocked()
The drm_gem_object_unreference_unlocked() function tests whether
its argument is NULL and then returns immediately.
Thus the test around the call is not needed.

This issue was detected by using the Coccinelle software.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:36:52 -04:00
Edward O'Callaghan
a698e41782 drivers/amdgpu: Remove redundant NULL check before kfree()
Found-by: Coccinelle
Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:36:49 -04:00
Edward O'Callaghan
004e29ccf0 drivers/amdgpu: Use canonical form in branch predicates
Found-by: Coccinelle
Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:36:48 -04:00
Edward O'Callaghan
ed5121a3d8 drivers/amdgpu: Use 'true/false' for bool typed variables
Found-by: Coccinelle
Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:36:48 -04:00
Edward O'Callaghan
9c3578af81 drivers/amdgpu: Remove spurious semicolons
Found-by: Coccinelle
Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:36:47 -04:00
Lyude
23a1a9e54e drm/amdgpu: Disable RPM helpers while reprobing connectors on resume
Just about all of amdgpu's connector probing functions try to acquire
runtime PM refs. If we try to do this in the context of
amdgpu_resume_kms by calling drm_helper_hpd_irq_event(), we end up
deadlocking the system.

Since we're guaranteed to be holding the spinlock for RPM in
amdgpu_resume_kms, and we already know the GPU is in working order, we
need to prevent the RPM helpers from trying to run during the initial
connector reprobe on resume.

There's a couple of solutions I've explored for fixing this, but this
one by far seems to be the simplest and most reliable (plus I'm pretty
sure that's what disable_depth is there for anyway).

Reproduction recipe:
  - Get any laptop dual GPUs using PRIME
  - Make sure runtime PM is enabled for amdgpu
  - Boot the machine
  - If the machine managed to boot without hanging, switch out of X to
    another VT. This should definitely cause X to hang infinitely.

Changes since v1:
  - add appropriate #ifdef checks for CONFIG_PM. This is not very
    useful, but it appears some kernel test suites test compiling amdgpu
    with CONFIG_PM disabled, which results in this patch breaking the builds
    if we don't include this #ifdef

Cc: stable@vger.kernel.org
Cc: Alex Deucher <alexdeucher@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lyude <cpaul@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-29 14:36:44 -04:00
Alex Deucher
6b1095eedd drm/amdgpu: init atpx at switcheroo register time (v2)
If we do it at enable time, it's too late for the feature
checks.

v2: drop .init setting as per Peter's comments

Reviewed-by: Peter Wu <peter@lekensteyn.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Peter Wu <peter@lekensteyn.nl>
2016-07-29 14:36:32 -04:00
Alex Deucher
a8a04c994d drm/amdgpu: fix firmware info version checks
Some of the checks didn't handle frev 2 tables properly.
amdgpu doesn't support any tables pre-frev 2, so drop
the checks.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-07-28 10:07:07 -04:00
Dave Airlie
162b20d2f9 Merge branch 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few more patches for 4.8.  Mostly bug fixes and some prep work
for iceland powerplay support.  I have a couple polaris patches and
Edward's misc cleanups that require a merge with Linus'.  I don't know
if you are planning a merge anytime soon.

[airlied: fixed up endian vs 32-bit change in ppatomctrl]

* 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux: (26 commits)
  drm/amdgpu: comment out unused defaults_bonaire_pro static const structures to fix the build
  drm/amdgpu: temporary comment out unused static const structures to fix the build
  drm/amdgpu: S3 resume fail on Polaris10
  drm/amd/powerplay: add pp_tables_get_response_times function in process pptables
  drm/amd/powerplay: fix the incorrect return value
  drm/amd/powerplay: add atomctrl_get_voltage_evv function in ppatomctrl
  drm/amdgpu: add new definitions into ppsmc.h for iceland
  drm/amd/powerplay: add SMU register macro for future use
  drm/amdgpu: add ucode_start_address into cgs_firmware_info
  drm/amdgpu: no need load microcode at sdma if powerplay is enabled
  drm/amdgpu: rename smumgr to smum for dpm
  drm/amdgpu: disable GFX PG on CZ/BR/ST
  drivers: gpu: drm: amd: powerplay: hwmgr: Remove unused variable
  drm/amdgpu: return -ENOSPC when running out of UVD handles
  drm/amdgpu: trace need_flush in grab_vm as well
  drm/amdgpu: always signal all fences
  drm/amdgpu: check flush fence context instead of same ring v2
  drm/radeon: support backlight control for UNIPHY3
  drm/amdgpu: support backlight control for UNIPHY3
  drm/amdgpu: remove usec timeout loop from IB tests
  ...
2016-07-28 05:51:39 +10:00
Dave Airlie
5e580523d9 Linux 4.7
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJXlRXSAAoJEHm+PkMAQRiGG/gH/0Z8O4zWOsrwO+X1mRToRDBH
 joFOjAmCVe83T1VpF5LYNB+9+owL/dEDt6+ZIswnhH7AfQPjs4RqwS4PcuMbCDVO
 +mDm0PmfcKaYcQZrB2Z2OwIzRNnfCTVcsDPhIHwuIHk0m4z/xuGZonD8KoAj0+tO
 3yJF6sbE1KubDVjOb+lmZZSP3cXA0pDXrNhkYhE4Tsr8fiihGjeXSNJ8t2zPLjxo
 W3MPqo0rzDvQsOwoF4TWHHagVaFSJlhLBBgqu33fI7uO3jtfQD2G8wG68JCND1j3
 qbMoBfTLFV/yQmSIJUt0Wv1axaCcwnjpweEB35A/GEeZ0mNB1rDdoBeI1eKEQkc=
 =DGFC
 -----END PGP SIGNATURE-----

Backmerge tag 'v4.7' into drm-next

Linux 4.7

As requested by Daniel Vetter as the conflicts were getting messy.
2016-07-26 17:26:29 +10:00
Rafael J. Wysocki
fa70db3f19 Merge branches 'pm-core', 'pm-clk', 'pm-domains' and 'pm-pci'
* pm-core:
  PM / runtime: Asynchronous "idle" in pm_runtime_allow()
  PM / runtime: print error when activating a child to unactive parent

* pm-clk:
  PM / clk: Add support for adding a specific clock from device-tree
  PM / clk: export symbols for existing pm_clk_<...> API fcns

* pm-domains:
  PM / Domains: Convert pm_genpd_init() to return an error code
  PM / Domains: Stop/start devices during system PM suspend/resume in genpd
  PM / Domains: Allow runtime PM during system PM phases
  PM / Runtime: Avoid resuming devices again in pm_runtime_force_resume()
  PM / Domains: Remove redundant pm_request_idle() call in genpd
  PM / Domains: Remove redundant wrapper functions for system PM
  PM / Domains: Allow genpd to power on during system PM phases

* pm-pci:
  PCI / PM: check all fields in pci_set_platform_pm()
2016-07-25 13:45:27 +02:00
Slava Grigorev
5ef8292925 drm/amdgpu: comment out unused defaults_bonaire_pro static const structures to
fix the build

Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-15 14:23:08 -04:00
Slava Grigorev
4dbbe6a20e drm/amdgpu: temporary comment out unused static const structures to fix the build
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-15 14:22:48 -04:00
jimqu
567e6e2984 drm/amdgpu: S3 resume fail on Polaris10
Sometimes, driver can not return from fence waiting when doing VCE ring
ib test. The issue is a asic special and random issue. so adjust VCE suspend
and resume sequence.

Signed-off-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-15 12:34:18 -04:00
Huang Rui
0a552a3296 drm/amdgpu: add new definitions into ppsmc.h for iceland
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-15 12:33:31 -04:00
Huang Rui
340efe2898 drm/amdgpu: add ucode_start_address into cgs_firmware_info
The ucode_start_address would be used on powerplay of iceland.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-15 12:33:10 -04:00
Huang Rui
86a42f04d1 drm/amdgpu: no need load microcode at sdma if powerplay is enabled
SDMA firmware will be loaded by SMU manager if powerplay is enabled.
So it needn't load at SDMA.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-15 12:33:00 -04:00
Huang Rui
f5a13660cc drm/amdgpu: rename smumgr to smum for dpm
Rename smumgr.h to smum.h, because smum.h is to align with the dpm of
other chips and we will use "iceland_smumgr" at powerplay in following
patches.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-15 12:32:50 -04:00
Alex Deucher
c02da764da drm/amdgpu: disable GFX PG on CZ/BR/ST
Still some stability issues under certain workloads.

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-15 12:28:12 -04:00
Dave Airlie
6c181c8210 Merge tag 'topic/drm-misc-2016-07-14' of git://anongit.freedesktop.org/drm-intel into drm-next
I recovered dri-devel backlog from my vacation, more misc stuff:
- of_put_node fixes from Peter Chen (not all yet)
- more patches from Gustavo to use kms-native drm_crtc_vblank_* funcs
- docs sphinxification from Lukas Wunner
- bunch of fixes all over from Dan Carpenter
- more follow up work from Chris register/unregister rework in various
  places
- vgem dma-buf export (for writing testcases)
- small things all over from tons of different people

* tag 'topic/drm-misc-2016-07-14' of git://anongit.freedesktop.org/drm-intel: (52 commits)
  drm: Don't overwrite user ioctl arg unless requested
  dma-buf/sync_file: improve Kconfig description for Sync Files
  MAINTAINERS: add entry for the Sync File Framework
  drm: Resurrect atomic rmfb code
  drm/vgem: Use PAGE_KERNEL in place of x86-specific PAGE_KERNEL_IO
  qxl: silence uninitialized variable warning
  qxl: check for kmap failures
  vga_switcheroo: Sphinxify docs
  drm: Restore double clflush on the last partial cacheline
  gpu: drm: rockchip_drm_drv: add missing of_node_put after calling of_parse_phandle
  gpu: drm: sti_vtg: add missing of_node_put after calling of_parse_phandle
  gpu: drm: sti_hqvdp: add missing of_node_put after calling of_parse_phandle
  gpu: drm: sti_vdo: add missing of_node_put after calling of_parse_phandle
  gpu: drm: sti_compositor: add missing of_node_put after calling of_parse_phandle
  drm/tilcdc: use drm_crtc_handle_vblank()
  drm/rcar-du: use drm_crtc_handle_vblank()
  drm/nouveau: use drm_crtc_handle_vblank()
  drm/atmel: use drm_crtc_handle_vblank()
  drm/armada: use drm_crtc_handle_vblank()
  drm: make drm_vblank_count_and_time() static
  ...
2016-07-15 11:01:37 +10:00
Christian König
7129d3ae9d drm/amdgpu: return -ENOSPC when running out of UVD handles
This is a minor interface change, but clearly won't break anything.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:46:08 -04:00
Christian König
0c0fdf1439 drm/amdgpu: trace need_flush in grab_vm as well
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:46:08 -04:00
Christian König
2ef004d984 drm/amdgpu: always signal all fences
A little fallout from "drm/amdgpu: sanitize fence numbers", we
sometimes need to signal all fences in the ring.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:46:07 -04:00
Christian König
090b767e97 drm/amdgpu: check flush fence context instead of same ring v2
Otherwise we can run into the following situation:

1. Process A grabs ID 1 for ring 0.
2. Process B grabs ID 1 for ring 0.
3. Process A grabs ID 1 for ring 1.
4. Process A tries to reuse ID1 for ring 0 but things he doesn't need to flush.

v2: check the context of the flush fence instead of messing with the owner field.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:46:07 -04:00
Alex Deucher
dba6c4fa26 drm/amdgpu: support backlight control for UNIPHY3
Same interface as other UNIPHY blocks

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-07-14 16:46:06 -04:00
Christian König
6d44565d53 drm/amdgpu: remove usec timeout loop from IB tests
We already waited for the fence, so waiting for the registers
is completely pointless and just copy & pasted from the ring test.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:46:05 -04:00
Christian König
22a77cf6d8 drm/amdgpu: cleanup hw reference handling in the IB tests
Reference should be taken when we make the assignment, not anywhere else.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:46:05 -04:00
Christian König
0808663517 drm/amdgpu: cleanup UVD coding style
Cleanup 80 chars limit.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:46:04 -04:00
Christian König
e5223214b2 drm/amdgpu: allow multiple sessions in the same VCE IB
We always used updated firmware for amdgpu, so this actually should work fine.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:46:04 -04:00
Christian König
182830a178 drm/amdgpu: cleanup VCE coding style
Fix 80 chars issues and remove some dead code as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:46:03 -04:00
Christian König
4f399a0828 drm/amdgpu: sanitize fence numbers
Looks like the VCE block sometimes still sends nonsense
fence numbers on startup.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:46:03 -04:00
Ken Wang
eeade25ad0 drm/amdgpu: fix power distribution issue for Polaris10 XT
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:39:35 -04:00
Ken Wang
795c2109c2 drm/amdgpu: Add a missing register to Polaris golden setting
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-14 16:39:30 -04:00
Rex Zhu
ccdbb20a75 drm/amdgpu: add read/write function for GC CAC programming
Create a GC_CAC_IND_INDEX/DATA pair of funcitons to program
all the CAC registers

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:23 -04:00
Rex Zhu
d826c982d7 drm/amdgpu: get number of shade engine by cgs interface.
the num of shade engine was needed to
measure the activity of the graphics core
and to enable di/dt feature.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:20 -04:00
Alex Deucher
33b7ed0122 drm/amdgpu: remove more of the ring backup code
Not used anymore.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:19 -04:00
Chunming Zhou
40019dc4a3 drm/amdgpu: clean up ring_backup code, no need more
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:18 -04:00
Chunming Zhou
1f46508721 drm/amdgpu: ib test first after gpu reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:18 -04:00
Chunming Zhou
aa1c890008 drm/amdgpu: recovery hw jobs when gpu reset V3
V3: directly use pd_addr.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:17 -04:00
Chunming Zhou
192b7dcbb5 drm/amdgpu: abstract amdgpu_vm_is_gpu_reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:16 -04:00
Chunming Zhou
fd53be302f drm/amdgpu: add a bool to specify if needing vm flush V2
which avoids job->vm_pd_addr be changed.

V2: pass job structure to amdgpu_vm_grab_id and amdgpu_vm_flush directly.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:16 -04:00
Chunming Zhou
2200edac74 drm/amdgpu: force completion for gpu reset
After all hw jobs are reset, hw fence is meaningless, so force_completion

Cc: William Lewis <minutemaidpark@hotmail.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:15 -04:00
Chunming Zhou
a3c47d6bdc drm/amdgpu: block ttm first before parking scheduler
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:14 -04:00
Chunming Zhou
f263ec622f drm/amdgpu: remove evict vram
Previous vm fault is since page talbe losts connection with vmid after gpu reset.
Now the issue is fixed by recovery. No need more.

If we want to save vram for some EDC card, we will need to consider a complete solution.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:12 -04:00
Chunming Zhou
c7c5fbcdc3 drm/amdgpu: put old hw fence of job if gpu reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:12 -04:00
Christian König
595a9cd68c drm/amdgpu: remove fence parameter from amd_sched_job_init
We return the fence as part of the job structur anyway,
no need to do this twice.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:11 -04:00
Christian König
a5fb4ec29c drm/amdgpu: earlier free SA resources
Keep the time we don't have a fence associated with the resource smaller.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:10 -04:00
Christian König
a79a5bdcef drm/amdgpu: shorten amdgpu_job_free_resources
The fence and the sync object are not hardware resources.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:10 -04:00
Christian König
b5f5acbc87 drm/amdgpu: fix user fence handling once more
Same problem as with the VM page tables. The user fence address must be
determined before the job is scheduled, not when the IB is executed.

This fixes a security problem where user fences could be used to overwrite
any part of VRAM.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:09 -04:00
Tom St Denis
5662815950 drm/amd/amdgpu: Add bank selection for MMIO debugfs (v3)
(v2) Added INSTANCE selector
(v3) Changed order of bank selectors

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:09 -04:00
Tom St Denis
1e0514131d drm/amd/amdgpu: Add gca config debug entry (v4)
A binary entry that lists GCA configuration data (and can be
read by umr).

(v2) Use kmalloc instead of vmalloc
(v3) Minor indentation correction
(v4) agd: Squash in kmalloc fix

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:08 -04:00
Tom St Denis
9559ef5b12 drm/amd/gfx: add instance field to select_se_sh (v3)
Add ability to specify instance in select_se_sh callback.
Defaults to 0xffffffff all over the driver.

(v2) Don't enable INSTANCE_BROADCAST by default
(v3) Style changes

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:07 -04:00
Lyude
b636a1b3d6 drm/amdgpu: Poll for both connect/disconnect on analog connectors
DRM_CONNECTOR_POLL_CONNECT only enables polling for connections, not
disconnections. Because of this, we end up losing hotplug polling for
analog connectors once they get connected.

Easy way to reproduce:
 - Grab a machine with an AMD GPU and a VGA port
 - Plug a monitor into the VGA port, wait for it to update the connector
   from disconnected to connected
 - Disconnect the monitor on VGA, a hotplug event is never sent for the
   removal of the connector.

Originally, only using DRM_CONNECTOR_POLL_CONNECT might have been a good
idea since doing VGA polling can sometimes result in having to mess with
the DAC voltages to figure out whether or not there's actually something
there since VGA doesn't have HPD. Doing this would have the potential of
showing visible artifacts on the screen every time we ran a poll while a
VGA display was connected. Luckily, amdgpu_vga_detect() only resorts to
this sort of polling if the poll is forced, and DRM's polling helper
doesn't force it's polls.

Additionally, this removes some assignments to connector->polled that
weren't actually doing anything.

Cc: stable@vger.kernel.org
Signed-off-by: Lyude <cpaul@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:07 -04:00
Chunming Zhou
f1aa7e082e drm/amdgpu: stop/resume fb access when gpu reset V3
V2: Add wait_for_mc_idle after stopping fb access
V3:
	1. Remove resume fb access since there is no need to
   	do that for gpu reset.
	2. Move stop fb access to amdgpu_gpu_reset function,
	since it's the same for all asics.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com> (V1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:06 -04:00
Chunming Zhou
b46b8a877c drm/amdgpu: must update page table after gpu reset
Record the gpu reset count in vmid to identify if gpu reset happened.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:03 -04:00
Chunming Zhou
a0250d36bd drm/amdgpu: save/restore bios scratch when gpu reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:03 -04:00
Chunming Zhou
6adb0513a4 drm/amdgpu: must update page table after gpu reset
Record the gpu reset count in vmid to identify if gpu reset happened.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:06:02 -04:00
Frank Binns
7056bb5c82 drm/amd/amdgpu: Set DRIVER_MODESET feature flag at build time
This flag was being set unconditionally at runtime so just set it at
compile time instead.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:07 -04:00
Michel Dänzer
ee7fd95757 drm/amdgpu: Unpin BO if we can't get fences in amdgpu_crtc_page_flip
If reservation_object_get_fences_rcu failed, we'd previously go directly
to the cleanup label, so we'd leave the BO pinned.

While we're at it, remove two amdgpu_bo_unreserve calls in favour of two
new labels.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:06 -04:00
Alex Deucher
313c45fdb4 drm/amdgpu/gmc7: remove duplicate wait_for_idle functions
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:05 -04:00
Alex Deucher
34e3205e08 drm/amdgpu/gmc8: remove duplicate wait_for_idle functions
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:05 -04:00
Junwei Zhang
5a3f25dbcb drm/amdgpu/dce8: fix flash with white screen on monitor
Fixed mc stop and resume hardware programming sequence.

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:04 -04:00
Alex Deucher
9ecbe7f506 drm/amdgpu: skip invalid ip blocks in ip helpers
Skip IP blocks that are not enabled.

Reviewed-by: Chunming zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:04 -04:00
Alex Deucher
a225bf1c9c drm/amdgpu: add missing breaks
Saves a few CPU cycles.

Reviewed-by: Chunming zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:03 -04:00
Alex Deucher
5dbbb60ba6 drm/amdgpu: add IP helpers for wait_for_idle and is_idle
Helpers to to call the IP functions for the selected IP.

Reviewed-by: Chunming zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:02 -04:00
Alex Deucher
7359ee637d drm/amdgpu/dce11: update async flip update time
Use UPDATE_IMMEDIATE (update on next data request boundary) rather
than UPDATE_H_RETRACE (update on next line boundary).  The data
request boundary is less than a scanline, so it update will happen
sooner.

Cc: Vitaly Prosyak <vitaly.prosyak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:01 -04:00
Christian König
9a79588c42 drm/amdgpu: don't update page tables for VM emulation
It's just overhead to do so and allocating a VMID
when we don't need one is actually a bit dangerous.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:02:00 -04:00
Christian König
d5b4e25d83 drm/amdgpu: implement HDP functions for UVD v2
Flush and invalidate the HDP caches.

v2: fix typo in comment

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:59 -04:00
Huang Rui
d1371f8c5d drm/amdgpu: change pcie_gen_cap magic code to macro
This patch changes pcie_gen_cap magic code to macro to make it more
readable.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Cc: Eric Huang <JinHuiEric.Huang@amd.com>
Cc: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:59 -04:00
Alex Deucher
4d54588e94 drm/amdgpu/gfx7: make gfx_v7_0_rlc_stop static
Not used outside of gfx7.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:58 -04:00
Alex Deucher
06120a1e0f drm/amdgpu/gfx7: switch to using the existing rlc callbacks
gfx8 already uses them.  Remove the direct exports and
use the callbacks fpr gfx7.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:57 -04:00
Alex Deucher
05fb7291fd drm/amdgpu: move select_se_sh into the gfx struct
It's gfx IP specific, not asic specific, so move to a
gfx callback.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:57 -04:00
Alex Deucher
b95e31fdda drm/amdgpu: move get_gpu_clock_counter into the gfx struct
It's gfx IP specific, not asic specific, so move to a
gfx callback.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 15:01:42 -04:00
Alex Deucher
4b7d97ac83 drm/amdgpu: drop wait_for_mc_idle asic callback
Only used in the gmc IP modules so just call the local
function directly.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:50 -04:00
Alex Deucher
ccd73f24ae drm/amdgpu/gmc: make some functions static
These are not used outside of the respective gmc ip modules.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:50 -04:00
Christian König
5a712a8727 drm/amdgpu: validate VM PTs only on eviction
We don't need to validate them again if the eviction counter didn't changed.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:49 -04:00
Christian König
dbd5ed60ac drm/amdgpu: add eviction counter
Keep track of the number of evictions since boot.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:49 -04:00
Chunming Zhou
0eaeb070ed drm/amdgpu: add amdgpu_irq_gpu_reset_resume_helper
irq need to update when gpu reset happens.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:48 -04:00
Arindam Nath
fb065ce7d3 drm/amd/amdgpu: make sure VCE is disabled by default
With the current code, when we boot with the amdgpu
driver enabled and loaded, the VCE also automatically
remains enabled since bootup. This can be verified from
the output of amdgpu_pm_info. It does not matter whether
we boot into command line directly or into X, the VCE
stays enabled the entire time.

This patch addresses the issue and makes sure that
VCE is turned on only during playback, and remains
disaled otherwise.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:47 -04:00
Alex Deucher
93dcc37d2c drm/amdgpu: disable compute pipeline sync workaround when using fixed fw
No need to stall the pipe when we are using firmware with the
fix.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:46 -04:00
Nicolai Hähnle
9de06de80e drm/amdgpu/gfx8: set USER_SHADER_ARRAY_CONFIG based on disable_cu parameter
v2: do not overwrite register when bitmap is zero

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:46 -04:00
Nicolai Hähnle
324c614a81 drm/amdgpu/gfx7: set USER_SHADER_ARRAY_CONFIG based on disable_cu parameter
v2: do not overwrite register when bitmap is zero

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:45 -04:00
Nicolai Hähnle
6f8941a230 drm/amdgpu: add disable_cu parameter
This parameter will allow disabling individual CUs on module load, e.g.
amdgpu.disable_cu=2.0.3,2.0.4 to disable CUs 3 and 4 of SE2.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:44 -04:00
Chunming Zhou
8b2ac10320 drm/amdgpu: evict vram when gpu reset
On workstation cards with ECC vram, the entirety of vram is cleared to 0
on asic init to set the ECC status correctly.  On non ECC boards, I don't
think they do any explicit clearing, but the vram controller is reset
which may cause issues with the data there.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:44 -04:00
Chunming Zhou
0875dc9e80 drm/amdgpu: block scheduler when gpu reset
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:43 -04:00
Christian König
ce64bc25ef drm/amdgpu: pipeline evictions as well
This boosts Xonotic from 38fps to 47fps when artificially limiting VRAM to
256MB for testing. It should improve all CPU bound rendering situations
where we have a lot of swapping to/from VRAM.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:42 -04:00
Christian König
281d144ddd drm/amdgpu: save the PD addr before scheduling the job
When we pipeline evictions the page directory could already be
moving somewhere else when grab_id is called.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:41 -04:00
Christian König
74561cd4f1 drm/ttm: remove no_gpu_wait param from ttm_bo_move_accel_cleanup
It isn't used and not waiting for the GPU after scheduling a move is
actually quite dangerous.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:39 -04:00
Christian König
99c44632d4 drm/amdgpu: remove pre move wait
Not needed any more.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:38 -04:00
Christian König
3cabaa54e7 drm/amdgpu: sync to buffer moves before VM updates
Otherwise we could update the VM page tables while the move is only scheduled.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:38 -04:00
Christian König
77dfc28bad drm/ttm: wait for BO idle in ttm_bo_move_memcpy
When we want to pipeline accelerated moves we need to wait in the fallback path.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:35 -04:00
Christian König
88932a7be2 drm/ttm: add wait for idle in all drivers bo_move functions
Wait for idle before moving the BO in all drivers implementing
an accelerated move function.

This should keep the current behavior when removing the pre move wait.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:35 -04:00
Eric Huang
14b3307429 drm/amdgpu: some improvement in parsing inputs
It changes the way to skip newline character and also avoids
warning message from some compiler.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:54:32 -04:00
Huang Rui
50ab2533d2 drm/amdgpu: introduce a firmware debugfs to dump all current firmware versions
This patch implements the debugfs to dump all currect firmware
version:

root@jenkins-All-Series:/home/jenkins# cat /sys/kernel/debug/dri/0/amdgpu_firmware_info
VCE feature version: 0, firmware version: 0x34040300
UVD feature version: 0, firmware version: 0x01451000
MC feature version: 0, firmware version: 0x00000000
ME feature version: 37, firmware version: 0x00000093
PFP feature version: 37, firmware version: 0x000000da
CE feature version: 37, firmware version: 0x00000080
RLC feature version: 1, firmware version: 0x0000010e
MEC feature version: 37, firmware version: 0x0000029e
MEC2 feature version: 37, firmware version: 0x0000029e
SMC feature version: 0, firmware version: 0x013353e6
SDMA0 feature version: 31, firmware version: 0x00000036
SDMA1 feature version: 0, firmware version: 0x00000036

Suggested-by: Alex Deucher <Alexander.Deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:33 -04:00
Huang Rui
000cab9a61 drm/amdgpu: factor out the AMDGPU_INFO_FW_VERSION case branch into amdgpu_firmware_info
The new amdgpu_firmware_info function will be used on amdgpu firmware
version debugfs.

Suggested-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:33 -04:00
Nicolai Hähnle
8db6f83bef drm/amdgpu: remove cgs_acpi_method_argument member method_length
It was redundant with data_length, and in fact set incorrectly in one case
leading to an out-of-bound read by memcpy in acpi_ut_copy_esimple_to_isimple,
reported by CONFIG_KASAN=y.

Signed-off-by: Nicolai Hähnle <Nicolai.Haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:32 -04:00
Eric Huang
840dd4c605 drm/amd/powerplay: set UVD clocks bypass mode for Polaris10
Saves power when not in use.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:32 -04:00
Alex Deucher
b58bc5598a drm/amdgpu/gfx7: fix CP jump table size
Align to the jump table offset.  May fix hangs on some
asics with GFX PG enabled.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:30 -04:00
Alex Deucher
07cf1a0b95 drm/amdgpu/gfx8: fix CP jump table size
Align to the jump table offset. Fixes hangs on some
systems with GFX PG enabled.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:29 -04:00
David Mao
15da301d88 drm/amd/amdgpu : adding new tracepoints to track memory information.
- adding amdgpu_cs_bo_status to track total size and
   total entry count of bo for each submission.
 - adding amdgpu_ttm_bo_move to track the bo eviction
   including the size of bo and the location before/after the move

Signed-off-by: David Mao <David.Mao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:29 -04:00
David Mao
42ffb5822b drm/amd/amdgpu : Refine tracepoints to track more information
- adding memory type, prefered heap, allowed heap, and host visible
   information to the amdgpu_bo_create tracepoint.
 - adding bo size to the amdgpu_bo_list_set tracepoint.

Signed-off-by: David Mao <David.Mao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:28 -04:00
Tom St Denis
f78c34221b drm/amdgpu/uvd6: De-numberify startup
To make the code more legible various numerical constants
have been changed to their #define'ed MASKs.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:27 -04:00
Alex Xie
2171849768 drm/amdgpu: Initialize the variables in a straight-forward way
Initialize the variable in a straight-forward way instead of
hiding the initialization inside the loop. This can also
reduce one function call.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:27 -04:00
Alex Xie
3a6f8e0c72 drm/amdgpu: Add comment to describe the purpose of one difficult if statement
Use == instead of != in the if statement to make code easier understood

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:26 -04:00
Alex Xie
677131a16d drm/amdgpu: Change some variable names to make code easier understood
Add comment to describe some variables otherwise.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:26 -04:00
Chunming Zhou
b314f9a997 drm/amdgpu: enable BUS master after pci reset
Re-enable bus mastering after GPU reset. We disable it
at the top of these functions, so balance them by
re-enabling it.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
eviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:25 -04:00
Chunming Zhou
89a3182737 drm/amdgpu: add return value for pci config reset
So we know whether or not the reset succeeded.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:24 -04:00
Christian König
3dab83bee1 drm/amdgpu: remove now unnecessary checks
vm_flush() now comes directly after vm_grab_id().

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:24 -04:00
Christian König
1fbb2e9299 drm/amdgpu: use a fence array for VMID management
Just wait for any fence to become available, instead
of waiting for the last entry of the LRU.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:23 -04:00
Christian König
8d76001e00 drm/amdgpu: reuse VMIDs assigned to a VM only if there is also a free one
This fixes a fairness problem with the GPU scheduler. VM having lot of
jobs could previously starve VM with less jobs.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:23 -04:00
Christian König
36fd7c5c3c drm/amdgpu: prefer VMIDs idle on the current ring
Prefer to use a VMIDs which are idle on the ring we want to submit to. This
also removes bubbling idle VMIDs up on the LRU, which is actually not
beneficial.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:22 -04:00
Christian König
3542023896 drm/amdgpu: add optional ring to amdgpu_sync_is_idle
Check if the sync object is idle depending on the ring a submission works with.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:21 -04:00
Christian König
a7e7a93e57 drm/amdgpu: remove amdgpu_sync_wait
Stop hiding bugs, instead print a proper error when the scheduler
doesn't handle all dependencies.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:21 -04:00
Christian König
6fc1367582 drm/amdgpu: generalize the scheduler fence
Make it two events, one for the job being scheduled and one when it is finished.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:20 -04:00
Christian König
0e9d239b8d drm/amdgpu: document amdgpu_sync_get_fence
It's not obvious what it should do.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:19 -04:00
Tom St Denis
78f73bf03c drm/amdgpu/gfx80: Add QUICK_PG bit to GFX header and use it.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:19 -04:00
Tom St Denis
dad4acc896 drm/amdgpu/gfx8: Tidy up various PG helpers
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:18 -04:00
Tom St Denis
216cde6008 drm/amdgpu/gfx8: Enable PG on Stoney
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:18 -04:00
Tom St Denis
413cf60073 drm/amdgpu/gfx8: Enable CG on Stoney
Enable all relevant CG flags for Stoney parts.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:17 -04:00
Tom St Denis
6ab3886c2c drm/amdgpu/gfx8: Switch Stoney to share CZ's RLC functions
According to the bringup code ST/CZ share the RLC
ENTER/EXIT logic.

Tested on my ST board.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:16 -04:00
Nicolai Hähnle
395d1fb948 drm/amdgpu: add amdgpu.cg_mask and amdgpu.pg_mask parameters
They allow disabling clock and power gating from the kernel command line,
which hopefully helps with diagnosing problems in the field.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Nicolai Hähnle <Nicolai.Haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:16 -04:00
Tom St Denis
f4b373f41c drm/amdgpu/trace: Add tracepoints to MMIO read/writes
Add tracepoints to the MMIO read/write so we can log
MMIO traffic.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:15 -04:00
yanyang1
c66875b1ee drm/amdgpu: print smc fw info in CGS.
The non-powerplay code handles this directly.  Do
it in cgs for powerplay.

Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by:  Rex Zhu Rex.Zhu@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:15 -04:00
Alex Deucher
83ba126a9b drm/amdgpu: properly clean up runtime pm
Was missing the calls to fini.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:14 -04:00
Alex Deucher
c63695cc5e drm/amdgpu: work around lack of upstream ACPI support for D3cold
Until Dave's patch to support the new hybrid gfx ACPI method goes
upstream, we can fallback to the old ATPX method which seems to
still work.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:13 -04:00
Chunming Zhou
1974e30eb1 drm/amdgpu: add gpu reset to timeout handler
so that we could actually reset the GPU when it hangs.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:12 -04:00
Monk Liu
a909c6bd9f drm/amdgpu: fix ring debugfs bug
debugfs file added but not released after driver unloaded

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:12 -04:00
Tom St Denis
c71dbd93eb drm/amd/amdgpu: ring debugfs is read in increments of 4 bytes
If a user tries to read a non-multiple of 4 bytes it would have
read until the end of the ring potentially crashing the user
task.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:11 -04:00
Tom St Denis
4f4824b556 drm/amd/amdgpu: Convert ring debugfs entries to binary
They now emit ring data in binary which will be read/written by
the userspace tool umr shortly.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:10 -04:00
Alex Deucher
522761cbc8 drm/amdgpu: drop explicit pci D3/D0 setting for ATPX power control
The ATPX power control method does this for you.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:08 -04:00
Alex Deucher
1167097576 drm/amdgpu/atpx: hybrid platforms use d3cold
The platform d3 cold is used to power down the dGPU.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:07 -04:00
Alex Deucher
2f5af82eea drm/amdgpu/atpx: track whether if this is a hybrid graphics platform
hybrid graphics in this case refers to systems which use the new
platform d3 cold ACPI methods as opposed to ATPX for dGPU power
control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:07 -04:00
Alex Deucher
d85555f885 drm/amdgpu/atpx: drop forcing of dGPU power control
Now that we handle this correctly, there is no need to force
it.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:02 -04:00
Alex Deucher
7e32aa611b drm/amdgpu: use PCI_D3hot for PX systems without dGPU power control
On PX systems without dGPU power control, use PCI_D3hot.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:02 -04:00
Alex Deucher
a78fe13389 drm/amdgpu/atpx: add a query for ATPX dGPU power control
The runtime pm sequence is different depending on whether or
not the platform supports ATPX dGPU power control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:01 -04:00
Alex Deucher
f81eb1a349 drm/amdgpu: add a delay after ATPX dGPU power off
ATPX dGPU power control requires a 200ms delay between
power off and on.  This should fix dGPU failures on
resume from power off.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-07-07 14:51:01 -04:00
Alex Deucher
8d45f80ed0 drm/amdgpu: clean up atpx power control handling
The presence of the power control method should be determined
via the presence of the method in function 0.  However, some
sbioses only set the appropriate bits in function 1 so use
then to override a missing power control function.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:51:00 -04:00
Alex Deucher
5c61479247 drm/amdgpu: disable power control on hybrid laptops
Windows 10 (and some 8.1) systems use standardized
ACPI calls for hybrid laptops to control dGPU power.
Detect those cases and disable the AMD specific ATPX
power control.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:59 -04:00
Tom St Denis
7894745abb drm/amdgpu/gfx8: Add serdes wait for idle in CGCG en/disable
Must wait for SERDES idle before exiting RLC SAFEMODE

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:58 -04:00
Eric Huang
40899d5529 drm/amdgpu: add mclk OD(overdrive) support for CI
The maximum OD percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:56 -04:00
Eric Huang
f2bdc05f77 drm/amdgpu: add the common code to support mclk OD
This implements mclk OverDrive(OD) through sysfs.
The new entry pp_mclk_od is read/write. The value of input/output
is an integer of the overclocking percentage.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:55 -04:00
Huang Rui
6bb6b2972d drm/amdgpu: add powercontainment module parameter
This patch makes powercontainment feature configurable. Currently, the
powercontainment is not very stable, so add a module parameter to
enable/disable it via user mode.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:55 -04:00
Christian König
c5f74f7802 drm/amdgpu: fix and cleanup job destruction
Remove the job reference counting and just properly destroy it from a
work item which blocks on any potential running timeout handler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:54 -04:00
Christian König
0e51a772e2 drm/amdgpu: properly abstract scheduler timeout handling
The driver shouldn't mess with the scheduler internals.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:53 -04:00
Christian König
1e24e31f22 drm/amdgpu: remove use_shed hack in job cleanup
Remembering the code path in a variable to cleanup
differently is usually not a good idea at all.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:52 -04:00
Christian König
1ab0d211f3 drm/amdgpu: fix coding style in amdgpu_job_free
Ther should be a new line between code and decleration.
Also use amdgpu_ib_free() instead of releasing the member manually.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:52 -04:00
Christian König
7392c329ee drm/amdgpu: remove begin_job/finish_job
Completely pointless and confusing to use a callback
to call into the same code file.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:50 -04:00
Eric Huang
3cc259112d drm/amdgpu: add the CI code to enable sclk OD(OverDrive)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:49 -04:00
Eric Huang
19fbc43a86 drm/amdgpu: add the CI code to enable clock level selection
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:48 -04:00
Eric Huang
8b2e574dc4 drm/amdgpu: add the new common pm code to support sclk OD
This extends OD (OverDrive) support to the non-Powerplay code paths.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:48 -04:00
Eric Huang
c85e299ff9 drm/amdgpu: add the new common pm code to select the clock levels
This extends dpm clock level selection to the non-powerplay code paths.
This interface can be used to select individual clock levels.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:47 -04:00
Tom St Denis
9bf51b0719 drm/amdgpu/gfx8: Enable GFX PG on CZ
Based on Alex's patches this enables GFX PG on CZ.

Tested with xonotic-glx/glxgears/supertuxkart and idle desktop.
Also read-back registers via umr for verificiation that the bits
are truly enabled.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:47 -04:00
Alex Deucher
7ba0eb6df9 drm/amdgpu/gfx8: clean up polaris11 PG enable
Fix the logic for enabling/disabling.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:46 -04:00
Alex Deucher
2c54716563 drm/amdgpu/gfx8: add powergating support for CZ/ST
This implements powergating support for CZ/ST asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:45 -04:00
Alex Deucher
c2546f55dd drm/amdgpu/gfx8: rename some pg functions
So they can be shared with other asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:44 -04:00
Alex Deucher
fb16007bf0 drm/amdgpu/gfx8: add state setup for CZ/ST GFX power gating
This sets up the CP jump table and GDS buffer and sets the
PG state registers.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:44 -04:00
Alex Deucher
e36091edd3 drm/amdgpu/gfx7: expand cp jt size to handle GDS as well
The size needs to handle the CP JT and GDS.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:42 -04:00
Eric Huang
428bafa86c drm/amdgpu: add powerplay sclk OD support through sysfs (v2)
Add a new sysfs entry pp_sclk_od to support sclk overdrive(OD) overclocking,
the entry is read/write, the value of input/output is an integer which is the
over percentage of the highest sclk.

v2: drop extra semicolon

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:40 -04:00
Alex Deucher
2254c21982 drm/amdgpu: load different smc firmware on some CI variants
The power tables on some variants require different firmware.
This fixes stability issues on some newer CI parts.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=91880

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:38 -04:00
Monk Liu
cc7d8c7979 drm/amdgpu: clear RB at ring init
This help fix reloading driver hang issue of SDMA
ring.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:37 -04:00
Dave Airlie
542d972221 Linux 4.7-rc5
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJXcHi9AAoJEHm+PkMAQRiGSJ0H/2o4t9VWYmhyPC1sdIHoCExJ
 P4tBrcZYBmKcsOmIfnJDa5g/+IdhouEUM0v0fHPogS2UUWT9eRuJWYD3sY+HpEQ+
 heKTli8X73gsFB25odeIbIt0jAoSiiMYWDrWqLNsuUV1tjEYVA8rH0SM94FiOC/5
 7WVWXLTuH+Rm7JHP18BnKxmMMbzrTFmwisLMqFKyfZRRSlS+/ix7iLUNO9AFa39B
 YHxNPihLrZ0oONyCOAQoHTIXXrw0cQbxV2utg3vnMcCZdme2xOn+iXMntTSKfZ39
 iC9/T0vsO3R6OrRo2aDZAnCPUAniXnMEIhrKG37WMyXpj6cucZ/2QiNXcXviGV4=
 =iLte
 -----END PGP SIGNATURE-----

Back-merge tag 'v4.7-rc5' into drm-next

Linux 4.7-rc5

The fsl-dcu pull needs -rc3 so go to -rc5 for now.
2016-07-02 15:56:01 +10:00
Rex Zhu
a7f14a184e drm/amd/powerplay: workaround for UVD clock issue
workaround issue that when uvd dpm disabled,
uvd clock remain high on polaris10. Manually turn
off the clocks.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-29 12:12:26 -04:00
Ken Wang
d9d533c148 drm/amdgpu: add ACLK_CNTL setting for polaris10
This is a temporary workaround for early boards.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-29 12:10:31 -04:00
Lukas Wunner
84b89bdced drm/amdgpu: Turn off CRTCs on driver unload
amdgpu leaks a runtime pm ref if at least one CRTC is enabled on unload.
The ref is taken by amdgpu_crtc_set_config() and held as long as a CRTC
is in use. Fix by turning off all CRTCs on unload.

Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/7bf8d9ceb9d343a7495788667e6da170b8fd3af1.1465392124.git.lukas@wunner.de
2016-06-24 08:49:35 +02:00
Lukas Wunner
6ce62d8b6f drm/amdgpu: Forbid runtime pm on driver unload
The PCI core calls pm_runtime_forbid() on device probe in pci_pm_init(),
making this the default state when amdgpu is loaded.
amdgpu_driver_load_kms() therefore calls pm_runtime_allow(), but there's
no pm_runtime_forbid() in amdgpu_driver_unload_kms() to balance it. Add
it so that we leave the device in the same state that we found it.

This isn't a bug, it's just good housekeeping. When amdgpu is first
loaded with runpm=1, then unloaded and loaded again with runpm=0,
pm_runtime_forbid() will be called from amdgpu_pmops_runtime_idle() or
amdgpu_pmops_runtime_suspend(), so the behaviour is correct. If there
ever is a third party driver for AMD cards, this commit avoids that it
has to clean up behind amdgpu.

Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/ccd4f7208acbd7761364418fc34f7849acbb4597.1465392124.git.lukas@wunner.de
2016-06-24 08:49:32 +02:00
Lukas Wunner
c9c9bbd754 drm/amdgpu: Don't leak runtime pm ref on driver load
If an error occurs in amdgpu_device_init() after adev->rmmio has been
set, its caller amdgpu_driver_load_kms() will skip runtime pm
initialization and call amdgpu_driver_unload_kms(), which acquires a
runtime pm ref that is leaked.

Balance by releasing a runtime pm ref in the error path of
amdgpu_driver_load_kms().

Fixes: d38ceaf99e ("drm/amdgpu: add core driver (v4)")
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/9a53449865759d7499a439ca2776093ee117b1eb.1465392124.git.lukas@wunner.de
2016-06-24 08:49:31 +02:00
Lukas Wunner
4a7885476a drm/amdgpu: Don't leak runtime pm ref on driver unload
amdgpu_driver_load_kms() calls pm_runtime_put_autosuspend() if
amdgpu_device_is_px(dev), but amdgpu_driver_unload_kms() calls
pm_runtime_get_sync() unconditionally. We therefore leak a runtime pm
ref whenever amdgpu is unloaded on a non-PX machine or if runpm=0. The
GPU will subsequently never runtime suspend after loading amdgpu again.

Fix by taking the runtime pm ref under the same condition that it was
released on driver load.

Fixes: d38ceaf99e ("drm/amdgpu: add core driver (v4)")
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/86364eeb5711323608930c4f0f69046792ff6d3c.1465392124.git.lukas@wunner.de
2016-06-24 08:49:30 +02:00
Rex Zhu
92d1576859 drm/amdgpu/gfx8: update golden setting for polaris10
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-21 10:22:42 -04:00
Nicolas Iooss
29b9c528b8 drm/amdgpu: initialize amdgpu_cgs_acpi_eval_object result value
amdgpu_cgs_acpi_eval_object() returned the value of variable "result"
without initializing it first.

This bug has been found by compiling the kernel with clang.  The
compiler complained:

    drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c:972:14: error: variable
    'result' is used uninitialized whenever 'for' loop exits because its
    condition is false [-Werror,-Wsometimes-uninitialized]
            for (i = 0; i < count; i++) {
                        ^~~~~~~~~
    drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c:1011:9: note: uninitialized
    use occurs here
            return result;
                   ^~~~~~
    drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c:972:14: note: remove the
    condition if it is always true
            for (i = 0; i < count; i++) {
                        ^~~~~~~~~
    drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c:864:12: note: initialize the
    variable 'result' to silence this warning
            int result;
                      ^
                       = 0

Fixes: 3f1d35a03b ("drm/amdgpu: implement new cgs interface for acpi
function")
Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-20 17:09:39 -04:00
Dan Carpenter
48a70e1ca8 drm/amdgpu: precedence bug in amdgpu_device_init()
! has higher precedence than bitwise & so we need to add parenthesis
for this to work as intended.

Fixes: 048765ad5a ('amdgpu: fix asic initialization for virtualized environments (v2)')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-20 17:06:10 -04:00
Alex Deucher
0b10029d82 drm/amdgpu: fix num_rbs exposed to userspace (v2)
This was accidently broken for harvest cards when the
code was refactored for Polaris support.

v2: multiply by shader engines.  Noticed by Nicolai.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-06-17 14:25:46 -04:00
Dan Carpenter
041bf02255 drm/amdgpu: missing bounds check in amdgpu_set_pp_force_state()
There is no limit on high "idx" can go.  It should be less than
ARRAY_SIZE(data.states) which is 16.

The "data" variable wasn't declared in that scope so I shifted the code
around a bit to make it work.  Also I made "idx" unsigned.

Fixes: f3898ea12f ('drm/amd/powerplay: add some sysfs interfaces for powerplay.')
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-17 13:50:10 -04:00
Ulf Hansson
39dd0f234f PM / Domains: Allow genpd to power on during system PM phases
If a PM domain is powered off when the first device starts its system PM
prepare phase, genpd prevents any further attempts to power on the PM
domain during the following system PM phases. Not until the system PM
complete phase is finalized for all devices in the PM domain, genpd again
allows it to be powered on.

This behaviour needs to be changed, as a subsystem/driver for a device in
the same PM domain may still need to be able to serve requests in some of
the system PM phases. Accordingly, it may need to runtime resume its
device and thus also request the corresponding PM domain to be powered on.

To deal with these scenarios, let's make the device operational in the
system PM prepare phase by runtime resuming it, no matter if the PM domain
is powered on or off. Changing this also enables us to remove genpd's
suspend_power_off flag, as it's being used to track this condition.
Additionally, we must allow the PM domain to be powered on via runtime PM
during the system PM phases.

This change also requires a fix in the AMD ACP (Audio CoProcessor) drm
driver. It registers a genpd to model the ACP as a PM domain, but
unfortunately it's also abuses genpd's "internal" suspend_power_off flag
to deal with a corner case at system PM resume.

More precisely, the so called SMU block powers on the ACP at system PM
resume, unconditionally if it's being used or not. This may lead to that
genpd's internal status of the power state, may not correctly reflect the
power state of the HW after a system PM resume.

Because of changing the behaviour of genpd, by runtime resuming devices in
the prepare phase, the AMD ACP drm driver no longer have to deal with this
corner case. So let's just drop the related code in this driver.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-06-16 15:01:43 +02:00
Alex Deucher
7c4021d403 Revert "drm/amdgpu: add pipeline sync while vmid switch in same ctx"
This reverts commit 2ba272d7bd.

The issue fixed by this patch is specific to compute rings and the
previous patch was enough.  Additionally, this patch as been traced
to strange behavior on some CZ systems so we might as well drop it.
2016-06-13 18:59:17 -04:00
Alex Deucher
8b18300c13 drm/amdgpu/gfx7: fix broken condition check
Wrong operator.

Reported-by: David Binderman <linuxdev.baldrick@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-06-13 18:26:24 -04:00
Andres Rodriguez
048765ad5a amdgpu: fix asic initialization for virtualized environments (v2)
When executing in a PCI passthrough based virtuzliation environemnt, the
hypervisor will usually attempt to send a PCIe bus reset signal to the
ASIC when the VM reboots. In this scenario, the card is not correctly
initialized, but we still consider it to be posted. Therefore, in a
passthrough based environemnt we should always post the card to guarantee
it is in a good state for driver initialization.

However, if we are operating in SR-IOV mode it is up to the GIM driver
to manage the asic state, therefore we should not post the card (and
shouldn't be able to do it either).

v2: add missing semi-colon

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andres.rodriguez@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-13 15:25:20 -04:00
Gustavo Padovan
27377a1ce7 drm/amdgpu: use crtc directly in drm_crtc_vblank_put()
We don't need to use &amdgpu_crtc->base there as crtc is available
in the function.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1465308482-15104-9-git-send-email-gustavo@padovan.org
2016-06-13 18:38:06 +02:00
Gustavo Padovan
9a7841e986 drm/amdgpu: use drm_crtc_vblank_{on,off}()
Replace the legacy drm_vblank_{on,off}() with the new helper functions.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1465308482-15104-6-git-send-email-gustavo@padovan.org
2016-06-13 18:37:50 +02:00
Dave Airlie
29ccf7590e drm/amdgpu: fix warning with powerplay disabled.
This just fixes a warning when you disable powerplay.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-06-10 11:40:49 +10:00
Monk Liu
a392746a8c drm/amdgpu: add release firmware for cgs
Powerplay uses cgs to load the firmware so add a function
to release it as well to avoid leaking it on driver unload.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:49:13 -04:00
Monk Liu
d1ff53b7c2 drm/amdgpu: fix cik sdma ucode memleak
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:49:11 -04:00
Monk Liu
9c55c52044 drm/amdgpu: fix sdma24 ucode mem leak
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:49:10 -04:00
Monk Liu
14d83e78c5 drm/amdgpu: fix sdma3 ucode mem leak
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:49:09 -04:00
Monk Liu
05f19eb5bd drm/amdgpu: fix uvd fini mem leak
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:49:08 -04:00
Monk Liu
e517cd77ee drm/amdgpu: fix gfx 7 ucode mem leak
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:49:07 -04:00
Monk Liu
13331ac384 drm/amdgpu: fix gfx8 ucode mem leak
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:49:06 -04:00
Monk Liu
67a6a504af drm/amdgpu: fix missing free wb for cond_exec
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:49:05 -04:00
Monk Liu
89e0ec9f5e drm/amdgpu: fix mem leak in atombios
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:49:04 -04:00
Chunming Zhou
2ba272d7bd drm/amdgpu: add pipeline sync while vmid switch in same ctx
Since vmid-mgr supports vmid sharing in one vm, the same ctx could
get different vmids for two emits without vm flush, vm_flush could
be done in another ring.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:49:01 -04:00
Monk Liu
fdff8cfa72 drm/amdgpu: vBIOS post only call when mem_size zero
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:49:00 -04:00
Monk Liu
505dfe76cd drm/amdgpu: modify sdma start sequence
should fist halt engine, and then doing the register
programing, and later unhalt engine, and finally run
ring_test.

this help fix reloading driver hang issue of SDMA
ring

original sequence is wrong for it programing engine
after unhalt, which will lead to fault behavior when
doing driver reloading after unloaded.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:48:59 -04:00
Monk Liu
d72f7c0685 drm/amdgpu: init more register for sdma
This help fix reloading driver hang issue of SDMA
ring

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:48:58 -04:00
Monk Liu
9a005bef5b drm/amdgpu: clear SA bo when created
This help fix reloading driver hang issue of SDMA
ring

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:48:57 -04:00
Alex Deucher
768c95e70c drm/amdgpu: fix fw leak in non-powerplay dpm code
We need to release the firmware on driver tear down.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:48:56 -04:00
Monk Liu
a6dcfd9cc5 drm/amdgpu: fix pplib finish bug
1,should use late_fini to kfree all resource otherwise
the released pointer maybe accessed in IRQ ip fini routine.

2,hwmgr should not be kfree by pem_fini which is invoked
by hw fini path.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:48:56 -04:00