Commit graph

2725 commits

Author SHA1 Message Date
Georgi Djakov
01f8938ad0 Merge branch 'icc-qcm2290' into icc-next
Add support for QCM2290 including a few prep changes.

* icc-qcm2290
  interconnect: icc-rpm: Define ICC device type
  interconnect: icc-rpm: Add QNOC type QoS support
  interconnect: icc-rpm: Support child NoC device probe
  dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support
  interconnect: qcom: Add QCM2290 driver support

Link: https://lore.kernel.org/r/20211215002324.1727-1-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15 07:14:27 +02:00
Shawn Guo
061dbde2bf dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support
Add bindings for Qualcomm QCM2290 Network-On-Chip interconnect devices.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211215002324.1727-5-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15 07:13:08 +02:00
Vinod Koul
72a0ca203c dt-bindings: clock: Add SM8450 GCC clock bindings
Add device tree bindings for global clock controller on SM8450 SoCs.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211207114003.100693-2-vkoul@kernel.org
2021-12-14 21:19:13 -06:00
Vamsi krishna Lanka
8f8ef3860d dt-bindings: clock: Add SDX65 GCC clock bindings
Add device tree bindings for global clock controller on SDX65 SOCs.

Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/e15509b2b7c9b600ab38c5269d4fac609c077b5b.1638861860.git.quic_vamslank@quicinc.com
2021-12-14 20:53:19 -06:00
Georgi Djakov
4a5cf65d00 Merge branch 'icc-sm8450' into icc-next
This add device tree binding and driver for interconnect providers found in
SM8450 SoC.

* icc-sm8450
  dt-bindings: interconnect: Add Qualcomm SM8450 DT bindings
  interconnect: qcom: Add SM8450 interconnect provider driver

Link: https://lore.kernel.org/r/20211209084842.189627-1-vkoul@kernel.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-14 23:44:01 +02:00
Vinod Koul
0ae8c62528 dt-bindings: interconnect: Add Qualcomm SM8450 DT bindings
The Qualcomm SM8450 SoC has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211209084842.189627-2-vkoul@kernel.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-14 23:42:47 +02:00
Richard Zhu
f6f787874a dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy
Add binding for reference clock PAD modes of the i.MX8 PCIe PHY.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1638432158-4119-2-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-14 20:02:32 +05:30
Peng Fan
057ccd9db7 dt-bindings: power: imx8ulp: add power domain header file
Add i.MX8ULP power domain header file

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 16:33:02 +08:00
Aswath Govindraju
beba81faad dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2
Add pinctrl macros for J721S2 SoC. These macro definitions are
similar to that of J721E, but adding new definitions to avoid
any naming confusions in the soc dts files.

checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses

However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211207080904.14324-3-a-govindraju@ti.com
2021-12-13 23:21:21 +05:30
Sam Protsenko
e522ae91b8 dt-bindings: soc: samsung: Add Exynos USI bindings
Add constants for choosing USIv2 configuration mode in device tree.
Those are further used in USI driver to figure out which value to write
into SW_CONF register. Also document USIv2 IP-core bindings.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211204195757.8600-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-13 12:03:22 +01:00
Cosmin Tanislav
3cf3cdea6f dt-bindings: iio: add AD74413R
The AD74412R and AD74413R are quad-channel, software configurable,
input/output solutions for building and process control applications.

They contain functionality for analog output, analog input, digital input,
resistance temperature detector, and thermocouple measurements integrated
into a single chip solution with an SPI interface.

The devices feature a 16-bit ADC and four configurable 13-bit DACs to
provide four configurable input/output channels and a suite of diagnostic
functions.

The AD74413R differentiates itself from the AD74412R by being
HART-compatible.

Signed-off-by: Cosmin Tanislav <cosmin.tanislav@analog.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20211205114045.173612-3-cosmin.tanislav@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-12-12 17:09:11 +00:00
Horatiu Vultur
51d0a37dde dt-bindings: clock: lan966x: Extend includes with clock gates
On lan966x it is allow to control the clock to some peripherals like
USB. So extend the include file with these clocks.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211103085102.1656081-4-horatiu.vultur@microchip.com
2021-12-08 11:19:20 +01:00
Kavyasree Kotagiri
265d27caf9 dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs
LAN966X supports 14 clock outputs for its peripherals.
This include file is introduced to use identifiers for clocks.

Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211103061935.25677-2-kavyasree.kotagiri@microchip.com
2021-12-08 10:57:25 +01:00
Yoshihiro Shimoda
81c1655823 dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas
R-Car S4-8 (R8A779F0) SoC.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211201073308.1003945-4-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07 16:29:25 +01:00
Yoshihiro Shimoda
500daa0e6b dt-bindings: power: Add r8a779f0 SYSC power domain definitions
Add power domain indices for R-Car S4-8 (r8a779f0).

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211201073308.1003945-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07 16:29:24 +01:00
Oder Chiou
083a7fba38
ASoC: rt5640: Add the binding include file for the HDA header support
The patch adds the binding include file for the HDA header support.

Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Link: https://lore.kernel.org/r/20211125055812.8911-1-oder_chiou@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-11-25 11:54:32 +00:00
Samuel Holland
71b597ef5d
dt-bindings: clock: sunxi: Export CLK_DRAM for devfreq
The MBUS node needs to reference the CLK_DRAM clock, as the MBUS
hardware implements memory dynamic frequency scaling using this clock.

Export this clock for SoCs which will be getting a devfreq driver.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211118031841.42315-2-samuel@sholland.org
2021-11-23 11:29:35 +01:00
Samuel Holland
c962f10f39
dt-bindings: clk: Add compatibles for D1 CCUs
The D1 has a CCU and a R_CCU (PRCM CCU) like most other sunxi SoCs, with
3 and 4 clock inputs, respectively. Add the compatibles and bindings.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211119043545.4010-2-samuel@sholland.org
2021-11-23 10:29:05 +01:00
Horatiu Vultur
ea8a163e02 dt-bindings: phy: Add constants for lan966x serdes
Lan966x has: 2 integrated PHYs, 3 SerDes and 2 RGMII interfaces. Which
requires to be muxed based on the HW representation.

So add constants for each interface to be able to distinguish them.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Link: https://lore.kernel.org/r/20211116100818.1615762-3-horatiu.vultur@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 13:09:08 +05:30
Yassine Oudjana
3e9fdc6b73 dt-bindings: interconnect: Add Qualcomm MSM8996 DT bindings
Add bindings for interconnects on Qualcomm MSM8996.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c
Link: https://lore.kernel.org/r/20211021132329.234942-4-y.oudjana@protonmail.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-11-22 18:25:56 +02:00
Hui Wang
6deb3fb22d clk: imx8mp: Remove IPG_AUDIO_ROOT from imx8mp-clock.h
Since the commit b24e288d50 ("clk: imx: Remove the audio ipg clock
from imx8mp") removes the non-existing IPG_AUDIO_ROOT from the
clk-imx8mp.c, and this definition is not used by anywhere, let us
removed it in the imx8mp-clock.h as well.

Signed-off-by: Hui Wang <hui.wang@canonical.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20211109125657.63485-1-hui.wang@canonical.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2021-11-22 17:06:48 +02:00
Sam Protsenko
c2afeb79fd dt-bindings: clock: Add bindings for Exynos850 CMU_CMGP
CMU_CMGP generates USI and ADC clocks for BLK_ALIVE. In particular USI
clocks are needed for HSI2C_3 and HSI2C_4 instances.

Add clock indices and bindings documentation for CMU_CMGP domain.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211121232741.6967-4-semen.protsenko@linaro.org
2021-11-22 10:13:18 +01:00
Sam Protsenko
16e0c2474f dt-bindings: clock: Add bindings for Exynos850 CMU_APM
CMU_APM generates clocks for APM IP-core (Active Power Management). In
particular it generates RTC clocks, which are needed to enable rtc-s3c
driver on Exynos850 SoC.

Add clock indices and binding documentation for CMU_APM.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211121232741.6967-2-semen.protsenko@linaro.org
2021-11-22 10:13:18 +01:00
Marek Szyprowski
d68f50e6ad dt-bindings: clock: samsung: add IDs for some core clocks
Add IDs for some core clocks referenced during the boot process.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20211018125456.8292-1-m.szyprowski@samsung.com
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2021-11-19 19:32:26 +01:00
Shawn Guo
2475fcfbe4 dt-bindings: power: rpmpd: Add QCM2290 support
Add compatible and constants for the power domains exposed by the
QCM2290 RPM.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211108134442.30051-3-shawn.guo@linaro.org
2021-11-18 15:20:26 -06:00
Paul Cercueil
c4a11bf423 dt-bindings: Rename Ingenic CGU headers to ingenic,*.h
Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files
related to Ingenic SoCs with 'ingenic,'.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211016133322.40771-1-paul@crapouillou.net
2021-11-11 22:27:14 -06:00
Linus Torvalds
3a9b0a46e1 - Remove Drivers
- Remove support for TI TPS80031/TPS80032 PMICs
 
  - New Device Support
    - Add support for Magnetic Reader to TI AM335x
    - Add support for DA9063_EA to Dialog DA9063
    - Add support for SC2730 PMIC to Spreadtrum SC27xx
    - Add support for MacBookPro16,2 ICL-N UART Intel LPSS PCI
    - Add support for lots of new PMICS in QCom SPMI PMIC
    - Add support for ADC to Diolan DLN2
 
  - New Functionality
    - Add support for Power Off to Rockchip RK817
 
  - Fix-ups
    - Simplify Regmap passing to child devices; hi6421-spmi-pmic
    - SPDX licensing updates; ti_am335x_tscadc
    - Improve error handling; ti_am335x_tscadc
    - Expedite clock search; ti_am335x_tscadc
    - Generic simplifications; ti_am335x_tscadc
    - Use generic macros/defines; ti_am335x_tscadc
    - Remove unused code; ti_am335x_tscadc, cros_ec_dev
    - Convert to GPIOD; wcd934x
    - Add namespacing; ti_am335x_tscadc
    - Restrict compilation to relevant arches; intel_pmt
    - Provide better description/documentation; exynos_lpass
    - Add SPI device ID table; altera-a10sr, motorola-cpcap, sprd-sc27xx-spi
    - Change IRQ handling; qcom-pm8xxx
    - Split out I2C and SPI code; arizona
    - Explicitly include used headers; altera-a10sr
    - Convert sysfs show() function to; sysfs_emit
    - Standardise *_exit() and *_remove() return values; mc13xxx, stmpe, tps65912
    - Trivial (style/spelling/whitespace) fixups; ti_am335x_tscadc, qcom-spmi-pmic,
                                                  max77686-private
    - Device Tree fix-ups; ti,am3359-tscadc, samsung,s2mps11, samsung,s2mpa01,
                           samsung,s5m8767, brcm,misc, brcm,cru, syscon, qcom,tcsr,
 			  xylon,logicvc, max77686, x-powers,ac100, x-powers,axp152,
 			  x-powers,axp209-gpio, syscon, qcom,spmi-pmic
 
  - Bug Fixes
    - Balance refcounting (get/put); ti_am335x_tscadc, mfd-core
    - Fix IRQ trigger type; sec-irq, max77693, max14577
    - Repair off-by-one; altera-sysmgr
    - Add explicit 'select MFD_CORE' to MFD_SIMPLE_MFD_I2C
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAmGJTIAACgkQUa+KL4f8
 d2FYsRAAhcTUP7PH5gWko1mQnCzh6h3Q7iQ1MHEokZgIvqc/U2Zmxu57cF9f3jOt
 goZdVsU7x6qiMD4SfmInyEp32Emo1pbUTVz6kB3o0G+YACPHOU17xyKuh0FnzQkm
 yu/EbEDYNPbNWx9BTA9wgjSOTzCrKMBSd/p9zPzq9M69ihAf2uE9sn5Hbmso1Pdu
 tSJ7XYqWVwYzZh8OVzQd6lEIDkA+o+/gR4nCgxqAvGiXQq6yVVOCpnNzj4GrAcep
 hkuQVkg14+rmXRbLiZsmc1V+yT13bueKu2fD96gMFpXI8NkR1KZ6QRInI6FtJcl/
 m2LGPUuICpd2IiKRa1XtXFZWcMbZ2JVjJSWArgfHj7YBs9+0KcRsbpfHHirpcf14
 9LFy4TzjX2A1K0vvKhHSTAhh13HFcvWyd0GCrEhLRmapeiLDXohkUHGMVFVedXzE
 tQLCEByjcL+/OCJiQ4Jwk1aaU2cAVEXtvYuciXcBOtHkfaQR/bOYwjRm4Z3AdZyU
 zLYMkw/LWvzAaV3Rh1zP6W47WLFHbeMgTmApFOSxAbRsmun0loasVzXWrkvxZlYF
 p39l4UcSOIK08PzxqF9ZEM/LtUglShbZbg2wf0VSHzomA+oIsxT7fN16vPHLYDYL
 tsQ5fYVN0a3j4ltKFeQl7l2HV/ZzUI/Q6iGmMia5sFbwRN8tlZM=
 =SJ7N
 -----END PGP SIGNATURE-----

Merge tag 'mfd-next-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "Removed Drivers:
   - Remove support for TI TPS80031/TPS80032 PMICs

  New Device Support:
   - Add support for Magnetic Reader to TI AM335x
   - Add support for DA9063_EA to Dialog DA9063
   - Add support for SC2730 PMIC to Spreadtrum SC27xx
   - Add support for MacBookPro16,2 ICL-N UART Intel LPSS PCI
   - Add support for lots of new PMICS in QCom SPMI PMIC
   - Add support for ADC to Diolan DLN2

  New Functionality:
   - Add support for Power Off to Rockchip RK817

  Fix-ups:
   - Simplify Regmap passing to child devices in hi6421-spmi-pmic
   - SPDX licensing updates in ti_am335x_tscadc
   - Improve error handling in ti_am335x_tscadc
   - Expedite clock search in ti_am335x_tscadc
   - Generic simplifications in ti_am335x_tscadc
   - Use generic macros/defines in ti_am335x_tscadc
   - Remove unused code in ti_am335x_tscadc, cros_ec_dev
   - Convert to GPIOD in wcd934x
   - Add namespacing in ti_am335x_tscadc
   - Restrict compilation to relevant arches in intel_pmt
   - Provide better description/documentation in exynos_lpass
   - Add SPI device ID table in altera-a10sr, motorola-cpcap,
     sprd-sc27xx-spi
   - Change IRQ handling in qcom-pm8xxx
   - Split out I2C and SPI code in arizona
   - Explicitly include used headers in altera-a10sr
   - Convert sysfs show() function to in sysfs_emit
   - Standardise *_exit() and *_remove() return values in mc13xxx,
     stmpe, tps65912
   - Trivial (style/spelling/whitespace) fixups in ti_am335x_tscadc,
     qcom-spmi-pmic, max77686-private
   - Device Tree fix-ups in ti,am3359-tscadc, samsung,s2mps11,
     samsung,s2mpa01, samsung,s5m8767, brcm,misc, brcm,cru, syscon,
     qcom,tcsr, xylon,logicvc, max77686, x-powers,ac100,
     x-powers,axp152, x-powers,axp209-gpio, syscon, qcom,spmi-pmic

  Bug Fixes:
   - Balance refcounting (get/put) in ti_am335x_tscadc, mfd-core
   - Fix IRQ trigger type in sec-irq, max77693, max14577
   - Repair off-by-one in altera-sysmgr
   - Add explicit 'select MFD_CORE' to MFD_SIMPLE_MFD_I2C"

* tag 'mfd-next-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (95 commits)
  mfd: simple-mfd-i2c: Select MFD_CORE to fix build error
  mfd: tps80031: Remove driver
  mfd: max77686: Correct tab-based alignment of register addresses
  mfd: wcd934x: Replace legacy gpio interface for gpiod
  dt-bindings: mfd: qcom: pm8xxx: Add pm8018 compatible
  mfd: dln2: Add cell for initializing DLN2 ADC
  mfd: qcom-spmi-pmic: Add missing PMICs supported by socinfo
  mfd: qcom-spmi-pmic: Document ten more PMICs in the binding
  mfd: qcom-spmi-pmic: Sort compatibles in the driver
  mfd: qcom-spmi-pmic: Sort the compatibles in the binding
  mfd: janz-cmoio: Replace snprintf in show functions with sysfs_emit
  mfd: altera-a10sr: Include linux/module.h
  mfd: tps65912: Make tps65912_device_exit() return void
  mfd: stmpe: Make stmpe_remove() return void
  mfd: mc13xxx: Make mc13xxx_common_exit() return void
  dt-bindings: mfd: syscon: Add samsung,exynosautov9-sysreg compatible
  mfd: altera-sysmgr: Fix a mistake caused by resource_size conversion
  dt-bindings: gpio: Convert X-Powers AXP209 GPIO binding to a schema
  dt-bindings: mfd: syscon: Add rk3368 QoS register compatible
  mfd: arizona: Split of_match table into I2C and SPI versions
  ...
2021-11-08 12:07:52 -08:00
Linus Torvalds
5af06603c4 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid
Pull HID updates from Jiri Kosina:

 - support for Nintendo Switch Pro Controllers and Joy-Cons (Daniel J.
   Ogorchock)

 - support for new revision of the NitroKey U2F device firmware (Andrej
   Shadura)

 - LED handling improvements for Sony Playstation5 controllers (Roderick
   Colenbrander)

 - support for Apple 2021 Magic Keyboard (Alex Henrie)

 - other assorted code cleanups and new device ID additions

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid: (41 commits)
  HID: nintendo: fix -Werror build
  HID: playstation: require multicolor LED functionality
  HID: u2fzero: properly handle timeouts in usb_submit_urb
  HID: u2fzero: clarify error check and length calculations
  HID: u2fzero: Support NitroKey U2F revision of the device
  HID: wacom: Make use of the helper function devm_add_action_or_reset()
  HID: wacom: Shrink critical section in `wacom_add_shared_data`
  HID: nintendo: prevent needless queueing of the rumble worker
  HID: nintendo: ratelimit subcommands and rumble
  HID: nintendo: improve rumble performance and stability
  HID: nintendo: add IMU support
  HID: nintendo: add support for reading user calibration
  HID: nintendo: add support for charging grip
  HID: nintendo: set controller uniq to MAC
  HID: nintendo: reduce device removal subcommand errors
  HID: nintendo: patch hw version for userspace HID mappings
  HID: nintendo: send subcommands after receiving input report
  HID: nintendo: improve subcommand reliability
  HID: nintendo: add rumble support
  HID: nintendo: add home led support
  ...
2021-11-05 08:31:51 -07:00
Linus Torvalds
5a1bcbd965 Pin control changes for the v5.16 kernel cycle
Core changes:
 
 - Add infrastructure for per-parent interrupt data to support
   the Apple pin controller.
 
 New drivers:
 
 - New combined pin control and GPIO driver for the Apple SoC.
   This is used in all modern Apple silicon such as the M1
   laptops but also in at least recent iPhone variants.
 
 - New subdriver for the Qualcomm SM6350
 
 - New subdriver for the Qualcomm QCM2290
 
 - New subdriver for the Qualcomm PM6350
 
 - New subdriver for the Uniphier NX1
 
 - New subdriver for the Samsung ExynosAutoV9
 
 - New subdriver for the Mediatek MT7986
 
 - New subdriver for the nVidia Tegra194
 
 Improvements:
 
 - Improve power management in the Mediatek driver.
 
 - Improvements to the Renesas internal consistency checker.
 
 - Convert the Rockchip pin control device tree bindings to YAML.
 
 - Finally convert the Qualcomm PMIC SSBI and SPMI MPP GPIO
   driver to use hierarchical interrupts.
 
 - Convert the Qualcomm PMIC MPP device tree bindings to YAML.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmGEimgACgkQQRCzN7AZ
 XXPelQ/+M7WhOfa52zSCBMB90OrgPD1NsZnWc6+QaC96Nwh2xvf51zngt4BOdU5K
 e/K85vLN8iwM9XekFRAFA5tKbm8rGXfhKMs3neuK2tQEebRJWusBAKgarYMtGAIL
 dDm2i4C3LVBQDKGvjEqedctoLdVDs8mqaZFkGyrM0H6Q4cHK2jIxvtK6UImWEM4y
 eKJPIJgvahKmVZoh6maMynn6b7hNs94DxLNgO+6GaSXuucJ0hJ4rqLKx/rKOW7/W
 GVaxZfwSQ88zdPTSUagSXz1Q4zll32pBtcPzGPwYlsRnl/dQyWNVY0Rlon+i/Ost
 DCoNkcKhrZ6qYsqlv3pqHIZvfSCWvP4krk/kJdt/ufMz2El/vO7CEMbcea2d1ZfR
 rNz6upEUfvRJk3iihdjHR+KFk4AUaeGPqg/xZKkoxB7g9pk5asysiL29wuaTukwL
 Av1b2hRZE7ES843rjPy88vnRi22DB0WdcHH5H7gqeOfhCoOuChZN09Al5g5aPNaP
 mH8ydPXKhZZX13vZggpfKfMEltwhb5yU0diy6ECZHhV5RdTWfAzLP8cHgeiZZXJY
 zXRO9z/Et9xRdWeoENmh26l3vfkr6RlfkxvA1BC8nfrYVOGyjUTnRYVlpG/QfiqQ
 b4VP2NO5l/oioDp8TSK/JdY2e5VtPTJAjwQUzZU5I1kVgD+VLsk=
 =4Ms6
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "The most interesting aspect is that we now have initial support for
  the Apple pin controller as used in the M1 laptops and the iPhones
  which is a step forward for using Linux efficiently on this Apple
  silicon.

  Core changes:

   - Add infrastructure for per-parent interrupt data to support the
     Apple pin controller.

  New drivers:

   - New combined pin control and GPIO driver for the Apple SoC. This is
     used in all modern Apple silicon such as the M1 laptops but also in
     at least recent iPhone variants.

   - New subdriver for the Qualcomm SM6350

   - New subdriver for the Qualcomm QCM2290

   - New subdriver for the Qualcomm PM6350

   - New subdriver for the Uniphier NX1

   - New subdriver for the Samsung ExynosAutoV9

   - New subdriver for the Mediatek MT7986

   - New subdriver for the nVidia Tegra194

  Improvements:

   - Improve power management in the Mediatek driver.

   - Improvements to the Renesas internal consistency checker.

   - Convert the Rockchip pin control device tree bindings to YAML.

   - Finally convert the Qualcomm PMIC SSBI and SPMI MPP GPIO driver to
     use hierarchical interrupts.

   - Convert the Qualcomm PMIC MPP device tree bindings to YAML"

* tag 'pinctrl-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (55 commits)
  pinctrl: add pinctrl/GPIO driver for Apple SoCs
  dt-bindings: pinctrl: Add apple,npins property to apple,pinctrl
  dt-bindings: pinctrl: add #interrupt-cells to apple,pinctrl
  gpio: Allow per-parent interrupt data
  pinctrl: tegra: Fix warnings and error
  pinctrl: intel: Kconfig: Add configuration menu to Intel pin control
  pinctrl: tegra: Use correct offset for pin group
  pinctrl: core: fix possible memory leak in pinctrl_enable()
  pinctrl: bcm2835: Allow building driver as a module
  pinctrl: equilibrium: Fix function addition in multiple groups
  pinctrl: tegra: Add pinmux support for Tegra194
  pinctrl: tegra: include lpdr pin properties
  pinctrl: mediatek: add support for MT7986 SoC
  dt-bindings: pinctrl: update bindings for MT7986 SoC
  pinctrl: microchip sgpio: use reset driver
  dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add reset binding
  dt-bindings: pinctrl: qcom,pmic-mpp: switch to #interrupt-cells
  pinctrl: qcom: spmi-mpp: add support for hierarchical IRQ chip
  pinctrl: qcom: spmi-mpp: hardcode IRQ counts
  pinctrl: qcom: ssbi-mpp: add support for hierarchical IRQ chip
  ...
2021-11-05 08:24:17 -07:00
Linus Torvalds
5c904c66ed Char/Misc driver update for 5.16-rc1
Here is the big set of char and misc and other tiny driver subsystem
 updates for 5.16-rc1.
 
 Loads of things in here, all of which have been in linux-next for a
 while with no reported problems (except for one called out below.)
 
 Included are:
 	- habanana labs driver updates, including dma_buf usage,
 	  reviewed and acked by the dma_buf maintainers
 	- iio driver update (going through this tree not staging as they
 	  really do not belong going through that tree anymore)
 	- counter driver updates
 	- hwmon driver updates that the counter drivers needed, acked by
 	  the hwmon maintainer
 	- xillybus driver updates
 	- binder driver updates
 	- extcon driver updates
 	- dma_buf module namespaces added (will cause a build error in
 	  arm64 for allmodconfig, but that change is on its way through
 	  the drm tree)
 	- lkdtm driver updates
 	- pvpanic driver updates
 	- phy driver updates
 	- virt acrn and nitr_enclaves driver updates
 	- smaller char and misc driver updates
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYYPX2A8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ymUUgCbB4EKysgLuXYdjUalZDx+vvZO4k0AniS14O4k
 F+2dVSZ5WX6wumUzCaA6
 =bXQM
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the big set of char and misc and other tiny driver subsystem
  updates for 5.16-rc1.

  Loads of things in here, all of which have been in linux-next for a
  while with no reported problems (except for one called out below.)

  Included are:

   - habanana labs driver updates, including dma_buf usage, reviewed and
     acked by the dma_buf maintainers

   - iio driver update (going through this tree not staging as they
     really do not belong going through that tree anymore)

   - counter driver updates

   - hwmon driver updates that the counter drivers needed, acked by the
     hwmon maintainer

   - xillybus driver updates

   - binder driver updates

   - extcon driver updates

   - dma_buf module namespaces added (will cause a build error in arm64
     for allmodconfig, but that change is on its way through the drm
     tree)

   - lkdtm driver updates

   - pvpanic driver updates

   - phy driver updates

   - virt acrn and nitr_enclaves driver updates

   - smaller char and misc driver updates"

* tag 'char-misc-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (386 commits)
  comedi: dt9812: fix DMA buffers on stack
  comedi: ni_usb6501: fix NULL-deref in command paths
  arm64: errata: Enable TRBE workaround for write to out-of-range address
  arm64: errata: Enable workaround for TRBE overwrite in FILL mode
  coresight: trbe: Work around write to out of range
  coresight: trbe: Make sure we have enough space
  coresight: trbe: Add a helper to determine the minimum buffer size
  coresight: trbe: Workaround TRBE errata overwrite in FILL mode
  coresight: trbe: Add infrastructure for Errata handling
  coresight: trbe: Allow driver to choose a different alignment
  coresight: trbe: Decouple buffer base from the hardware base
  coresight: trbe: Add a helper to pad a given buffer area
  coresight: trbe: Add a helper to calculate the trace generated
  coresight: trbe: Defer the probe on offline CPUs
  coresight: trbe: Fix incorrect access of the sink specific data
  coresight: etm4x: Add ETM PID for Kryo-5XX
  coresight: trbe: Prohibit trace before disabling TRBE
  coresight: trbe: End the AUX handle on truncation
  coresight: trbe: Do not truncate buffer on IRQ
  coresight: trbe: Fix handling of spurious interrupts
  ...
2021-11-04 08:21:47 -07:00
Linus Torvalds
7ddb58cb0e The usual collection of clk driver updates and new driver additions. In
terms of lines it's mainly Qualcomm and Mediatek code, supporting
 various SoCs and their multitude of clk controllers.
 
 New Drivers:
  - GCC and RPMcc support for Qualcomm QCM2290 SoCs
  - GCC support for Qualcomm MSM8994/MSM8992 SoCs
  - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs
  - Support for Mediatek MT8195 SoCs
  - Initial clock driver for the Exynos850 SoC
  - Add i.MX8ULP clock driver and related bindings
 
 Updates:
  - Clock power management for new SAMA7G5 SoC
  - Updates to the master clock driver and sam9x60-pll to be able to use
    cpufreq-dt driver and avoid overclocking of CPU and MCK0 domains while
    changing the frequency via DVFS
  - Use ARRAY_SIZE in qcom clk drivers
  - Remove some impractical fallback parent names in qcom clk drivers
  - Make Mediatek clk drivers tristate
  - Refactoring of the CPU clock code and conversion of Samsung Exynos5433
    CPU clock driver to the platform driver
  - A few conversions to devm_platform_ioremap_resource()
  - Updates of the Samsung Kconfig help text
  - Update video path realted clocks for Amlogic meson8
  - Add SPI Multi I/O Bus and SDHI clocks and resets on Renesas RZ/G2L
  - Add SPI Multi I/O Bus (RPC) clocks on Renesas R-Car V3U
  - Add MediaLB clocks on Renesas R-Car H3, M3-W/W+, and M3-N
  - Remove unused helpers from i.MX specific clock header
  - Rework all i.MX clk based helpers to use clk_hw based ones
  - Rework i.MX gate/mux/divider wrappers
  - Rework imx_clk_hw_composite and imx_clk_hw_pll14xx wrappers
  - Update i.MX pllv4 and composite clocks to support i.MX8ULP
  - Disable i.MX7ULP composite clock during initialization
  - Add CLK_SET_RATE_NO_REPARENT flag to the i.MX7ULP composite
  - Disable the i.MX pfd when set pfdv2 clock rate
  - Add support for i.MX8ULP in pfdv2
  - Add the pcc reset controller support on i.MX8ULP
  - Fix the build break when clk-imx8ulp is built as module
  - Move csi_sel mux to correct base register in i.MX6UL clock drivr
  - Fix csi clk gate register in i.MX6UL clock driver
  - Fix build bug making CLK_IMX8ULP select MXC_CLK
  - Add TPU (PWM), and Z (Cortex-A76) clocks on Renesas R-Car V3U
  - Add Ethernet clocks on Renesas RZ/G2L
  - Move Rockchip to use module_platform_probe
  - Enable usage of Coresight related clocks on Rockchip rk3399
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmGDLIwRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSWasBAA2TTYnSNm/vaNHYPrKRhv5OgALOX5T8yy
 rylvO8qcGrmzX3lVRiO4Bp34jZxQQMG7d2eJn6OMbGEN+9GcsZGA3p4zA8wZaXkN
 yAnddCUEyFl2zMrikXLijhjJ87bmsKUaHHN+zGrGAxC9/VBMwDUPjp9Gy4kdmUFj
 0fq2yhWULulm7UgDTLzwow22wCYYx9/SaNbhnDj7s/eV5N2oexXOrwfIlDHtXnMZ
 4zbJtZ4GKmdicUUMIVzO7wrdEHcWgbPrY2S8UuUbM5PPMzsX7OZ4k/w94p18iT40
 kaJnvEgwZomsYkBMMTrxRjlI/AU3r9omyquKEPX2UXUsTqGHOXZqFXVDPS/6tnvU
 +sqP1V59NMmN9t3HomZ+gr+VKyjakYXuz7QlZZ5kuZRM0aWDfCaq8UEAjyU1WQ+J
 NI4BKzok7+JqEZ25MjcpEV6UBrzNnJ3SMGGiiEUxL6Fl4BE9anVUn06E16v3b5Vb
 k36eosnT3gCBvhNI6gV5zIUyavwb4ga4QJyRQJBeHE7qSVegeoauS8qTFvV04tud
 fWZwAqdLUU/fVse8iuolciZBMAkiuI/R0N8/rZ3MHLe3VB0D/Q/XWGcIheyVpALK
 KAWQ/OA96mM9qf1VBkeItdciSQ+rwAcivmcJTvVIUiwlNk36CYzRsja+sgcNphPH
 WV1CLOIrOgQ=
 =Is+O
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The usual collection of clk driver updates and new driver additions.
  In terms of lines it's mainly Qualcomm and Mediatek code, supporting
  various SoCs and their multitude of clk controllers.

  New Drivers:
   - GCC and RPMcc support for Qualcomm QCM2290 SoCs
   - GCC support for Qualcomm MSM8994/MSM8992 SoCs
   - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs
   - Support for Mediatek MT8195 SoCs
   - Initial clock driver for the Exynos850 SoC
   - Add i.MX8ULP clock driver and related bindings

  Updates:
   - Clock power management for new SAMA7G5 SoC
   - Updates to the master clock driver and sam9x60-pll to be able to
     use cpufreq-dt driver and avoid overclocking of CPU and MCK0
     domains while changing the frequency via DVFS
   - Use ARRAY_SIZE in qcom clk drivers
   - Remove some impractical fallback parent names in qcom clk drivers
   - Make Mediatek clk drivers tristate
   - Refactoring of the CPU clock code and conversion of Samsung
     Exynos5433 CPU clock driver to the platform driver
   - A few conversions to devm_platform_ioremap_resource()
   - Updates of the Samsung Kconfig help text
   - Update video path realted clocks for Amlogic meson8
   - Add SPI Multi I/O Bus and SDHI clocks and resets on Renesas RZ/G2L
   - Add SPI Multi I/O Bus (RPC) clocks on Renesas R-Car V3U
   - Add MediaLB clocks on Renesas R-Car H3, M3-W/W+, and M3-N
   - Remove unused helpers from i.MX specific clock header
   - Rework all i.MX clk based helpers to use clk_hw based ones
   - Rework i.MX gate/mux/divider wrappers
   - Rework imx_clk_hw_composite and imx_clk_hw_pll14xx wrappers
   - Update i.MX pllv4 and composite clocks to support i.MX8ULP
   - Disable i.MX7ULP composite clock during initialization
   - Add CLK_SET_RATE_NO_REPARENT flag to the i.MX7ULP composite
   - Disable the i.MX pfd when set pfdv2 clock rate
   - Add support for i.MX8ULP in pfdv2
   - Add the pcc reset controller support on i.MX8ULP
   - Fix the build break when clk-imx8ulp is built as module
   - Move csi_sel mux to correct base register in i.MX6UL clock drivr
   - Fix csi clk gate register in i.MX6UL clock driver
   - Fix build bug making CLK_IMX8ULP select MXC_CLK
   - Add TPU (PWM), and Z (Cortex-A76) clocks on Renesas R-Car V3U
   - Add Ethernet clocks on Renesas RZ/G2L
   - Move Rockchip to use module_platform_probe
   - Enable usage of Coresight related clocks on Rockchip rk3399"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (170 commits)
  clk: use clk_core_get_rate_recalc() in clk_rate_get()
  clk: at91: sama7g5: set low limit for mck0 at 32KHz
  clk: at91: sama7g5: remove prescaler part of master clock
  clk: at91: clk-master: add notifier for divider
  clk: at91: clk-sam9x60-pll: add notifier for div part of PLL
  clk: at91: clk-master: fix prescaler logic
  clk: at91: clk-master: mask mckr against layout->mask
  clk: at91: clk-master: check if div or pres is zero
  clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL
  clk: at91: pmc: add sama7g5 to the list of available pmcs
  clk: at91: clk-master: improve readability by using local variables
  clk: at91: clk-master: add register definition for sama7g5's master clock
  clk: at91: sama7g5: add securam's peripheral clock
  clk: at91: pmc: execute suspend/resume only for backup mode
  clk: at91: re-factor clocks suspend/resume
  clk: ux500: Add driver for the reset portions of PRCC
  dt-bindings: clock: u8500: Rewrite in YAML and extend
  clk: composite: Use rate_ops.determine_rate when also a mux is available
  clk: samsung: describe drivers in Kconfig
  clk: samsung: exynos5433: update apollo and atlas clock probing
  ...
2021-11-03 21:18:44 -07:00
Linus Torvalds
d461e96cd2 ARM: SoC drivers for 5.16
These are all the driver updates for SoC specific drivers. There
 are a couple of subsystems with individual maintainers picking up
 their patches here:
 
  - The reset controller subsystem add support for a few new SoC
    variants to existing drivers, along with other minor improvements
 
  - The OP-TEE subsystem gets a driver for the ARM FF-A transport
 
  - The memory controller subsystem has improvements for Tegra,
    Mediatek, Renesas, Freescale and Broadcom specific drivers.
 
  - The tegra cpuidle driver changes get merged through this
    tree this time. There are only minor changes, but they depend
    on other tegra driver updates here.
 
  - The ep93xx platform finally moves to using the drivers/clk/
    subsystem, moving the code out of arch/arm in the process.
    This depends on a small sound driver change that is included
    here as well.
 
  - There are some minor updates for Qualcomm and Tegra specific
    firmware drivers.
 
 The other driver updates are mainly for drivers/soc, which contains
 a mixture of vendor specific drivers that don't really fit elsewhere:
 
  - Mediatek drivers gain more support for MT8192, with new support for
    hw-mutex and mmsys routing, plus support for reset lines in the
    mmsys driver.
 
  - Qualcomm gains a new "sleep stats" driver, and support for
    the "Generic Packet Router" in the APR driver.
 
  - There is a new user interface for routing the UARTS on ASpeed
    BMCs, something that apparently nobody else has needed so far.
 
  - More drivers can now be built as loadable modules, in particular
    for Broadcom and Samsung platforms.
 
  - Lots of improvements to the TI sysc driver for better suspend/resume
    support
 
 Finally, there are lots of minor cleanups and new device IDs for
 amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx, layerscape,
 allwinner, broadcom, and omap.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmGCvKgACgkQmmx57+YA
 GNnNfw/8DDTfMUycVvtaNslYlWri0/2O0nSqhNIIbTAcVuD/x5qo/McDhKuv+ldM
 BoTDMjRYZfQkrNXSEj3MaxB9E0o6Srva5SM8y4+Koe0VVtvEVovjYkXOhXqSEWWl
 aqVIe0S6Y1rF/KxJlvAfGxYHb5d+6aYqzdmhjURpXNGxqpSHb9/hqisY97Q9TpnD
 6lQZOz9d1JNDq0eOh1qjcfuMjg1EHZHDZJyioCvyX38KIl2q7p3ll2z/eqrrDhQZ
 TrvL/YVosTXqBcAfi47Oz+n/CX2i0MrjVO8nfPSGOq5UL4Al3SZD4XYY96IOIQrH
 +XGFigGGAkV2LfKSEPNJWaq7g+SiQUr2jc3p8b4Zxde8/+5M127/gotiPddyG2LX
 1OnFRnPskgRApGqHjGEcEzzJUTag7Hc+YVH82TMEHZhSDMq6i30k9UnyfXsziZDV
 8CrkOpjuSg+YxFv/83bfa1pIoYtFfjGr16mq4muajodnX7+b7My9iv+2Oo2iQM9y
 DwRUKj7+eap23SEUpi4et6HlNpoF6yJMbt5Ae1k+gTK2DvQ4Cx6n4QJz/I7WC1Wp
 BdVhvSH8XVppVLtQqODud+VWvLgLerRxUpGRdbS8r5VsnNUJTvaS4YGMpm9616G7
 TrgUSSvsyu1lLqbWMh+pOCk4l3r64vSUn581hrIw6jtioNGvMdE=
 =tUuj
 -----END PGP SIGNATURE-----

Merge tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "These are all the driver updates for SoC specific drivers. There are a
  couple of subsystems with individual maintainers picking up their
  patches here:

   - The reset controller subsystem add support for a few new SoC
     variants to existing drivers, along with other minor improvements

   - The OP-TEE subsystem gets a driver for the ARM FF-A transport

   - The memory controller subsystem has improvements for Tegra,
     Mediatek, Renesas, Freescale and Broadcom specific drivers.

   - The tegra cpuidle driver changes get merged through this tree this
     time. There are only minor changes, but they depend on other tegra
     driver updates here.

   - The ep93xx platform finally moves to using the drivers/clk/
     subsystem, moving the code out of arch/arm in the process. This
     depends on a small sound driver change that is included here as
     well.

   - There are some minor updates for Qualcomm and Tegra specific
     firmware drivers.

  The other driver updates are mainly for drivers/soc, which contains a
  mixture of vendor specific drivers that don't really fit elsewhere:

   - Mediatek drivers gain more support for MT8192, with new support for
     hw-mutex and mmsys routing, plus support for reset lines in the
     mmsys driver.

   - Qualcomm gains a new "sleep stats" driver, and support for the
     "Generic Packet Router" in the APR driver.

   - There is a new user interface for routing the UARTS on ASpeed BMCs,
     something that apparently nobody else has needed so far.

   - More drivers can now be built as loadable modules, in particular
     for Broadcom and Samsung platforms.

   - Lots of improvements to the TI sysc driver for better
     suspend/resume support"

  Finally, there are lots of minor cleanups and new device IDs for
  amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx,
  layerscape, allwinner, broadcom, and omap"

* tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (179 commits)
  optee: Fix spelling mistake "reclain" -> "reclaim"
  Revert "firmware: qcom: scm: Add support for MC boot address API"
  qcom: spm: allow compile-testing
  firmware: arm_ffa: Remove unused 'compat_version' variable
  soc: samsung: exynos-chipid: add exynosautov9 SoC support
  firmware: qcom: scm: Don't break compile test on non-ARM platforms
  soc: qcom: smp2p: Add of_node_put() before goto
  soc: qcom: apr: Add of_node_put() before return
  soc: qcom: qcom_stats: Fix client votes offset
  soc: qcom: rpmhpd: fix sm8350_mxc's peer domain
  dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method
  ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226
  firmware: qcom: scm: Add support for MC boot address API
  soc: qcom: spm: Add 8916 SPM register data
  dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu
  soc: qcom: socinfo: Add PM8150C and SMB2351 models
  firmware: qcom_scm: Fix error retval in __qcom_scm_is_call_available()
  soc: aspeed: Add UART routing support
  soc: fsl: dpio: rename the enqueue descriptor variable
  soc: fsl: dpio: use an explicit NULL instead of 0
  ...
2021-11-03 17:00:52 -07:00
Linus Torvalds
ae45d84fc3 ARM: SoC DT updates for v5.16
This is a rather large update for the ARM devicetree files, after a few
 quieter releases, with 775 total commits and 47 branches pulled into
 this one. There are 5 new SoC types plus some minor variations, and
 a total of 60 new machines, so I'm limiting the summary to the main
 noteworthy items:
 
  - Apple M1 gain support for PCI and pinctrl, getting a bit
    closer to a usable system out of the box.
 
  - Qualcomm gains support for Snapdragon 690 (aka SM6350) as
    well as SM7225, 11 new smartphones, and three additional
    Chromebooks, and improvements all over the place.
 
  - Samsung gains support for ExynosAutov9, an automotive version
    of their smartphone SoC, but otherwise no major changes.
 
  - Microchip adds the SAMA5D29 SoC in the SAMA5 family, and a
    number of improvements for the recently added SAMA7 family.
    The LAN966 SoC that was added in the platform code does not
    have dts files yet. Two board files are added for the older
    at91sam9g20 SoC
 
  - Aspeed supports two additional server boards using their AST2600
    as BMC, and improves support for qemu models
 
  - Rockchip RK3566/RK3688 gets added, along with six new
    development boards using RK3328/RK3399/RK3566, and one
    Chromebook tablet.
 
  - Two NAS boxes are added using the ARMv4 based Gemini platform
 
  - One new board is added to the Intel Arria SoC FPGA family
 
  - Marvell adds one network switch based on Armada 381 and the
    new MOCHAbin 7040 development board
 
  - NXP adds support for the S32G2 automotive SoC, two imx6 based
    ebook readers, and three additional development boards, which
    is notably less than their usual additions, but they also gain
    improvements to their many existing boards
 
  - STmicroelectronics adds their stm32mp13 SoC family along with
    a reference board
 
  - Renesas adds new versions of their R-Car Gen3 SoCs and many
    updates for their older generations
 
  - Broadcom adds support for a number of Cisco Meraki wireless
    controllers, along with two new boards and other updates for
    BCM53xx/BCM47xx networking SoCs and the Raspberry Pi
    boards
 
  - Mediatek improves support for the MT81xx SoCs used in Chromebooks
    as well as the MT76xx networking SoCs
 
  - NVIDIA adds a number of cleanups and additional support for
    more hardware on the already supported machines
 
  - TI K3 adds support for three new boards along with cleanups
 
  - Toshiba adds one board for the Visconti family
 
  - Xilinx adds five new ZynqMP based machines
 
  - Amlogic support is added for the Radxa Zero and two Jethub
    home automation controllers, along with changes to other
    machines
 
  - Rob Herring continues his work on fixing dtc warnings all over
    the tree.
 
  - Minor updates for TI OMAP, Mstar, Allwinner/sunxi, Hisilicon,
    Ux500, Unisoc
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmGDCJYACgkQmmx57+YA
 GNlIlQ//VOQJeP7Om3Qt3Vai/zvrSWegAagI8quF6m4fTI0D3NVRw4KD7sld1+39
 lIcUTdM4eSXO+vsyWRSb9ESyymGGsTy9o8irIDTH2SSyawMwFwydgoO/riS6/tkG
 37c9OvCNdjhQIgxo20vW8+dr021UNJqQNG7dQzTJrlbe8IzNGkSjVO5i97v8XK2e
 HWtwhOd8W7ptmuTKdq5/DTv0V9LzcJSfWlwYPscHRGHg/t0+frC+G2H3osjgGuux
 gbbrdocy1Qmj1sqeAPBud5O2TTEu4M09HYgVWXoKcgBzTt3hJZ9TmzE4YNfUYmv6
 sYz+BaPesm2hR+zjBz0wxGG+eP27Zv4FUN/VeMGilRbhXVCv6GSf90fDTbaW4Q8F
 IR/BgN0lk2GyNjRyVUcDQI/Aus//TXAI7+rcfXccGBrxs/EBZ3e/hmNNTi9jCMBT
 NGLkXAI574tcfLUYybj87upFTPLHTwq4is9p1RY/l73wlcFDZHai+aE2X5GhYLzy
 XaYuyur1wA+v5938RjjwCYJjqssz+OlJJP1N2KeQT99PVkS0IunXFJGcsve6UOAN
 maRxI4oSU1lz6VaP8tsVJESzObwFCtOdYjgUHpRUJ8JTNTRpy/6JLAX0dnr1LrQV
 Fr6gLtodCOa2Udc5T+VkoodAw2f5Gta8cE1fQB9CjUDklkhUtsg=
 =jp4P
 -----END PGP SIGNATURE-----

Merge tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "This is a rather large update for the ARM devicetree files, after a
  few quieter releases, with 775 total commits and 47 branches pulled
  into this one.

  There are 5 new SoC types plus some minor variations, and a total of
  60 new machines, so I'm limiting the summary to the main noteworthy
  items:

   - Apple M1 gain support for PCI and pinctrl, getting a bit closer to
     a usable system out of the box.

   - Qualcomm gains support for Snapdragon 690 (aka SM6350) as well as
     SM7225, 11 new smartphones, and three additional Chromebooks, and
     improvements all over the place.

   - Samsung gains support for ExynosAutov9, an automotive version of
     their smartphone SoC, but otherwise no major changes.

   - Microchip adds the SAMA5D29 SoC in the SAMA5 family, and a number
     of improvements for the recently added SAMA7 family. The LAN966 SoC
     that was added in the platform code does not have dts files yet.
     Two board files are added for the older at91sam9g20 SoC

   - Aspeed supports two additional server boards using their AST2600 as
     BMC, and improves support for qemu models

   - Rockchip RK3566/RK3688 gets added, along with six new development
     boards using RK3328/RK3399/RK3566, and one Chromebook tablet.

   - Two NAS boxes are added using the ARMv4 based Gemini platform

   - One new board is added to the Intel Arria SoC FPGA family

   - Marvell adds one network switch based on Armada 381 and the new
     MOCHAbin 7040 development board

   - NXP adds support for the S32G2 automotive SoC, two imx6 based ebook
     readers, and three additional development boards, which is notably
     less than their usual additions, but they also gain improvements to
     their many existing boards

   - STmicroelectronics adds their stm32mp13 SoC family along with a
     reference board

   - Renesas adds new versions of their R-Car Gen3 SoCs and many updates
     for their older generations

   - Broadcom adds support for a number of Cisco Meraki wireless
     controllers, along with two new boards and other updates for
     BCM53xx/BCM47xx networking SoCs and the Raspberry Pi boards

   - Mediatek improves support for the MT81xx SoCs used in Chromebooks
     as well as the MT76xx networking SoCs

   - NVIDIA adds a number of cleanups and additional support for more
     hardware on the already supported machines

   - TI K3 adds support for three new boards along with cleanups

   - Toshiba adds one board for the Visconti family

   - Xilinx adds five new ZynqMP based machines

   - Amlogic support is added for the Radxa Zero and two Jethub home
     automation controllers, along with changes to other machines

   - Rob Herring continues his work on fixing dtc warnings all over the
     tree.

   - Minor updates for TI OMAP, Mstar, Allwinner/sunxi, Hisilicon,
     Ux500, Unisoc"

* tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (720 commits)
  arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address
  arm64: dts: apple: t8103: Add root port interrupt routing
  arm64: dts: apple: t8103: Add PCIe DARTs
  arm64: apple: Add PCIe node
  arm64: apple: Add pinctrl nodes
  ARM: dts: arm: Update ICST clock nodes 'reg' and node names
  ARM: dts: arm: Update register-bit-led nodes 'reg' and node names
  arm64: dts: exynos: add chipid node for exynosautov9 SoC
  ARM: dts: qcom: fix typo in IPQ8064 thermal-sensor node
  Revert "arm64: dts: qcom: msm8916-asus-z00l: Add sensors"
  arm64: dts: qcom: ipq6018: Remove unused 'iface_clk' property from dma-controller node
  arm64: dts: qcom: ipq6018: Remove unused 'qcom,config-pipe-trust-reg' property
  arm64: dts: qcom: sm8350: Add CPU topology and idle-states
  arm64: dts: qcom: Drop unneeded extra device-specific includes
  arm64: dts: qcom: msm8916: Drop standalone smem node
  arm64: dts: qcom: Fix node name of rpm-msg-ram device nodes
  arm64: dts: qcom: msm8916-asus-z00l: Add sensors
  arm64: dts: qcom: msm8916-asus-z00l: Add SDCard
  arm64: dts: qcom: msm8916-asus-z00l: Add touchscreen
  arm64: dts: qcom: sdm845-oneplus: remove devinfo-size from ramoops node
  ...
2021-11-03 16:56:03 -07:00
Stephen Boyd
e2ceaa867d Merge branches 'clk-composite-determine-fix', 'clk-allwinner', 'clk-amlogic' and 'clk-samsung' into clk-next
* clk-composite-determine-fix:
  clk: composite: Use rate_ops.determine_rate when also a mux is available
  clk: composite: Also consider .determine_rate for rate + mux composites

* clk-allwinner:
  clk: sunxi: sun8i-apb0: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi: sun6i-ar100: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi: sun6i-apb0-gates: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi: sun6i-apb0: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun9i-a80-usb: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun9i-a80-de: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun9i-a80: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun8i-r40: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun8i-de2: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun8i-a83t: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun50i-h6: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun50i-a64: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi: clk-mod0: Make use of the helper function devm_platform_ioremap_resource()
  dt-bindings: clocks: Fix typo in the H6 compatible
  clk: sunxi-ng: Use a separate lock for each CCU instance
  clk: sunxi-ng: Prevent unbinding CCUs via sysfs
  clk: sunxi-ng: Unregister clocks/resets when unbinding
  clk: sunxi-ng: Add machine dependency to A83T CCU
  clk: sunxi-ng: mux: Remove unused 'reg' field

* clk-amlogic:
  clk: meson: meson8b: Make the video clock trees mutable
  clk: meson: meson8b: Initialize the HDMI PLL registers
  clk: meson: meson8b: Add the HDMI PLL M/N parameters
  clk: meson: meson8b: Add the vid_pll_lvds_en gate clock
  clk: meson: meson8b: Use CLK_SET_RATE_NO_REPARENT for vclk{,2}_in_sel
  clk: meson: meson8b: Export the video clocks

* clk-samsung:
  clk: samsung: describe drivers in Kconfig
  clk: samsung: exynos5433: update apollo and atlas clock probing
  clk: samsung: add support for CPU clocks
  clk: samsung: Introduce Exynos850 clock driver
  dt-bindings: clock: Document Exynos850 CMU bindings
  dt-bindings: clock: Add bindings definitions for Exynos850 CMU
  clk: samsung: clk-pll: Implement pll0831x PLL type
  clk: samsung: clk-pll: Implement pll0822x PLL type
  clk: samsung: s5pv210-audss: Make use of devm_platform_ioremap_resource()
  clk: samsung: exynos5433: Make use of devm_platform_ioremap_resource()
  clk: samsung: exynos4412-isp: Make use of devm_platform_ioremap_resource()
  clk: samsung: exynos-audss: Make use of devm_platform_ioremap_resource()
2021-11-02 11:27:06 -07:00
Stephen Boyd
8d741ecd46 Merge branches 'clk-imx', 'clk-ux500' and 'clk-debugfs' into clk-next
* clk-imx: (21 commits)
  clk: imx: Make CLK_IMX8ULP select MXC_CLK
  clk: imx: imx6ul: Fix csi clk gate register
  clk: imx: imx6ul: Move csi_sel mux to correct base register
  clk: imx: Fix the build break when clk-imx8ulp build as module
  clk: imx: Add the pcc reset controller support on imx8ulp
  clk: imx: Add clock driver for imx8ulp
  clk: imx: Update the pfdv2 for 8ulp specific support
  clk: imx: disable the pfd when set pfdv2 clock rate
  clk: imx: Add 'CLK_SET_RATE_NO_REPARENT' for composite-7ulp
  clk: imx: disable i.mx7ulp composite clock during initialization
  clk: imx: Update the compsite driver to support imx8ulp
  clk: imx: Update the pllv4 to support imx8ulp
  dt-bindings: clock: Add imx8ulp clock support
  clk: imx: Rework imx_clk_hw_pll14xx wrapper
  clk: imx: Rework all imx_clk_hw_composite wrappers
  clk: imx: Rework all clk_hw_register_divider wrappers
  clk: imx: Rework all clk_hw_register_mux wrappers
  clk: imx: Rework all clk_hw_register_gate2 wrappers
  clk: imx: Rework all clk_hw_register_gate wrappers
  clk: imx: Make mux/mux2 clk based helpers use clk_hw based ones
  ...

* clk-ux500:
  clk: ux500: Add driver for the reset portions of PRCC
  dt-bindings: clock: u8500: Rewrite in YAML and extend

* clk-debugfs:
  clk: use clk_core_get_rate_recalc() in clk_rate_get()
2021-11-02 11:27:02 -07:00
Stephen Boyd
a379e16ab8 Merge branches 'clk-qcom', 'clk-mtk', 'clk-versatile' and 'clk-doc' into clk-next
- Use ARRAY_SIZE in qcom clk drivers
 - Remove some impractical fallback parent names in qcom clk drivers
 - GCC and RPMcc support for Qualcomm QCM2290 SoCs
 - GCC support for Qualcomm MSM8994/MSM8992 SoCs
 - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs
 - Support for Mediatek MT8195 SoCs
 - Make Mediatek clk drivers tristate

* clk-qcom: (44 commits)
  clk: qcom: gdsc: enable optional power domain support
  clk: qcom: videocc-sm8250: use runtime PM for the clock controller
  clk: qcom: dispcc-sm8250: use runtime PM for the clock controller
  dt-bindings: clock: qcom,videocc: add mmcx power domain
  dt-bindings: clock: qcom,dispcc-sm8x50: add mmcx power domain
  clk: qcom: gcc-sc7280: Drop unused array
  clk: qcom: camcc: Add camera clock controller driver for SC7280
  dt-bindings: clock: Add YAML schemas for CAMCC clocks on SC7280
  clk: qcom: Add lpass clock controller driver for SC7280
  dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280
  clk: qcom: Kconfig: Sort the symbol for SC_LPASS_CORECC_7180
  clk: qcom: mmcc-sdm660: Add hw_ctrl flag to venus_core0_gdsc
  clk: qcom: mmcc-sdm660: Add necessary CXCs to venus_gdsc
  clk: qcom: gcc-msm8994: Use ARRAY_SIZE() for num_parents
  clk: qcom: gcc-msm8994: Add proper msm8992 support
  clk: qcom: gcc-msm8994: Add modem reset
  clk: qcom: gcc-msm8994: Remove the inexistent GDSC_PCIE
  clk: qcom: gcc-msm8994: Add missing clocks
  clk: qcom: gcc-msm8994: Add missing NoC clocks
  clk: qcom: gcc-msm8994: Fix up SPI QUP clocks
  ...

* clk-mtk: (28 commits)
  clk: mediatek: Export clk_ops structures to modules
  clk: mediatek: support COMMON_CLK_MT6779 module build
  clk: mediatek: support COMMON_CLK_MEDIATEK module build
  clk: composite: export clk_register_composite
  clk: mediatek: Add MT8195 apusys clock support
  clk: mediatek: Add MT8195 imp i2c wrapper clock support
  clk: mediatek: Add MT8195 wpesys clock support
  clk: mediatek: Add MT8195 vppsys1 clock support
  clk: mediatek: Add MT8195 vppsys0 clock support
  clk: mediatek: Add MT8195 vencsys clock support
  clk: mediatek: Add MT8195 vdosys1 clock support
  clk: mediatek: Add MT8195 vdosys0 clock support
  clk: mediatek: Add MT8195 vdecsys clock support
  clk: mediatek: Add MT8195 scp adsp clock support
  clk: mediatek: Add MT8195 mfgcfg clock support
  clk: mediatek: Add MT8195 ipesys clock support
  clk: mediatek: Add MT8195 imgsys clock support
  clk: mediatek: Add MT8195 ccusys clock support
  clk: mediatek: Add MT8195 camsys clock support
  clk: mediatek: Add MT8195 infrastructure clock support
  ...

* clk-versatile:
  clk: versatile: hide clock drivers from non-ARM users
  clk: versatile: Rename ICST to CLK_ICST
  clk: versatile: clk-icst: Support 'reg' in addition to 'vco-offset' for register address
  dt-bindings: clock: arm,syscon-icst: Use 'reg' instead of 'vco-offset' for VCO register address

* clk-doc:
  dt-bindings: clk: fixed-mmio-clock: Convert to YAML
2021-11-02 11:26:33 -07:00
Roderick Colenbrander
61177c088a leds: add new LED_FUNCTION_PLAYER for player LEDs for game controllers.
Player LEDs are commonly found on game controllers from Nintendo and Sony
to indicate a player ID across a number of LEDs. For example, "Player 2"
might be indicated as "-x--" on a device with 4 LEDs where "x" means on.

This patch introduces LED_FUNCTION_PLAYER1-5 defines to properly indicate
player LEDs from the kernel. Until now there was no good standard, which
resulted in inconsistent behavior across xpad, hid-sony, hid-wiimote and
other drivers. Moving forward new drivers should use LED_FUNCTION_PLAYERx.

Note: management of Player IDs is left to user space, though a kernel
driver may pick a default value.

Signed-off-by: Roderick Colenbrander <roderick.colenbrander@sony.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2021-10-27 09:49:29 +02:00
Linus Walleij
f2b883bbdd dt-bindings: clock: u8500: Rewrite in YAML and extend
This rewrites the ux500/u8500 clock bindings in YAML schema and extends them
with the PRCC reset controller.

The bindings are a bit idiomatic but it just reflects their age, the ux500
platform was used as guinea pig for early device tree conversion of platforms
in 2015. The new subnode for the reset controller follows the pattern of the
old bindings and adds a node with reset-cells for this.

Cc: devicetree@vger.kernel.org
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210921184803.1757916-1-linus.walleij@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-26 18:03:41 -07:00
Srinivas Kandagatla
e3008b7ccb
ASoC: dt-bindings: rename q6afe.h to q6dsp-lpass-ports.h
move all LPASS audio ports defines from q6afe.h to q6dsp-lpass-ports.h
as these belong to LPASS IP.
Also this move helps in reusing this header across multiple audio
frameworks on Qualcomm Audio DSP.

This patch is split out of the dt-bindings patch to enable easy review.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211026111655.1702-4-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-10-26 13:49:57 +01:00
Mark Brown
21b178b8e9 v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org
This immutable branch is based on v5.15-rc1 and contains the following
 patches extending the existig APR driver to also implement GPR:
 20210927135559.738-2-srinivas.kandagatla@linaro.org
 20210927135559.738-3-srinivas.kandagatla@linaro.org
 20210927135559.738-4-srinivas.kandagatla@linaro.org
 20210927135559.738-5-srinivas.kandagatla@linaro.org
 20210927135559.738-6-srinivas.kandagatla@linaro.org
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmFSiE4bHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FNV0P/1R/t0Dfj+vJg8SarPPg
 u/2LbLBAhFfn0WoVJgdYmpW3lG3kxG+z7I4s5gDdKCrKeyj//jJReRVwkgG4QxNs
 NgSAd24o/afb4/jcNTlmbhIyo+k9gsU5rxw7AynwRkLOyfNG71sytEH/1LvzBj1F
 X5AVQlzEnTsclVlwK3n9ZSm3cKiwgyFnqBLZs+e199FVjJgFGk6WDPplWPo50+hz
 pYImAVPGRbwSGH6cR2M4JSwpU/GJzFAAZf5Y8GrEBQVyhiQeKvYV7UNPjbNt15tv
 qI8Xfa5xbgAFunRC6GsjpaffTmCzHJKYgikchbIKre906IYBLwDHTnxvtXXDgBVe
 Zrd0jFQIrtuHseLQkvaEiVuuzmFibm/atdMUWCyncdunl2fuwTS60hCG+mRd7Pz2
 B85HmcAfS7LTu+dkn4doG4zVHO/JVpYr2eZExb1wxY0Kyz+5KDsESqUCB+7c6wya
 rGqsC+LX8l0MjunxSJbZUcuQLLcaFN9AXJTB6a0gPk+VLZH7EutkG98SonYU07w/
 Wff0bwVQWk3I4QHf0NaS5Ikbcx8KAv1ZaqcUaL2pPYNtIamkiyJdH6f+4C0q+K6n
 aMcLNLzaRcVayHO88SG3XpDLNc+cR2f/rehAkghxXJ8jhdtV5HSb5HLKgu+Lf8q4
 hEBzBQLYeRFJM1TuaZL02aXw
 =r7vf
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmF3+W4ACgkQJNaLcl1U
 h9C+DQf7Bxzz7xjGv5AFyZ8eZbAx0LnTBp9SytON2gh5mxWGUCI0kxSdnEd/ot9u
 PUhWMf7192kQw4qmkZArdtKiaxhZdKZvXZ0kTfyoTvcR4o9fdgWtMUla5QhBVzAu
 UgZbTH91wDt4P68cYzLrhG8gFlagzSwRT8WF4imJmcJsehPq22Nz70tK5tSePZko
 KcbnpkqYV19CQRJsEKXBivAptpE/oAQJBSoYVw/gkizqrznNGI2cqWBl+krGOdBW
 zI+CZbzuAwTi9xNu3tmlcgPDGxOHYFVU7aIy2w/ENNRsAbWgFThcO25pWBKROtKc
 45uC5fj24R6cCCyuygwFJuLoeRy31Q==
 =ts3p
 -----END PGP SIGNATURE-----

Merge tag '20210927135559.738-6-srinivas.kandagatla@linaro.org' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into v11_20211026_srinivas_kandagatla_asoc_qcom_add_audioreach_support for audioreach support

v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org

This immutable branch is based on v5.15-rc1 and contains the following
patches extending the existig APR driver to also implement GPR:
20210927135559.738-2-srinivas.kandagatla@linaro.org
20210927135559.738-3-srinivas.kandagatla@linaro.org
20210927135559.738-4-srinivas.kandagatla@linaro.org
20210927135559.738-5-srinivas.kandagatla@linaro.org
20210927135559.738-6-srinivas.kandagatla@linaro.org
2021-10-26 13:49:25 +01:00
Swapnil Jakhade
f9aec1648d dt-bindings: phy: cadence-torrent: Add clock IDs for derived and received refclk
Add clock IDs for derived and received reference clock output.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210922123735.21927-3-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:23 +05:30
Srinivasa Rao Mandadapu
de6e9190a8
ASoC: dt-bindings: lpass: add binding headers for digital codecs
Add header defining for lpass internal digital codecs rx,tx and va
dai node id's.

Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
Link: https://lore.kernel.org/r/1633670491-27432-1-git-send-email-srivasam@codeaurora.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-10-25 17:41:24 +01:00
Miquel Raynal
59139ada4a clk: ti: am43xx: Add clkctrl data for am43xx ADC1
Declare ADC1 clkctrl which feeds the magnetic-reader/ADC1 hardware
module.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20211015081506.933180-2-miquel.raynal@bootlin.com
2021-10-20 17:06:20 +01:00
Arnd Bergmann
353bbb3d07 i.MX DT bindings update for 5.16:
- Various board compatible addition: NXP S32G2, LS1021A TSN, Toradex
   Colibri i.MX6ULL, LX2160A BlueBox 3 boards.
 - Toradex board and module compatibles clean-up.
 - Convert fsl-linflexuart bindings to json-schema format and add S32G2
   compatible.
 - Add bindings and defines for i.MX8MM VPU and DISP blk-ctrl.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmFqx00UHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM6yMgf/RrQ/w3oGlI6lPJS+JiP2FGJwjzwS
 ICtYUInxDCHD4sdKUYT7ZIT4CGBbNabX/7jGVxwFyrbp1YkTp4s4aV1zgqGYdLAh
 6/8X3MsYT9unYLWGh0jSyWJatYvj6kkKWQB95g3nuvUzJcxIEP3/e7JFngEebCCV
 F++VN4y4b+B3GZbZuiGEOQEvjkG+kC776+Lhm1HNnq3nzcCfJyXqE4tQiSPJOyrJ
 aSocMW27GLpBW7VyUJOs6vHgWPeSZzHLar/iwWBNXQaq7qlb2tILd3f1PxPuiBqy
 tYO3Xm6D1O0LdnxcdV0XkyRSC83sjeRCVD1KzfBO/cJUXwJmT+EsrkikmA==
 =HEuA
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFwEtoACgkQmmx57+YA
 GNnpYg/9FmaMO8cUF4FQGW1+HVZfxtv65emlTlZhC3DHhWKZxPY7AXR1ZKrZJmDr
 kukBUpKkRYg7bg1/GgaEjpqlpAQNTXsCQhLUGPE9tHrSM3RWZziowZd6GFUcAnXi
 u8MSQts4uVNuzWcUz1Oe60Ru7UrXuoh+s9emVeCcpEZgDLuil6vtioJJgYDqoMWH
 dS9EzD/B0V5j3gIQa2PHUeWVaPUEvn5NwmLGB0deIBKctPyH+mNPSsaaYvgXRwN6
 BO/IvgScVFLc5R3sZurGNYW6hmBhxHu+FLe026faKsg/yZCU4MzFb4Loso1Yt8lW
 y9QX6PHtsW9Ya5L2+ExfPmSd/x/T9z0snLvjhE2TWYPFBbA/HT8UQ9To5l5l1HC9
 rDCTbHTWXkSRI42Bzbhbm+RrifHAQWmJq1+hjzgrPtvyT0vTeSjes/l4ct2XllfX
 YZWS32sMi2EiMwD0PFBx965vXaIz8EHtuvP8b1xTX6qlJWJdLUsEjR8nPw6PW2NZ
 QSMzUk9I2zPRRImSoI1w5zvCxrAv94rtGXOJFlUs4HFD9XzyIW6Vr/kjEHdLjQgn
 T5cOpC7O5ZuZPAKFp2MT+hb8f3vBcmCLEZau6wmyXV7xtHxSqaGAFuunZQgzM5Kg
 fkmdSIMYS/Ayj9PQUb/sjOJB0+9/XgbpYSeSsb+olg0wLMm5Swo=
 =uZE/
 -----END PGP SIGNATURE-----

Merge tag 'imx-bindings-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX DT bindings update for 5.16:

- Various board compatible addition: NXP S32G2, LS1021A TSN, Toradex
  Colibri i.MX6ULL, LX2160A BlueBox 3 boards.
- Toradex board and module compatibles clean-up.
- Convert fsl-linflexuart bindings to json-schema format and add S32G2
  compatible.
- Add bindings and defines for i.MX8MM VPU and DISP blk-ctrl.

* tag 'imx-bindings-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: arm: fsl: add ls1021a-tsn board
  dt-bindings: power: imx8mm: add defines for DISP blk-ctrl domains
  dt-bindings: soc: add binding for i.MX8MM DISP blk-ctrl
  dt-bindings: power: imx8mm: add defines for VPU blk-ctrl domains
  dt-bindings: soc: add binding for i.MX8MM VPU blk-ctrl
  dt-bindings: arm: fsl: Add E70K02 based ebook readers
  dt-bindings: arm: fsl: add toradex,colibri-imx6ull-emmc
  dt-bindings: arm: fsl: clean-up all toradex boards/modules
  dt-bindings: serial: fsl-linflexuart: add compatible for S32G2
  dt-bindings: serial: fsl-linflexuart: convert to json-schema format
  dt-bindings: arm: fsl: add NXP S32G2 boards
  dt-bindings: arm: fsl: document the LX2160A BlueBox 3 boards

Link: https://lore.kernel.org/r/20211016140138.1603-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20 15:00:09 +02:00
Taniya Das
a764e1ed50 dt-bindings: clock: Add YAML schemas for CAMCC clocks on SC7280
The camera clock controller clock provider have a bunch of generic
properties that are needed in a device tree. Add the CAMCC clock IDs for
camera client to request for the clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1633567425-11953-1-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:24:54 -07:00
Taniya Das
d15eb80124 dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
properties that are needed in a device tree. Add the LPASS clock IDs for
LPASS PIL client to request for the clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1633484416-27852-2-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:22:49 -07:00
Konrad Dybcio
a888dc4cae clk: qcom: gcc-msm8994: Add modem reset
This will be required to support the modem.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-7-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Konrad Dybcio
b8f415c6ae clk: qcom: gcc-msm8994: Add missing clocks
This should be the last "add missing clocks" commit, as to
my knowledge there are no more clocks registered within gcc.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-5-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Konrad Dybcio
74a33fac3a clk: qcom: gcc-msm8994: Add missing NoC clocks
Add necessary NoC clocks to provide frequency sources for
relevant branch clocks.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-4-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Shawn Guo
78b727d028 clk: qcom: smd-rpm: Add QCM2290 RPM clock support
Add support for RPM-managed clocks on the QCM2290 platform.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210917030434.19859-4-shawn.guo@linaro.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:22 -07:00
Shawn Guo
496d1a13d4 clk: qcom: Add Global Clock Controller driver for QCM2290
Add Global Clock Controller (GCC) driver for QCM2290.  This is a porting
of gcc-scuba driver from CAF msm-4.19, with GDSC support added on top.

Because the alpha_pll on the platform has a different register
layout (offsets), its own clk_alpha_pll_regs_offset[] is used in the
driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210919023308.24498-3-shawn.guo@linaro.org
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Drop duplicate includes, clk.h include, module alias]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 12:43:02 -07:00
Sam Protsenko
2ae5c2c3f8 dt-bindings: clock: Add bindings definitions for Exynos850 CMU
Clock controller driver is designed to have separate instances for each
particular CMU. So clock IDs in this bindings header also start from 1
for each CMU.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211008154352.19519-4-semen.protsenko@linaro.org
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2021-10-09 22:21:14 +02:00
Enric Balletbo i Serra
4bdb00edbd arm64: dts: mt8183: Add the mmsys reset bit to reset the dsi0
Reset the DSI hardware is needed to prevent different settings between
the bootloader and the kernel.

While here, also remove the undocumented and also not used
'mediatek,syscon-dsi' property.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210930103105.v4.5.I933f1532d7a1b2910843a9644c86a7d94a4b44e1@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08 15:11:14 +02:00
Enric Balletbo i Serra
7fdb1bc3d9 arm64: dts: mt8173: Add the mmsys reset bit to reset the dsi0
Reset the DSI hardware is needed to prevent different settings between
the bootloader and the kernel.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210930103105.v4.4.I7bd7d9a8da5e2894711b700a1127e6902a2b2f1d@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08 15:11:13 +02:00
Enric Balletbo i Serra
f07c776f6d arm64: dts: mediatek: Move reset controller constants into common location
The DT binding includes for reset controllers are located in
include/dt-bindings/reset/. Move the Mediatek reset constants in there.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20210930103105.v4.1.I514d9aafff3a062f751b37d3fea7402f67595b86@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08 15:11:13 +02:00
Lucas Stach
e66f2cd293 dt-bindings: power: imx8mm: add defines for DISP blk-ctrl domains
This adds the defines for the power domains provided by the DISP
blk-ctrl.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05 14:36:20 +08:00
Lucas Stach
5d6fdcf2e5 dt-bindings: power: imx8mm: add defines for VPU blk-ctrl domains
This adds the defines for the power domains provided by the VPU
blk-ctrl.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05 14:35:49 +08:00
Zhiyong Tao
26564c4435 dt-bindings: pinctrl: mt8195: add rsel define
This patch adds rsel define for mt8195.

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210924080632.28410-2-zhiyong.tao@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-03 00:43:35 +02:00
Jacky Bai
d48f12d9ae dt-bindings: clock: Add imx8ulp clock support
Add the clock dt-binding file for i.MX8ULP.

For pcc node, it will also be used as a reset controller,
so add the '#reset-cells' property description and add the
pcc reset IDs.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20210914065208.3582128-2-ping.bai@nxp.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2021-09-30 16:22:55 +03:00
Bjorn Andersson
f27591125a v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org
This immutable branch is based on v5.15-rc1 and contains the following
 patches extending the existig APR driver to also implement GPR:
 20210927135559.738-2-srinivas.kandagatla@linaro.org
 20210927135559.738-3-srinivas.kandagatla@linaro.org
 20210927135559.738-4-srinivas.kandagatla@linaro.org
 20210927135559.738-5-srinivas.kandagatla@linaro.org
 20210927135559.738-6-srinivas.kandagatla@linaro.org
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmFSiE4bHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FNV0P/1R/t0Dfj+vJg8SarPPg
 u/2LbLBAhFfn0WoVJgdYmpW3lG3kxG+z7I4s5gDdKCrKeyj//jJReRVwkgG4QxNs
 NgSAd24o/afb4/jcNTlmbhIyo+k9gsU5rxw7AynwRkLOyfNG71sytEH/1LvzBj1F
 X5AVQlzEnTsclVlwK3n9ZSm3cKiwgyFnqBLZs+e199FVjJgFGk6WDPplWPo50+hz
 pYImAVPGRbwSGH6cR2M4JSwpU/GJzFAAZf5Y8GrEBQVyhiQeKvYV7UNPjbNt15tv
 qI8Xfa5xbgAFunRC6GsjpaffTmCzHJKYgikchbIKre906IYBLwDHTnxvtXXDgBVe
 Zrd0jFQIrtuHseLQkvaEiVuuzmFibm/atdMUWCyncdunl2fuwTS60hCG+mRd7Pz2
 B85HmcAfS7LTu+dkn4doG4zVHO/JVpYr2eZExb1wxY0Kyz+5KDsESqUCB+7c6wya
 rGqsC+LX8l0MjunxSJbZUcuQLLcaFN9AXJTB6a0gPk+VLZH7EutkG98SonYU07w/
 Wff0bwVQWk3I4QHf0NaS5Ikbcx8KAv1ZaqcUaL2pPYNtIamkiyJdH6f+4C0q+K6n
 aMcLNLzaRcVayHO88SG3XpDLNc+cR2f/rehAkghxXJ8jhdtV5HSb5HLKgu+Lf8q4
 hEBzBQLYeRFJM1TuaZL02aXw
 =r7vf
 -----END PGP SIGNATURE-----

Merge tag '20210927135559.738-6-srinivas.kandagatla@linaro.org' into drivers-for-5.16

v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org

This immutable branch is based on v5.15-rc1 and contains the following
patches extending the existig APR driver to also implement GPR:
20210927135559.738-2-srinivas.kandagatla@linaro.org
20210927135559.738-3-srinivas.kandagatla@linaro.org
20210927135559.738-4-srinivas.kandagatla@linaro.org
20210927135559.738-5-srinivas.kandagatla@linaro.org
20210927135559.738-6-srinivas.kandagatla@linaro.org
2021-09-27 22:13:45 -05:00
Srinivas Kandagatla
974c6faf76 soc: dt-bindings: qcom: add gpr bindings
Qualcomm Generic Packet router aka GPR is the IPC mechanism found
in AudioReach next generation signal processing framework to perform
command and response messages between various processors.

GPR has concepts of static and dynamic port, all static services like
APM (Audio Processing Manager), PRM (Proxy resource manager) have
fixed port numbers where as dynamic services like graphs have dynamic
port numbers which are allocated at runtime. All GPR packet messages
will have source and destination domain and port along with opcode
and payload.

This support is added using existing APR driver to reuse most of
the code.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210927135559.738-5-srinivas.kandagatla@linaro.org
2021-09-27 22:10:07 -05:00
Sibi Sankar
e603577231 dt-bindings: soc: qcom: aoss: Delete unused power-domain definitions
Delete unused power-domain definitions exposed by AOSS QMP.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631800770-371-14-git-send-email-sibis@codeaurora.org
2021-09-27 15:01:59 -05:00
Martin Blumenstingl
2e1205422c clk: meson: meson8b: Export the video clocks
Setting the video clocks requires fine-tuned adjustments of various
video clocks. Export the required ones to allow changing the video clock
for the CVBS and HDMI outputs at runtime.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20210713232510.3057750-7-martin.blumenstingl@googlemail.com
2021-09-23 11:46:37 +02:00
Konrad Dybcio
92dde3279d dt-bindings: power: rpmpd: Add SM6350 to rpmpd binding
Add compatible and constants for the power domains exposed by the RPMH
in the Qualcomm SM6350 platform.

Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210820203105.229764-3-konrad.dybcio@somainline.org
2021-09-21 17:41:49 -05:00
Vladimir Lypak
cdb6f6044a dt-bindings: power: rpmpd: Add MSM8953 to rpmpd binding
Add compatible and constants for the power domains exposed by the RPM
in the Qualcomm MSM8953 platform.

Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Adam Skladowski <a_skl39@protonmail.com>
Signed-off-by: Sireesh Kodali <sireeshkodali1@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210825170233.19859-1-sireeshkodali1@gmail.com
2021-09-21 17:41:48 -05:00
Chun-Jie Chen
01404648df clk: mediatek: Add dt-bindings of MT8195 clocks
Add MT8195 clock dt-bindings, includes topckgen, apmixedsys,
infracfg_ao, pericfg_ao and subsystem clocks.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210914021633.26377-3-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14 15:05:37 -07:00
Srinivasa Rao Mandadapu
bfad37c53a
ASoC: dt-bindings: lpass: add binding headers for digital codecs
Add header defining for lpass internal digital codecs rx,tx and va
dai node id's.

Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
Link: https://lore.kernel.org/r/1630934854-14086-1-git-send-email-srivasam@codeaurora.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-09-13 01:59:13 +01:00
Linus Torvalds
4c00e1e2e5 linux-watchdog 5.15-rc1 tag
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.14 (GNU/Linux)
 
 iEYEABECAAYFAmE3t2UACgkQ+iyteGJfRspKrgCfVDZuMeFiDrRjPz9FMDUncIZ7
 /24AoKWWPcOJLNXXNCwwD61kcW34LzVV
 =gMcs
 -----END PGP SIGNATURE-----

Merge tag 'linux-watchdog-5.15-rc1' of git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:

 - add Mediatek MT7986 & MT8195 wdt support

 - add Maxim MAX63xx

 - drop bd70528 support

 - rewrite ixp4xx to watchdog framework

 - constify static struct watchdog_ops for sl28cpld_wdt, mpc8xxx_wdt and
   tqmx86

 - introduce watchdog_dev_suspend/resume

 - several fixes and improvements

* tag 'linux-watchdog-5.15-rc1' of git://www.linux-watchdog.org/linux-watchdog:
  dt-bindings: watchdog: Add compatible for Mediatek MT7986
  watchdog: ixp4xx: Rewrite driver to use core
  watchdog: Start watchdog in watchdog_set_last_hw_keepalive only if appropriate
  watchdog: max63xx_wdt: Add device tree probing
  dt-bindings: watchdog: Add Maxim MAX63xx bindings
  watchdog: mediatek: mt8195: add wdt support
  dt-bindings: reset: mt8195: add toprgu reset-controller header file
  watchdog: tqmx86: Constify static struct watchdog_ops
  watchdog: mpc8xxx_wdt: Constify static struct watchdog_ops
  watchdog: sl28cpld_wdt: Constify static struct watchdog_ops
  watchdog: iTCO_wdt: Fix detection of SMI-off case
  watchdog: bcm2835_wdt: consider system-power-controller property
  watchdog: imx2_wdg: notify wdog core to stop ping worker on suspend
  watchdog: introduce watchdog_dev_suspend/resume
  watchdog: Fix NULL pointer dereference when releasing cdev
  watchdog: only run driver set_pretimeout op if device supports it
  watchdog: bd70528 drop bd70528 support
2021-09-07 13:52:46 -07:00
Linus Torvalds
c793011242 This is the bulk of pin control changes for the v5.15 kernel cycle,
no core changes at all this time, just driver work!
 
 New drivers:
 
 - New subdriver for Intel Keem Bay (an ARM-based SoC)
 
 - New subdriver for Qualcomm MDM9607 and SM6115
 
 - New subdriver for ST Microelectronics STM32MP135
 
 - New subdriver for Freescale i.MX8ULP ("Ultra Low Power")
 
 - New subdriver for Ingenic X2100
 
 - Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO
 
 - Support Samsung Exynos850
 
 - Support Renesas RZ/G2L
 
 Enhancements:
 
 - A major refactoring of the Rockchip driver, breaking part of it out
   to a separate GPIO driver in drivers/gpio
 
 - Pin bias support on Renesas r8a77995
 
 - Add SCI pins support to Ingenic JZ4755 and JZ4760
 
 - Mediatek device tree bindings converted to YAML
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmEw+3cACgkQQRCzN7AZ
 XXOBihAAyVGtmXsEO9yO50R0+RzbTvD8QVGTdBqjSK/ILghoP5xRZzYkOt9oKUgG
 2ue24euJ2Ww0+tV69CEKHOfTt8vnXEawQe9hiROQTgSDrT+9ScdT81pEQPH00smM
 oQJqxXmi0HQ28r6NyrA/0WN6f0J+nEh7f4STPWtSW8E3Cz/pyODhrtdhyNXbzMJ3
 W9JGjTsz4VBy7qurb0RKpQrZ244uDyFCMzZnoBvJBN/f6Jupu09d0mNkDrYhvK5z
 FVdIwFEZ2sssF9zf33BkJ7BKnHa5WANJD3RaM2fcCC/sFIq8k3ZVHhvOkdE3QmLp
 yWrFZREsJvvK1U/ksHRFB3RucOMKVAXV+CnVxKqTU7rv+cEHH0l/TacPqfZaONm9
 LGF3FoGYnG5oO+CxtfAedpHmajDZZNky2RC0Eov/Eigiq+VHXpuClB/DcpHyCuv2
 aKDxeqP8JXsZW1t7YutCb6w5f6f8SKC/csaFkMqCJMXz10sCPjKBsvlgWq49A99X
 CtwJxlzDKI7i9TSffCTHYUQBWAYa/b3fwnwuVphzpVya1gERvHN30ZhJH9ho0LGW
 YNNdVAvqNdH6FzyTzOY8fOKc/J2OY1Yd7gL35T0xYiTrT8JK7rwW8pUh0JINxSdU
 QGHjis4WjGUFzgqUpC8qhI6u+rInLRr08sGJ/qnj5TmpZRp9rsk=
 =I6N/
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.15 kernel cycle, no
  core changes at all this time, just driver work!

  New drivers:

   - New subdriver for Intel Keem Bay (an ARM-based SoC)

   - New subdriver for Qualcomm MDM9607 and SM6115

   - New subdriver for ST Microelectronics STM32MP135

   - New subdriver for Freescale i.MX8ULP ("Ultra Low Power")

   - New subdriver for Ingenic X2100

   - Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO

   - Support Samsung Exynos850

   - Support Renesas RZ/G2L

  Enhancements:

   - A major refactoring of the Rockchip driver, breaking part of it out
     to a separate GPIO driver in drivers/gpio

   - Pin bias support on Renesas r8a77995

   - Add SCI pins support to Ingenic JZ4755 and JZ4760

   - Mediatek device tree bindings converted to YAML"

* tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (53 commits)
  pinctrl: renesas: Add RZ/G2L pin and gpio controller driver
  pinctrl: samsung: Add Exynos850 SoC specific data
  dt-bindings: pinctrl: samsung: Add Exynos850 doc
  MAINTAINERS: Add maintainers for amd-pinctrl driver
  pinctrl: Add Intel Keem Bay pinctrl driver
  dt-bindings: pinctrl: Add bindings for Intel Keembay pinctrl driver
  pinctrl: zynqmp: Drop pinctrl_unregister for devm_ registered device
  dt-bindings: pinctrl: qcom-pmic-gpio: Remove the interrupts property
  dt-bindings: pinctrl: qcom-pmic-gpio: Convert qcom pmic gpio bindings to YAML
  dt-bindings: pinctrl: mt8195: Use real world values for drive-strength arguments
  dt-bindings: mediatek: convert pinctrl to yaml
  arm: dts: mt8183: Move pinfunc to include/dt-bindings/pinctrl
  arm: dts: mt8135: Move pinfunc to include/dt-bindings/pinctrl
  pinctrl: ingenic: Add .max_register in regmap_config
  pinctrl: ingenic: Fix bias config for X2000(E)
  pinctrl: ingenic: Fix incorrect pull up/down info
  pinctrl: Ingenic: Add pinctrl driver for X2100.
  dt-bindings: pinctrl: Add bindings for Ingenic X2100.
  pinctrl: Ingenic: Add SSI pins support for JZ4755 and JZ4760.
  pinctrl: Ingenic: Improve the code.
  ...
2021-09-02 14:22:56 -07:00
Linus Torvalds
75d6e7d9ce Nothing changed in the clk framework core this time around. We did get
some updates to the basic clk types to use determine_rate for the
 divider type and add a power of two fractional divider flag though.
 Otherwise, this is a collection of clk driver updates. More than half
 the diffstat is in the Qualcomm clk driver where we add a bunch of data
 to describe clks on various SoCs and fix bugs. The other big new thing
 in here is the Mediatek MT8192 clk driver. That's been under review for
 a while and it's nice to see that it's finally upstream.
 
 Beyond that it's the usual set of minor fixes and tweaks to clk drivers.
 There are some non-clk driver bits in here which have all been acked by
 the respective maintainers.
 
 New Drivers:
  - Support video, gpu, display clks on qcom sc7280 SoCs
  - GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
  - Multimedia clks (MMCC) on qcom MSM8994/MSM8992
  - RPMh clks on qcom SM6350 SoCs
  - Support for Mediatek MT8192 SoCs
  - Add display (DU and DSI) clocks on Renesas R-Car V3U
  - Add I2C, DMAC, USB, sound (SSIF-2), GPIO, CANFD, and ADC clocks and
    resets on Renesas RZ/G2L
 
 Updates:
  - Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators
  - Add power of two flag to fractional divider clk type
  - Migrate some clk drivers to clk_divider_ops.determine_rate
  - Migrate to clk_parent_data in gcc-sdm660
  - Fix CLKOUT clocks on i.MX8MM and i.MX8MN by using imx_clk_hw_mux2
  - Switch from .round_rate to .determine_rate in clk-divider-gate
  - Fix clock tree update for TF-A controlled clocks for all i.MX8M
  - Add missing M7 core clock for i.MX8MN
  - YAML conversion of rk3399 clock controller binding
  - Removal of GRF dependency for the rk3328/rk3036 pll types
  - Drop CLK_IS_CRITICAL flag from Tegra fuse clk
  - Make CLK_R9A06G032 Kconfig symbol invisible
  - Convert various DT bindings to YAML
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmExEooRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSXXBhAAvhHm4fcm3fRjNdfImd+jDEl8XSvg+w43
 adSnmVxbYM6ZVNOiJ4CJWHbj0hOY/PJnsQYWbV0xXvXW+zXva6p495MMHHOGSi2o
 lMgZVMvj5UAwu304ZC9Xfn31dwo8XdGrltp4JqIcI2NEBMh1/PlZW22esT+jDiWN
 3SWFD3M7lu88xTREyiEu11FY3z/KiGzbGlqYcbivx1X0sHVnBRbl4qcqZway+BmQ
 95Ma4YWwhvDGYc+ypKH2EPxs/LikHXj05nMooigy65DOQ5wrM4L1eWkwmVUf6h+e
 t4x7sAVysLnkihzdH5r2pw6CcAIom76v8w0+maSfk+jINUu1LeGVuat1eXSesFTu
 49o+uTKRghkUe/Qh6r+7lbo8AZXQq+wUsLTYRuaWT/mSb+svAtJaUWAru8tJnMlH
 oK6OehcQwz4nGhH0HnBK1jCVdtgckxPBw8F/GYN9rYhsccIe0XmFjX1rzMM3s8De
 PLl6QO7Xzd+xb/FwAU8+S1WpKFdPU6ILTUnI2Ma3Mn/gfjZEZHvWAdTjo4oZGEsw
 +N4n924ArptbeSLRrlNUtqx4BVDL5yo54xS5gefNpmD5yezO7aoUtN0aGcBq+01p
 Qw0N5hKtcdsNYLBEFSvBGcZZmErMZbPwMXHWiUwNymXBDzJKgj5d+ks+1vJ3iCNW
 R5r9hvATJPQ=
 =Rrqg
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "Nothing changed in the clk framework core this time around. We did get
  some updates to the basic clk types to use determine_rate for the
  divider type and add a power of two fractional divider flag though.

  Otherwise, this is a collection of clk driver updates. More than half
  the diffstat is in the Qualcomm clk driver where we add a bunch of
  data to describe clks on various SoCs and fix bugs. The other big new
  thing in here is the Mediatek MT8192 clk driver. That's been under
  review for a while and it's nice to see that it's finally upstream.

  Beyond that it's the usual set of minor fixes and tweaks to clk
  drivers. There are some non-clk driver bits in here which have all
  been acked by the respective maintainers.

  New Drivers:
   - Support video, gpu, display clks on qcom sc7280 SoCs
   - GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
   - Multimedia clks (MMCC) on qcom MSM8994/MSM8992
   - RPMh clks on qcom SM6350 SoCs
   - Support for Mediatek MT8192 SoCs
   - Add display (DU and DSI) clocks on Renesas R-Car V3U
   - Add I2C, DMAC, USB, sound (SSIF-2), GPIO, CANFD, and ADC clocks and
     resets on Renesas RZ/G2L

  Updates:
   - Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators
   - Add power of two flag to fractional divider clk type
   - Migrate some clk drivers to clk_divider_ops.determine_rate
   - Migrate to clk_parent_data in gcc-sdm660
   - Fix CLKOUT clocks on i.MX8MM and i.MX8MN by using imx_clk_hw_mux2
   - Switch from .round_rate to .determine_rate in clk-divider-gate
   - Fix clock tree update for TF-A controlled clocks for all i.MX8M
   - Add missing M7 core clock for i.MX8MN
   - YAML conversion of rk3399 clock controller binding
   - Removal of GRF dependency for the rk3328/rk3036 pll types
   - Drop CLK_IS_CRITICAL flag from Tegra fuse clk
   - Make CLK_R9A06G032 Kconfig symbol invisible
   - Convert various DT bindings to YAML"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (128 commits)
  dt-bindings: clock: samsung: fix header path in example
  clk: tegra: fix old-style declaration
  clk: qcom: Add SM6350 GCC driver
  MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry
  dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema
  dt-bindings: clock: samsung: convert Exynos AudSS to dtschema
  dt-bindings: clock: samsung: convert Exynos4 to dtschema
  dt-bindings: clock: samsung: convert Exynos3250 to dtschema
  dt-bindings: clock: samsung: convert Exynos542x to dtschema
  dt-bindings: clock: samsung: add bindings for Exynos external clock
  dt-bindings: clock: samsung: convert Exynos5250 to dtschema
  clk: vc5: Add properties for configuring SD/OE behavior
  clk: vc5: Use dev_err_probe
  dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin
  dt-bindings: clock: brcm,iproc-clocks: fix armpll properties
  clk: zynqmp: Fix kernel-doc format
  clk: at91: clk-generated: Limit the requested rate to our range
  clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates
  clk: zynqmp: Fix a memory leak
  clk: zynqmp: Check the return type
  ...
2021-09-02 14:17:24 -07:00
Linus Torvalds
a180eab0b5 - mtk: added support for mt8192 and mt8195
minor fix regarding address shift.
 - qcom: added compatibles for MSM8953, SM6350 and SM6115
 		enable loading IPCC as a module
 - misc: change Altera maintainer
 		fix sti kernel-doc warnings
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmEvkXIACgkQf9lkf8eY
 P5VVXg/9FItkspoh1DxiOi2KBrtpSdwMpbnjQRPoQx22efHR89KFRil1+srxdL5X
 eYEDXJV91J7jdo9JS4O6hM3uTUGVNRHYypDrSGhzmG1WDuLVM4x9EVLAe6EG026q
 3h8NRt7bxDLNGI9wjSuZyVsTt+rpAOQXpEkw3GPOhZFwE2ZRBNSqiv6fI+TI/GC9
 c8nELD1fktrEU491wLOAFiEwOQxJe5rLPexfT2gox2sg8DOpbNSz1BAjqfks5Qcl
 f4Gc8Q/AhAlghEnjpRNC44RoE7ce2KLJtrYJrClN7ToyjGbV4NMDg7vfHeZiTACh
 n/lp7oS0sX1xdKclZyZDFtYJW/FnwkkgVm7cpH48sQR0jqsrZmfyen8gnGhxxo1B
 4F+/k8tplIs1or8EqpR688+fzkUKjXDzFTESa+xj2cL8cdfmZomnyBhTdsfKVoi0
 Aqydgn907v8+l5uep0b5uj1SMRCDolgnipBjkryKkp+Y78i9AsqWWGPcCoY+VP35
 0vCU5Q+UgtINIrO5MjaEtm3fqw/xpgu4TDPIEnfOCZMLxp7wSV9e3Zqh+ppGnzMn
 sWPRI93q7YQx4hkbrFsaGGEylWmxffr3fiBDnR9f7ZV7sLMQON73+493AIeCTBND
 BkUhEwdBlLVLVcGreSO8wr4IyJ4MNvRm0vB3T7LjQXPoa7fLw0A=
 =F3Lm
 -----END PGP SIGNATURE-----

Merge tag 'mailbox-v5.15' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - mtk:
     - added support for mt8192 and mt8195
     - minor fix regarding address shift

 - qcom:
     - added compatibles for MSM8953, SM6350 and SM6115
     - enable loading IPCC as a module

 - misc:
     - change Altera maintainer
     - fix sti kernel-doc warnings

* tag 'mailbox-v5.15' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: cmdq: add multi-gce clocks support for mt8195
  mailbox: cmdq: add mediatek mailbox support for mt8195
  dt-bindings: gce: add gce header file for mt8195
  dt-bindings: mailbox: add definition for mt8195
  mailbox: qcom-apcs-ipc: Add compatible for MSM8953 SoC
  dt-bindings: mailbox: Add compatible for the MSM8953
  dt-bindings: mailbox: qcom-ipcc: Add compatible for SM6350
  mailbox: qcom: Add support for SM6115 APCS IPC
  dt-bindings: mailbox: qcom: Add SM6115 APCS compatible
  soc: mediatek: cmdq: add address shift in jump
  mailbox: cmdq: add mt8192 support
  dt-binding: gce: add gce header file for mt8192
  MAINTAINERS: Replace Ley Foon Tan as Altera Mailbox maintainer
  mailbox: qcom-ipcc: Enable loading QCOM_IPCC as a module
  mailbox: sti: quieten kernel-doc warnings
2021-09-02 14:12:24 -07:00
Linus Torvalds
9e5f3ffcf1 Devicetree updates for v5.15:
- Refactor arch kdump DT related code to a common implementation
 
 - Add fw_devlink tracking for 'phy-handle', 'leds', 'backlight',
   'resets', and 'pwm' properties
 
 - Various clean-ups to DT FDT code
 
 - Fix a runtime error for !CONFIG_SYSFS
 
 - Convert Synopsys DW PCI and derivative binding docs to schemas. Add
   Toshiba Visconti PCIe binding.
 
 - Convert a bunch of memory controller bindings to schemas
 
 - Covert eeprom-93xx46, Samsung Exynos TRNG, Samsung Exynos IRQ
   combiner, arm-charlcd, img-ascii-lcd, UniPhier eFuse, Xilinx Zynq
   MPSoC FPGA, Xilinx Zynq MPSoC reset, Mediatek mmsys, Gemini boards,
   brcm,iproc-i2c, faraday,ftpci100, and ks8851 net to DT schema.
 
 - Extend nvmem bindings to handle bit offsets in unit-addresses
 
 - Add DT schemas for HiKey 970 PCIe PHY
 
 - Remove unused ZTE, energymicro,efm32-timer, and Exynos SATA bindings
 
 - Enable dtc pci_device_reg warning by default
 
 - Fixes for handling 'unevaluatedProperties' in preparation to enable
   pending support in the tooling for jsonschema 2020-12 draft
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmEuWEsQHHJvYmhAa2Vy
 bmVsLm9yZwAKCRD6+121jbxhw+CtD/45m84GisULb7FFmlo+WY2SbzE8a+MUEXo0
 5ZZoMViSvBchphap9ueFNDdrLMUOHMsFaxHuTCUxXr4tq7EOemM7Br4OLiwiRrM5
 o2CwBvXYu+49c4UKVFMM6RCKFiXvw5NLI4Twpj4Ge8farHvt9Ecwtq+Y+RYWgFk2
 xwXWut7ZK3zBU6B+s4MRBATCFTD5oC4pAJIK3OQUlUPqZEQqdTRBKv5lyg+VUY2k
 eU0Cyzm0dZAmtjAu8ovhVNLfK1pp165QiaFIE1qh5H3ZVZAJlNyqN4jBDx9E4pLj
 BeazrsqfOkC8mZC+T7TgixhwB6D+r6/JW9NiCjYbarXibIsUOKSTKtj8XR8eZF/g
 sLeVDx33U5S+dlj1OB7scwq4Q9sG27ii2rlkvafA5KKBjoR2dzz7o9JesCV1Guha
 goPXmcd08e+KrjINxVc6gk4Y+KG8u+G7qnXnnmSatESJKxiDu1OgU3L16mlTJFaM
 hBmrh5rx1y8EkQnzgceTZIIWh30poSQKKyDB6Ta4Dude5JE+rS30oVURDR7MIrav
 rY70OYOiSq/nCcC7bc0Yu0UxJi+bwH28WvsD0aeCUOBTFsnI4j2uvsPsh3Aq74O0
 UbQmUCMxhpmsDVdIOqlS1IVH8M79I+BrDTPVP6EE96ttoj9FbSi6AgjeGJzVMC99
 EhtWe+gKTQ==
 =28CD
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:

 - Refactor arch kdump DT related code to a common implementation

 - Add fw_devlink tracking for 'phy-handle', 'leds', 'backlight',
   'resets', and 'pwm' properties

 - Various clean-ups to DT FDT code

 - Fix a runtime error for !CONFIG_SYSFS

 - Convert Synopsys DW PCI and derivative binding docs to schemas. Add
   Toshiba Visconti PCIe binding.

 - Convert a bunch of memory controller bindings to schemas

 - Covert eeprom-93xx46, Samsung Exynos TRNG, Samsung Exynos IRQ
   combiner, arm-charlcd, img-ascii-lcd, UniPhier eFuse, Xilinx Zynq
   MPSoC FPGA, Xilinx Zynq MPSoC reset, Mediatek mmsys, Gemini boards,
   brcm,iproc-i2c, faraday,ftpci100, and ks8851 net to DT schema.

 - Extend nvmem bindings to handle bit offsets in unit-addresses

 - Add DT schemas for HiKey 970 PCIe PHY

 - Remove unused ZTE, energymicro,efm32-timer, and Exynos SATA bindings

 - Enable dtc pci_device_reg warning by default

 - Fixes for handling 'unevaluatedProperties' in preparation to enable
   pending support in the tooling for jsonschema 2020-12 draft

* tag 'devicetree-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits)
  dt-bindings: display: remove zte,vou.txt binding doc
  dt-bindings: hwmon: merge max1619 into trivial devices
  dt-bindings: mtd-physmap: Add 'arm,vexpress-flash' compatible
  dt-bindings: PCI: imx6: convert the imx pcie controller to dtschema
  dt-bindings: Use 'enum' instead of 'oneOf' plus 'const' entries
  dt-bindings: Add vendor prefix for Topic Embedded Systems
  of: fdt: Rename reserve_elfcorehdr() to fdt_reserve_elfcorehdr()
  arm64: kdump: Remove custom linux,usable-memory-range handling
  arm64: kdump: Remove custom linux,elfcorehdr handling
  riscv: Remove non-standard linux,elfcorehdr handling
  of: fdt: Use IS_ENABLED(CONFIG_BLK_DEV_INITRD) instead of #ifdef
  of: fdt: Add generic support for handling usable memory range property
  of: fdt: Add generic support for handling elf core headers property
  crash_dump: Make elfcorehdr address/size symbols always visible
  dt-bindings: memory: convert Samsung Exynos DMC to dtschema
  dt-bindings: devfreq: event: convert Samsung Exynos PPMU to dtschema
  dt-bindings: devfreq: event: convert Samsung Exynos NoCP to dtschema
  kbuild: Enable dtc 'pci_device_reg' warning by default
  dt-bindings: soc: remove obsolete zte zx header
  dt-bindings: clock: remove obsolete zte zx header
  ...
2021-09-01 18:34:51 -07:00
Linus Torvalds
7c636d4d20 ARM: SoC DT changes for 5.15
As usual, the bulk of work in the SoC tree goes into DT files,
 this time with a roughly even split between 32-bit and 64-bit
 SoCs rather than the usual mostly 64-bit changes.
 
 New SoCs:
 
  - Microchip SAMA7 SoC family based on Cortex-A7, a new
    32-bit platform based on the older SAMA5 series.
 
  - Qualcomm Snapdragon SDM636 and SM8150, variations of the
    existing phone SoCs.
 
  - Renesas R-Car H3e-2G and M3e-2G SoCs, variations of
    older Renesas SoCs.
 
 New boards:
 
  - Marvell CN913x reference boards
 
  - ASpeed AST2600 BMC implementations for Facebook Cloudripper,
    Elbert and Fuji server boards.
 
  - Snapdragon 665 based Sony Xperia 10II
 
  - Snapdragon MSM8916 based Xiaomi Redmi 2
 
  - Snapdragon MSM8226 based Samsung Galaxy S3 Neo
 
  - NXP i.MX based 32-bit boards:
    - DHCOM based PicoITX
    - DHSOM based DRC0ỉ
    - SolidRun SolidSense
    - SKOV i.MX6 boards.
 
  - NXP i.MX based 64-bit boards:
    - Nitrogen8 SoM and MNT Reform2
    - LS1088A based Traverse Ten64
    - i.MX8M based GW7902.
 
  - NVIDIA Jetson TX2 NX Developer Kit
 
  - 4KOpen STiH418-b2264 development board
 
  - ux500 based Samsung phones: Gavini, Codina and Kyle
 
  - TI AM335x based Sancloud BBE Lite
 
  - ixp4xx dts files to replace all old board files
 
 Other changes:
 
  - Treewide fixes for dtc warnings
 
  - Rockchips i/o domain support
 
  - TI OMAP/AM3 CPSW switch driver support
 
  - Improved device support for allwinner, aspeed, qualcomm, NXP,
    nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti,
    OMAP and actions.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iD8DBQBhL13Z5t5GS2LDRf4RAljwAJ0acTxOBYP8J5zETlAQRWYcYWh5hACfZOgC
 Om6K0IN5+lJuaUyF/GdmqS4=
 =zXua
 -----END PGP SIGNATURE-----

Merge tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "As usual, the bulk of work in the SoC tree goes into DT files, this
  time with a roughly even split between 32-bit and 64-bit SoCs rather
  than the usual mostly 64-bit changes.

  New SoCs:

   - Microchip SAMA7 SoC family based on Cortex-A7, a new 32-bit
     platform based on the older SAMA5 series.

   - Qualcomm Snapdragon SDM636 and SM8150, variations of the existing
     phone SoCs.

   - Renesas R-Car H3e-2G and M3e-2G SoCs, variations of older Renesas
     SoCs.

  New boards:

   - Marvell CN913x reference boards

   - ASpeed AST2600 BMC implementations for Facebook Cloudripper, Elbert
     and Fuji server boards.

   - Snapdragon 665 based Sony Xperia 10II

   - Snapdragon MSM8916 based Xiaomi Redmi 2

   - Snapdragon MSM8226 based Samsung Galaxy S3 Neo

   - NXP i.MX based 32-bit boards:
       - DHCOM based PicoITX
       - DHSOM based DRC0ỉ
       - SolidRun SolidSense
       - SKOV i.MX6 boards.

   - NXP i.MX based 64-bit boards:
       - Nitrogen8 SoM and MNT Reform2
       - LS1088A based Traverse Ten64
       - i.MX8M based GW7902.

   - NVIDIA Jetson TX2 NX Developer Kit

   - 4KOpen STiH418-b2264 development board

   - ux500 based Samsung phones: Gavini, Codina and Kyle

   - TI AM335x based Sancloud BBE Lite

   - ixp4xx dts files to replace all old board files

  Other changes:

   - Treewide fixes for dtc warnings

   - Rockchips i/o domain support

   - TI OMAP/AM3 CPSW switch driver support

   - Improved device support for allwinner, aspeed, qualcomm, NXP,
     nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti,
     OMAP and actions"

* tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (412 commits)
  arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings
  ARM: dts: rockchip: Add SFC to RV1108
  arm64: dts: marvell: armada-37xx: Extend PCIe MEM space
  ARM: dts: aspeed: p10bmc: Add power control pins
  ARM: dts: aspeed: cloudripper: Add comments for "mdio1"
  ARM: dts: aspeed: minipack: Update flash partition table
  dt-bindings: arm: fsl: Add Traverse Ten64 (LS1088A) board
  dt-bindings: vendor-prefixes: add Traverse Technologies
  arm64: dts: add device tree for Traverse Ten64 (LS1088A)
  arm64: dts: ls1088a: add missing PMU node
  arm64: dts: ls1088a: add internal PCS for DPMAC1 node
  ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz
  ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node
  ARM: dts: add SKOV imx6q and imx6dl based boards
  dt-bindings: arm: fsl: add SKOV imx6q and imx6dl based boards
  dt-bindings: vendor-prefixes: Add an entry for SKOV A/S
  arm64: dts: imx8mq-reform2: add sound support
  arm64: dts: imx8m: drop interrupt-affinity for pmu
  arm64: dts: imx8qxp: update pmu compatible
  arm64: dts: imx8mm: update pmu compatible
  ...
2021-09-01 15:39:09 -07:00
Stephen Boyd
47505bf3a8 Merge branches 'clk-kirkwood', 'clk-imx', 'clk-doc', 'clk-zynq' and 'clk-ralink' into clk-next
* clk-kirkwood:
  clk: kirkwood: Fix a clocking boot regression

* clk-imx:
  clk: imx8mn: Add M7 core clock
  clk: imx8m: fix clock tree update of TF-A managed clocks
  clk: imx: clk-divider-gate: Switch to clk_divider.determine_rate
  clk: imx8mn: use correct mux type for clkout path
  clk: imx8mm: use correct mux type for clkout path

* clk-doc:
  dt-bindings: clock: samsung: fix header path in example
  MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry
  dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema
  dt-bindings: clock: samsung: convert Exynos AudSS to dtschema
  dt-bindings: clock: samsung: convert Exynos4 to dtschema
  dt-bindings: clock: samsung: convert Exynos3250 to dtschema
  dt-bindings: clock: samsung: convert Exynos542x to dtschema
  dt-bindings: clock: samsung: add bindings for Exynos external clock
  dt-bindings: clock: samsung: convert Exynos5250 to dtschema
  dt-bindings: clock: brcm,iproc-clocks: fix armpll properties
  clk: zynqmp: Fix kernel-doc format
  clk: at91: sama7g5: remove all kernel-doc & kernel-doc warnings
  clk: zynqmp: fix kernel doc

* clk-zynq:
  clk: zynqmp: Fix a memory leak
  clk: zynqmp: Check the return type

* clk-ralink:
  clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates
2021-09-01 15:27:07 -07:00
Stephen Boyd
8fb59ce15c Merge branches 'clk-nvidia', 'clk-rockchip', 'clk-at91' and 'clk-vc5' into clk-next
- Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators

* clk-nvidia:
  clk: tegra: fix old-style declaration
  clk: tegra: Remove CLK_IS_CRITICAL flag from fuse clock
  soc/tegra: fuse: Enable fuse clock on suspend for Tegra124
  soc/tegra: fuse: Add runtime PM support
  soc/tegra: fuse: Clear fuse->clk on driver probe failure
  soc/tegra: pmc: Prevent racing with cpuilde driver
  soc/tegra: bpmp: Remove unused including <linux/version.h>

* clk-rockchip:
  clk: rockchip: make rk3308 ddrphy4x clock critical
  clk: rockchip: drop GRF dependency for rk3328/rk3036 pll types
  dt-bindings: clk: Convert rockchip,rk3399-cru to DT schema
  clk: rockchip: Add support for hclk_sfc on rk3036
  clk: rockchip: rk3036: fix up the sclk_sfc parent error
  clk: rockchip: add dt-binding clkid for hclk_sfc on rk3036

* clk-at91:
  clk: at91: clk-generated: Limit the requested rate to our range

* clk-vc5:
  clk: vc5: Add properties for configuring SD/OE behavior
  clk: vc5: Use dev_err_probe
  dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin
2021-09-01 15:26:58 -07:00
Linus Torvalds
866147b8fa ARM: SoC drivers for 5.15
These are updates for drivers that are tied to a particular SoC,
 including the correspondig device tree bindings:
 
  - A couple of reset controller changes for unisoc, uniphier, renesas
    and zte platforms
 
  - memory controller driver fixes for omap and tegra
 
  - Rockchip io domain driver updates
 
  - Lots of updates for qualcomm platforms, mostly touching their
    firmware and power management drivers
 
  - Tegra FUSE and firmware driver updateѕ
 
  - Support for virtio transports in the SCMI firmware framework
 
  - cleanup of ixp4xx drivers, towards enabling multiplatform
    support and bringing it up to date with modern platforms
 
  - Minor updates for keystone, mediatek, omap, renesas.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iD8DBQBhLz215t5GS2LDRf4RAjlHAJ473D0PymaTzv68EuPHThG+DEPifQCdGjLq
 QGBB6JidIP8rtEdC+LWBB8I=
 =M5+N
 -----END PGP SIGNATURE-----

Merge tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "These are updates for drivers that are tied to a particular SoC,
  including the correspondig device tree bindings:

   - A couple of reset controller changes for unisoc, uniphier, renesas
     and zte platforms

   - memory controller driver fixes for omap and tegra

   - Rockchip io domain driver updates

   - Lots of updates for qualcomm platforms, mostly touching their
     firmware and power management drivers

   - Tegra FUSE and firmware driver updateѕ

   - Support for virtio transports in the SCMI firmware framework

   - cleanup of ixp4xx drivers, towards enabling multiplatform support
     and bringing it up to date with modern platforms

   - Minor updates for keystone, mediatek, omap, renesas"

* tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
  reset: simple: remove ZTE details in Kconfig help
  soc: rockchip: io-domain: Remove unneeded semicolon
  soc: rockchip: io-domain: add rk3568 support
  dt-bindings: power: add rk3568-pmu-io-domain support
  bus: ixp4xx: return on error in ixp4xx_exp_probe()
  soc: renesas: Prefer memcpy() over strcpy()
  firmware: tegra: Stop using seq_get_buf()
  soc/tegra: fuse: Enable fuse clock on suspend for Tegra124
  soc/tegra: fuse: Add runtime PM support
  soc/tegra: fuse: Clear fuse->clk on driver probe failure
  soc/tegra: pmc: Prevent racing with cpuilde driver
  soc/tegra: bpmp: Remove unused including <linux/version.h>
  dt-bindings: soc: ti: pruss: Add dma-coherent property
  soc: ti: Remove pm_runtime_irq_safe() usage for smartreflex
  soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM64x SoCs
  dt-bindings: soc: ti: pruss: Update bindings for K3 AM64x SoCs
  firmware: arm_scmi: Use WARN_ON() to check configured transports
  firmware: arm_scmi: Fix boolconv.cocci warnings
  soc: mediatek: mmsys: Fix missing UFOE component in mt8173 table routing
  soc: mediatek: mmsys: add MT8365 support
  ...
2021-09-01 15:25:28 -07:00
Stephen Boyd
7110569a09 Merge branches 'clk-renesas', 'clk-cleanup' and 'clk-determine-divider' into clk-next
- Migrate some clk drivers to clk_divider_ops.determine_rate

* clk-renesas:
  clk: renesas: Make CLK_R9A06G032 invisible
  clk: renesas: r9a07g044: Add entry for fixed clock P0_DIV2
  dt-bindings: clock: r9a07g044-cpg: Add entry for P0_DIV2 core clock
  clk: renesas: r9a07g044: Add clock and reset entries for ADC
  clk: renesas: r9a07g044: Add clock and reset entries for CANFD
  clk: renesas: Rename renesas-rzg2l-cpg.[ch] to rzg2l-cpg.[ch]
  clk: renesas: r9a07g044: Add GPIO clock and reset entries
  clk: renesas: r9a07g044: Add SSIF-2 clock and reset entries
  clk: renesas: r9a07g044: Add USB clocks/resets
  clk: renesas: r9a07g044: Add DMAC clocks/resets
  clk: renesas: r9a07g044: Add I2C clocks/resets
  clk: renesas: r8a779a0: Add the DSI clocks
  clk: renesas: r8a779a0: Add the DU clock
  clk: renesas: rzg2: Rename i2c-dvfs to iic-pmic
  clk: renesas: rzg2l: Fix off-by-one check in rzg2l_cpg_clk_src_twocell_get()
  clk: renesas: rzg2l: Avoid mixing error pointers and NULL
  clk: renesas: rzg2l: Fix a double free on error
  clk: renesas: rzg2l: Fix return value and unused assignment
  clk: renesas: rzg2l: Remove unneeded semicolon

* clk-cleanup:
  clk: palmas: Add a missing SPDX license header
  clk: Align provider-specific CLK_* bit definitions

* clk-determine-divider:
  clk: stm32mp1: Switch to clk_divider.determine_rate
  clk: stm32h7: Switch to clk_divider.determine_rate
  clk: stm32f4: Switch to clk_divider.determine_rate
  clk: bcm2835: Switch to clk_divider.determine_rate
  clk: divider: Implement and wire up .determine_rate by default
2021-09-01 15:25:15 -07:00
Stephen Boyd
4990d8c133 Merge branches 'clk-qcom', 'clk-socfpga', 'clk-mediatek', 'clk-lmk' and 'clk-x86' into clk-next
- Support video, gpu, display clks on qcom sc7280 SoCs
 - GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
 - Multimedia clks (MMCC) on qcom MSM8994/MSM8992
 - Migrate to clk_parent_data in gcc-sdm660
 - RPMh clks on qcom SM6350 SoCs
 - Support for Mediatek MT8192 SoCs

* clk-qcom: (38 commits)
  clk: qcom: Add SM6350 GCC driver
  dt-bindings: clock: Add SM6350 GCC clock bindings
  clk: qcom: rpmh: Add support for RPMH clocks on SM6350
  dt-bindings: clock: Add RPMHCC bindings for SM6350
  clk: qcom: adjust selects for SM_VIDEOCC_8150 and SM_VIDEOCC_8250
  clk: qcom: Add Global Clock controller (GCC) driver for SM6115
  dt-bindings: clk: qcom: gcc-sm6115: Document SM6115 GCC
  clk: qcom: mmcc-msm8994: Add MSM8992 support
  clk: qcom: Add msm8994 MMCC driver
  dt-bindings: clock: Add support for MSM8992/4 MMCC
  clk: qcom: Add Global Clock Controller driver for MSM8953
  dt-bindings: clock: add Qualcomm MSM8953 GCC driver bindings
  clk: qcom: gcc-sdm660: Replace usage of parent_names
  clk: qcom: gcc-sdm660: Move parent tables after PLLs
  clk: qcom: use devm_pm_runtime_enable and devm_pm_clk_create
  PM: runtime: add devm_pm_clk_create helper
  PM: runtime: add devm_pm_runtime_enable helper
  clk: qcom: a53-pll: Add MSM8939 a53pll support
  dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support
  clk: qcom: a53pll/mux: Use unique clock name
  ...

* clk-socfpga:
  clk: socfpga: agilex: add the bypass register for s2f_usr0 clock
  clk: socfpga: agilex: fix up s2f_user0_clk representation
  clk: socfpga: agilex: fix the parents of the psi_ref_clk

* clk-mediatek: (22 commits)
  clk: mediatek: make COMMON_CLK_MT8167* depend on COMMON_CLK_MT8167
  clk: mediatek: Add MT8192 vencsys clock support
  clk: mediatek: Add MT8192 vdecsys clock support
  clk: mediatek: Add MT8192 scp adsp clock support
  clk: mediatek: Add MT8192 msdc clock support
  clk: mediatek: Add MT8192 mmsys clock support
  clk: mediatek: Add MT8192 mfgcfg clock support
  clk: mediatek: Add MT8192 mdpsys clock support
  clk: mediatek: Add MT8192 ipesys clock support
  clk: mediatek: Add MT8192 imp i2c wrapper clock support
  clk: mediatek: Add MT8192 imgsys clock support
  clk: mediatek: Add MT8192 camsys clock support
  clk: mediatek: Add MT8192 audio clock support
  clk: mediatek: Add MT8192 basic clocks support
  clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers
  clk: mediatek: Add configurable enable control to mtk_pll_data
  clk: mediatek: Fix asymmetrical PLL enable and disable control
  clk: mediatek: Get regmap without syscon compatible check
  clk: mediatek: Add dt-bindings of MT8192 clocks
  dt-bindings: ARM: Mediatek: Add audsys document binding for MT8192
  ...

* clk-lmk:
  clk: lmk04832: drop redundant fallthrough statements

* clk-x86:
  clk: x86: Rename clk-lpt to more specific clk-lpss-atom
2021-09-01 15:24:59 -07:00
Linus Torvalds
477f70cd2a drm for v5.15-rc1
core:
 - extract i915 eDP backlight into core
 - DP aux bus support
 - drm_device.irq_enabled removed
 - port drivers to native irq interfaces
 - export gem shadow plane handling for vgem
 - print proper driver name in framebuffer registration
 - driver fixes for implicit fencing rules
 - ARM fixed rate compression modifier added
 - updated fb damage handling
 - rmfb ioctl logging/docs
 - drop drm_gem_object_put_locked
 - define DRM_FORMAT_MAX_PLANES
 - add gem fb vmap/vunmap helpers
 - add lockdep_assert(once) helpers
 - mark drm irq midlayer as legacy
 - use offset adjusted bo mapping conversion
 
 vgaarb:
 - cleanups
 
 fbdev:
 - extend efifb handling to all arches
 - div by 0 fixes for multiple drivers
 
 udmabuf:
 - add hugepage mapping support
 
 dma-buf:
 - non-dynamic exporter fixups
 - document implicit fencing rules
 
 amdgpu:
 - Initial Cyan Skillfish support
 - switch virtual DCE over to vkms based atomic
 - VCN/JPEG power down fixes
 - NAVI PCIE link handling fixes
 - AMD HDMI freesync fixes
 - Yellow Carp + Beige Goby fixes
 - Clockgating/S0ix/SMU/EEPROM fixes
 - embed hw fence in job
 - rework dma-resv handling
 - ensure eviction to system ram
 
 amdkfd:
 - uapi: SVM address range query added
 - sysfs leak fix
 - GPUVM TLB optimizations
 - vmfault/migration counters
 
 i915:
 - Enable JSL and EHL by default
 - preliminary XeHP/DG2 support
 - remove all CNL support (never shipped)
 - move to TTM for discrete memory support
 - allow mixed object mmap handling
 - GEM uAPI spring cleaning
   - add I915_MMAP_OBJECT_FIXED
   - reinstate ADL-P mmap ioctls
   - drop a bunch of unused by userspace features
   - disable and remove GPU relocations
 - revert some i915 misfeatures
 - major refactoring of GuC for Gen11+
 - execbuffer object locking separate step
 - reject caching/set-domain on discrete
 - Enable pipe DMC loading on XE-LPD and ADL-P
 - add PSF GV point support
 - Refactor and fix DDI buffer translations
 - Clean up FBC CFB allocation code
 - Finish INTEL_GEN() and friends macro conversions
 
 nouveau:
 - add eDP backlight support
 - implicit fence fix
 
 msm:
 - a680/7c3 support
 - drm/scheduler conversion
 
 panfrost:
 - rework GPU reset
 
 virtio:
 - fix fencing for planes
 
 ast:
 - add detect support
 
 bochs:
 - move to tiny GPU driver
 
 vc4:
 - use hotplug irqs
 - HDMI codec support
 
 vmwgfx:
 - use internal vmware device headers
 
 ingenic:
 - demidlayering irq
 
 rcar-du:
 - shutdown fixes
 - convert to bridge connector helpers
 
 zynqmp-dsub:
 - misc fixes
 
 mgag200:
 - convert PLL handling to atomic
 
 mediatek:
 - MT8133 AAL support
 - gem mmap object support
 - MT8167 support
 
 etnaviv:
 - NXP Layerscape LS1028A SoC support
 - GEM mmap cleanups
 
 tegra:
 - new user API
 
 exynos:
 - missing unlock fix
 - build warning fix
 - use refcount_t
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEEKbZHaGwW9KfbeusDHTzWXnEhr4FAmEtvn8ACgkQDHTzWXnE
 hr7aqw//WfcIyGdPLjAz59cW8jm+FgihD5colHtOUYRHRO4GeX/bNNufquR8+N3y
 HESsyZdpihFHms/wURMq41ibmHg0EuHA01HZzjZuGBesG4F9I8sP/HnDOxDuYuAx
 N7Lg4PlUNlfFHmw7Y84owQ6s/XWmNp5iZ8e/mTK5hcraJFQKS4QO74n9RbG/F1vC
 Hc3P6AnpqGac2AEGXt0NjIRxVVCTUIBGx+XOhj+1AMyAGzt9VcO1DS9PVCS0zsEy
 zKMj9tZAPNg0wYsXAi4kA1lK7uVY8KoXSVDYLpsI5Or2/e7mfq2b4EWrezbtp6UA
 H+w86axuwJq7NaYHYH6HqyrLTOmvcHgIl2LoZN91KaNt61xfJT3XZkyQoYViGIrJ
 oZy6X/+s+WPoW98bHZrr6vbcxtWKfEeQyUFEAaDMmraKNJwROjtwgFC9DP8MDctq
 PUSM+XkwbGRRxQfv9dNKufeWfV5blVfzEJO8EfTU1YET3WTDaUHe/FoIcLZt2DZG
 JAJgZkIlU8egthPdakUjQz/KoyLMyovcN5zcjgzgjA9PyNEq74uElN9l446kSSxu
 jEVErOdd+aG3Zzk7/ZZL/RmpNQpPfpQ2RaPUkgeUsW01myNzUNuU3KUDaSlVa+Oi
 1n7eKoaQ2to/+LjhYApVriri4hIZckNNn5FnnhkgwGi8mpHQIVQ=
 =vZkA
 -----END PGP SIGNATURE-----

Merge tag 'drm-next-2021-08-31-1' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Dave Airlie:
 "Highlights:

   - i915 has seen a lot of refactoring and uAPI cleanups due to a
     change in the upstream direction going forward

     This has all been audited with known userspace, but there may be
     some pitfalls that were missed.

   - i915 now uses common TTM to enable discrete memory on DG1/2 GPUs

   - i915 enables Jasper and Elkhart Lake by default and has preliminary
     XeHP/DG2 support

   - amdgpu adds support for Cyan Skillfish

   - lots of implicit fencing rules documented and fixed up in drivers

   - msm now uses the core scheduler

   - the irq midlayer has been removed for non-legacy drivers

   - the sysfb code now works on more than x86.

  Otherwise the usual smattering of stuff everywhere, panels, bridges,
  refactorings.

  Detailed summary:

  core:
   - extract i915 eDP backlight into core
   - DP aux bus support
   - drm_device.irq_enabled removed
   - port drivers to native irq interfaces
   - export gem shadow plane handling for vgem
   - print proper driver name in framebuffer registration
   - driver fixes for implicit fencing rules
   - ARM fixed rate compression modifier added
   - updated fb damage handling
   - rmfb ioctl logging/docs
   - drop drm_gem_object_put_locked
   - define DRM_FORMAT_MAX_PLANES
   - add gem fb vmap/vunmap helpers
   - add lockdep_assert(once) helpers
   - mark drm irq midlayer as legacy
   - use offset adjusted bo mapping conversion

  vgaarb:
   - cleanups

  fbdev:
   - extend efifb handling to all arches
   - div by 0 fixes for multiple drivers

  udmabuf:
   - add hugepage mapping support

  dma-buf:
   - non-dynamic exporter fixups
   - document implicit fencing rules

  amdgpu:
   - Initial Cyan Skillfish support
   - switch virtual DCE over to vkms based atomic
   - VCN/JPEG power down fixes
   - NAVI PCIE link handling fixes
   - AMD HDMI freesync fixes
   - Yellow Carp + Beige Goby fixes
   - Clockgating/S0ix/SMU/EEPROM fixes
   - embed hw fence in job
   - rework dma-resv handling
   - ensure eviction to system ram

  amdkfd:
   - uapi: SVM address range query added
   - sysfs leak fix
   - GPUVM TLB optimizations
   - vmfault/migration counters

  i915:
   - Enable JSL and EHL by default
   - preliminary XeHP/DG2 support
   - remove all CNL support (never shipped)
   - move to TTM for discrete memory support
   - allow mixed object mmap handling
   - GEM uAPI spring cleaning
       - add I915_MMAP_OBJECT_FIXED
       - reinstate ADL-P mmap ioctls
       - drop a bunch of unused by userspace features
       - disable and remove GPU relocations
   - revert some i915 misfeatures
   - major refactoring of GuC for Gen11+
   - execbuffer object locking separate step
   - reject caching/set-domain on discrete
   - Enable pipe DMC loading on XE-LPD and ADL-P
   - add PSF GV point support
   - Refactor and fix DDI buffer translations
   - Clean up FBC CFB allocation code
   - Finish INTEL_GEN() and friends macro conversions

  nouveau:
   - add eDP backlight support
   - implicit fence fix

  msm:
   - a680/7c3 support
   - drm/scheduler conversion

  panfrost:
   - rework GPU reset

  virtio:
   - fix fencing for planes

  ast:
   - add detect support

  bochs:
   - move to tiny GPU driver

  vc4:
   - use hotplug irqs
   - HDMI codec support

  vmwgfx:
   - use internal vmware device headers

  ingenic:
   - demidlayering irq

  rcar-du:
   - shutdown fixes
   - convert to bridge connector helpers

  zynqmp-dsub:
   - misc fixes

  mgag200:
   - convert PLL handling to atomic

  mediatek:
   - MT8133 AAL support
   - gem mmap object support
   - MT8167 support

  etnaviv:
   - NXP Layerscape LS1028A SoC support
   - GEM mmap cleanups

  tegra:
   - new user API

  exynos:
   - missing unlock fix
   - build warning fix
   - use refcount_t"

* tag 'drm-next-2021-08-31-1' of git://anongit.freedesktop.org/drm/drm: (1318 commits)
  drm/amd/display: Move AllowDRAMSelfRefreshOrDRAMClockChangeInVblank to bounding box
  drm/amd/display: Remove duplicate dml init
  drm/amd/display: Update bounding box states (v2)
  drm/amd/display: Update number of DCN3 clock states
  drm/amdgpu: disable GFX CGCG in aldebaran
  drm/amdgpu: Clear RAS interrupt status on aldebaran
  drm/amdgpu: Add support for RAS XGMI err query
  drm/amdkfd: Account for SH/SE count when setting up cu masks.
  drm/amdgpu: rename amdgpu_bo_get_preferred_pin_domain
  drm/amdgpu: drop redundant cancel_delayed_work_sync call
  drm/amdgpu: add missing cleanups for more ASICs on UVD/VCE suspend
  drm/amdgpu: add missing cleanups for Polaris12 UVD/VCE on suspend
  drm/amdkfd: map SVM range with correct access permission
  drm/amdkfd: check access permisson to restore retry fault
  drm/amdgpu: Update RAS XGMI Error Query
  drm/amdgpu: Add driver infrastructure for MCA RAS
  drm/amd/display: Add Logging for HDMI color depth information
  drm/amd/amdgpu: consolidate PSP TA init shared buf functions
  drm/amd/amdgpu: add name field back to ras_common_if
  drm/amdgpu: Fix build with missing pm_suspend_target_state module export
  ...
2021-09-01 11:26:46 -07:00
Linus Torvalds
ebf435d3b5 IIO / Staging driver update for 5.15-rc1
Here is the big set of staging and IIO driver updates for 5.15-rc1.
 Also included in here are the counter driver subsystem updates as the
 IIO drivers needed them.
 
 Lots of churn in some staging drivers, we dropped the "old" rtl8188eu
 driver and replaced it with a newer version of the driver that had been
 maintained out-of-tree by Larry with the end goal of actually being able
 to get this driver out of staging eventually.  Despite that driver being
 "newer" the line count of this pull request is going up.
 
 Some drivers moved out of staging as well, which is always nice to see,
 that is why there are additions to the mfc and misc driver subsystems.
 All of these were acked by the various subsystem maintainers involved.
 
 But by far, as normal, it's coding style cleanups all over the
 drivers/staging/ tree in here.
 
 Full details of these changes are in the shortlog.
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYS+BKg8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+yku5gCgyMykJ2mwtEiQxfAWu13e2iZX29AAnjk38ANp
 Un2sQXYnL9RVlcnjLg+X
 =jMWL
 -----END PGP SIGNATURE-----

Merge tag 'staging-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull IIO and staging driver updates from Greg KH:
 "Here is the big set of staging and IIO driver updates for 5.15-rc1.
  Also included in here are the counter driver subsystem updates as the
  IIO drivers needed them.

  Lots of churn in some staging drivers, we dropped the "old" rtl8188eu
  driver and replaced it with a newer version of the driver that had
  been maintained out-of-tree by Larry with the end goal of actually
  being able to get this driver out of staging eventually. Despite that
  driver being "newer" the line count of this pull request is going up.

  Some drivers moved out of staging as well, which is always nice to
  see, that is why there are additions to the mfc and misc driver
  subsystems. All of these were acked by the various subsystem
  maintainers involved.

  But by far, as normal, it's coding style cleanups all over the
  drivers/staging/ tree in here.

  Full details of these changes are in the shortlog.

  All of these have been in linux-next for a while with no reported
  problems"

[ Note: the r8188eu merge clashed with commit 89939e8906 ("staging:
  rtlwifi: use siocdevprivate") from the networking tree. When resolving
  the issue, I noted that the whole r8188eu rtw_android code is dead
  since commit ae7471cae0 ("staging: r8188eu: remove rtw_ioctl
  function").

  End result: the merge resolution was to throw all of that away,
  rather than do the mindless fixup to code that isn't actually
  reachable                                               - Linus ]

* tag 'staging-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (551 commits)
  staging: vt6655: Remove filenames in files
  staging: r8188eu: add extra TODO entries
  staging: vt6656: Remove filenames in files
  staging: wlan-ng: fix invalid assignment warning
  staging: r8188eu: rename fields of struct rtl_ps
  staging: r8188eu: remove ODM_DynamicPrimaryCCA_DupRTS()
  staging: r8188eu: rename fields of struct dyn_primary_cca
  staging: r8188eu: rename struct field Wifi_Error_Status
  staging: r8188eu: Provide a TODO file for this driver
  staging: r8188eu: remove unneeded variable
  staging: r8188eu: remove unneeded conversions to bool
  staging: r8188eu: remove {read,write}_macreg
  staging: r8188eu: core: remove condition with no effect
  staging: r8188eu: remove ethernet.h header file
  staging: r8188eu: remove ip.h header file
  staging: r8188eu: remove if_ether.h header file
  staging: r8188eu: make rtw_deinit_intf_priv return void
  staging: r8188eu: use is_multicast_ether_addr in os_dep/recv_linux.c
  staging: r8188eu: use is_multicast_ether_addr in hal/rtl8188eu_xmit.c
  staging: r8188eu: use is_multicast_ether_addr in core/rtw_xmit.c
  ...
2021-09-01 09:45:57 -07:00
Linus Torvalds
ba1dc7f273 Char / Misc driver changes for 5.15-rc1
Here is the big set of char/misc driver changes for 5.15-rc1.
 
 Lots of different driver subsystems are being updated in here, notably:
 	- mhi subsystem update
 	- fpga subsystem update
 	- coresight/hwtracing subsystem update
 	- interconnect subsystem update
 	- nvmem subsystem update
 	- parport drivers update
 	- phy subsystem update
 	- soundwire subsystem update
 and there are some other char/misc drivers being updated as well:
 	- binder driver additions
 	- new misc drivers
 	- lkdtm driver updates
 	- mei driver updates
 	- sram driver updates
 	- other minor driver updates.
 
 Note, there are no habanna labs driver updates in this pull request,
 that will probably come later before -rc1 is out in a different request.
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYS+Kyw8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ymlpACg0JM+hSeo8T5GtwZksZ1QXXQfh8sAoK6Dt6xF
 e62OQuuMFT0Un0qOflZk
 =emH+
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char / misc driver updates from Greg KH:
 "Here is the big set of char/misc driver changes for 5.15-rc1.

  Lots of different driver subsystems are being updated in here,
  notably:

   - mhi subsystem update

   - fpga subsystem update

   - coresight/hwtracing subsystem update

   - interconnect subsystem update

   - nvmem subsystem update

   - parport drivers update

   - phy subsystem update

   - soundwire subsystem update

  and there are some other char/misc drivers being updated as well:

   - binder driver additions

   - new misc drivers

   - lkdtm driver updates

   - mei driver updates

   - sram driver updates

   - other minor driver updates.

  Note, there are no habanalabs driver updates in this pull request,
  that will probably come later before -rc1 is out in a different
  request.

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (169 commits)
  Revert "bus: mhi: Add inbound buffers allocation flag"
  misc/pvpanic: fix set driver data
  VMCI: fix NULL pointer dereference when unmapping queue pair
  char: mware: fix returnvar.cocci warnings
  parport: remove non-zero check on count
  soundwire: cadence: do not extend reset delay
  soundwire: intel: conditionally exit clock stop mode on system suspend
  soundwire: intel: skip suspend/resume/wake when link was not started
  soundwire: intel: fix potential race condition during power down
  phy: qcom-qmp: Add support for SM6115 UFS phy
  dt-bindings: phy: qcom,qmp: Add SM6115 UFS PHY bindings
  phy: qmp: Provide unique clock names for DP clocks
  lkdtm: remove IDE_CORE_CP crashpoint
  lkdtm: replace SCSI_DISPATCH_CMD with SCSI_QUEUE_RQ
  coresight: Replace deprecated CPU-hotplug functions.
  Documentation: coresight: Add documentation for CoreSight config
  coresight: syscfg: Add initial configfs support
  coresight: config: Add preloaded configurations
  coresight: etm4x: Add complex configuration handlers to etmv4
  coresight: etm-perf: Update to activate selected configuration
  ...
2021-09-01 08:35:06 -07:00
jason-jh.lin
704446b935 dt-bindings: gce: add gce header file for mt8195
Add gce header file to define the gce subsys id,
hardware event id and constant for mt8195.

Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-31 22:57:33 -05:00
Linus Torvalds
8596e589b7 Updates for timekeeping, timers and related drivers:
Core code:
 
   - Cure a couple of incorrectness issues in the posix CPU timer code to
     prevent that the tick dependency for NOHZ full is kept alive for no
     reason.
 
   - Avoid expensive double reprogramming of the clockevent device in
     hrtimer_start_range_ns().
 
   - Avoid pointless SMP function calls when the clock was set to avoid
     disturbing CPUs which do not have any affected timers queued.
 
   - Make the clocksource watchdog test work correctly when CONFIG_HZ is
     less than 100.
 
 Drivers:
 
   - Prefer the ARM architected timer over the Exynos timer which is way
     more expensive to access.
 
   - Add device tree bindings for new Ingenic SoCs
 
   - The usual improvements and cleanups all over the place
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmEsnxcTHHRnbHhAbGlu
 dXRyb25peC5kZQAKCRCmGPVMDXSYoZAmEAC0R5+9RkWAOpx0JWC7dQxFuIZoUZD1
 8Inqs0ZFLX/LNrkjbBmZ/0XFvoU38+Eqd4Gqy3I748TgzMcB/0NHUUnXaugJE35J
 UzqdHkzhSReVinDHgRcIGMxkdj+JGomhlOM7RjTcdTixUWBfi1iXJBsit/tIWYq9
 R9r/cthpEQzFu7BCZCdAsgRBaLNinCH9cCP0qXNS3hDwHFtziszjBhIrElAaEK4J
 IqrW/tsoxOlX/yQ/5TI8+E9DKgrr4pf+uNVjMJC0QBDodJrXRrkez9lFg6zJJggw
 adtzSFgL/OrbwsuEKAREpkSTwWSdQGdtLy2i9fx16jmh78YiTilHYe2A1ZD5v3zd
 dxfHUexnsgXcn4Im9w+sxLGxf2RQ6SsfVgd+R0lyOKLBFltnmbQWcvVl/6ZUa4Cc
 je+yuh9DTr0ksUiCnm0spP8AMtsSaHKJUP+MqHbXgo83AutVIFXr4zyQimM1lkY1
 TPeXtbKlhd76jDgdcKU85tiyLsJrIImEJDzLtOEvSAk37yO6S9PHzLUMbg9Yp/vp
 Li4aUaMNmytCJTvKeSu6Wivzmyxqf4zSJus/fWLIJJjg/NSlNNhFDc0vkKPzaxM7
 mg2VIcPrQKzQ1ZAap1kTdj1JNDWuANlV6pjE+zwaJbMtdHhvELyWnqC6EA05MsVj
 Txw2VVFaQcqKXA==
 =eP5w
 -----END PGP SIGNATURE-----

Merge tag 'timers-core-2021-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timer updates from Thomas Gleixner:
 "Updates for timekeeping, timers and related drivers:

  Core code:

   - Cure a couple of correctness issues in the posix CPU timer code to
     prevent that the tick dependency for NOHZ full is kept alive for no
     reason.

   - Avoid expensive double reprogramming of the clockevent device in
     hrtimer_start_range_ns().

   - Avoid pointless SMP function calls when the clock was set to avoid
     disturbing CPUs which do not have any affected timers queued.

   - Make the clocksource watchdog test work correctly when CONFIG_HZ is
     less than 100.

  Drivers:

   - Prefer the ARM architected timer over the Exynos timer which is way
     more expensive to access.

   - Add device tree bindings for new Ingenic SoCs

   - The usual improvements and cleanups all over the place"

* tag 'timers-core-2021-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (29 commits)
  clocksource: Make clocksource watchdog test safe for slow-HZ systems
  dt-bindings: timer: Add ABIs for new Ingenic SoCs
  clocksource/drivers/fttmr010: Pass around less pointers
  clocksource/drivers/mediatek: Optimize systimer irq clear flow on shutdown
  clocksource/drivers/ingenic: Use bitfield macro helpers
  clocksource/drivers/sh_cmt: Fix wrong setting if don't request IRQ for clock source channel
  dt-bindings: timer: convert rockchip,rk-timer.txt to YAML
  clocksource/drivers/exynos_mct: Mark MCT device as CLOCK_EVT_FEAT_PERCPU
  clocksource/drivers/exynos_mct: Prioritise Arm arch timer on arm64
  hrtimer: Unbreak hrtimer_force_reprogram()
  hrtimer: Use raw_cpu_ptr() in clock_was_set()
  hrtimer: Avoid more SMP function calls in clock_was_set()
  hrtimer: Avoid unnecessary SMP function calls in clock_was_set()
  hrtimer: Add bases argument to clock_was_set()
  time/timekeeping: Avoid invoking clock_was_set() twice
  timekeeping: Distangle resume and clock-was-set events
  timerfd: Provide timerfd_resume()
  hrtimer: Force clock_was_set() handling for the HIGHRES=n, NOHZ=y case
  hrtimer: Ensure timerfd notification for HIGHRES=n
  hrtimer: Consolidate reprogramming code
  ...
2021-08-30 15:31:33 -07:00
Linus Torvalds
4520dcbe0d power supply and reset changes for the v5.15 series
battery/charger related changes:
  - cros-peripheral-charger: new driver
  - mt6360-charger: new driver
  - simple-battery: support reading chemistry info
  - max17042-battery: add max77849 support
  - sbs-battery: add time_to_empty_now support
  - smb347-charger: prepare USB OTG support
  - rn5t618: add voltage_now support
  - axp288: cleanup & optimizations
  - max17042_battery: cleanups
  - ab8500: cleanups
  - misc minor cleanups and DT binding fixes
 
 reset related changes:
  - tps65086-restart: new driver
  - linkstation-poweroff: support NETGEAR ReadyNAS Duo v2
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE72YNB0Y/i3JqeVQT2O7X88g7+poFAmEmUVwACgkQ2O7X88g7
 +poFbA//XimqwjO0MR7xqmm2905l78L3L1cNn7vRPzfdPbcf/kKPg8Jrx8kTn1EK
 wKdbP4ZQJOIyCLIFcI6oURUaNHh485KXj4DFvT13AsbkPw+2xUv0Ha5p8J698QAG
 RPmkTNHk+0M/K+/Z7/GPb6t0B7uQi3cg7/aIZeFo26FYpIP5XekoxP1xoLfE9lO2
 aSrSbDh8oIjOLFPc4nuzm0x4Bcg/MpbUG1nhTBdP8OD8xjuMSmDUnbEvLgQYv4oP
 9PLbi4jxm0VSfFhdECCSZ+x7CO0+wqxLXWCoOGlzDQ1Y2OYp9nG+Xgsj46HGh38c
 11WER/16J7AfzUg1zqfu7NKDOKWad+TsTvQgXVK4GAxDOxpOS8Hz7GuP0/nnZBLx
 PoDAb7ZBtb6QXJDEvCDWoo+yMcZRaULbefQCgR/ys6bWoL+B6wdowxfV/daFGpmx
 fAMDGoSGrmYJhbPkcfAVJrN196zd5EQzbB6pyOfAPu3lJiDz+M/DyPNYwkljagAx
 JzSK80cwtXk07lgZZvC8Z3MJruN5pqqvWX/TA8l7dHpReoguCM3hAPUJ9pdVoIa7
 haavL0UzLwya9C2sK9hcys8EBim5thkXI6GsnpRxiztkXZh0LtsUP9Dydt2srGA6
 Hl4BD/g23W9+zmjkAIAvgMwbBoZ2/SHkD7l3ZqG2N2j6LrQxpwc=
 =UcdD
 -----END PGP SIGNATURE-----

Merge tag 'for-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply

Pull power supply and reset updates from Sebastian Reichel:
 "Battery/charger related:
   - cros-peripheral-charger: new driver
   - mt6360-charger: new driver
   - simple-battery: support reading chemistry info
   - max17042-battery: add max77849 support
   - sbs-battery: add time_to_empty_now support
   - smb347-charger: prepare USB OTG support
   - rn5t618: add voltage_now support
   - axp288: cleanup & optimizations
   - max17042_battery: cleanups
   - ab8500: cleanups
   - misc minor cleanups and DT binding fixes

  reset related:
   - tps65086-restart: new driver
   - linkstation-poweroff: support NETGEAR ReadyNAS Duo v2"

* tag 'for-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply: (51 commits)
  power: supply: core: Fix parsing of battery chemistry/technology
  power: supply: max17042_battery: log SOC threshold using debug log level
  power: supply: max17042_battery: more robust chip type checks
  power: supply: max17042_battery: fix typo in MAx17042_TOFF
  power: supply: max17042_battery: clean up MAX17055_V_empty
  power: supply: smb347-charger: Implement USB VBUS regulator
  power: supply: smb347-charger: Add missing pin control activation
  power: supply: smb347-charger: Utilize generic regmap caching
  power: supply: smb347-charger: Make smb347_set_writable() IRQ-safe
  dt-bindings: power: supply: smb347-charger: Document USB VBUS regulator
  power: reset: Add TPS65086 restart driver
  dt-bindings: power: supply: max17042: describe interrupt
  power: supply: max17042: remove duplicated STATUS bit defines
  power: supply: max17042: handle fails of reading status register
  power: supply: core: Parse battery chemistry/technology
  dt-bindings: power: Extend battery bindings with chemistry
  power: reset: linkstation-poweroff: add new device
  power: reset: linkstation-poweroff: prepare for new devices
  power: supply: bq24735: reorganize ChargeOption command macros
  power: supply: rn5t618: Add voltage_now property
  ...
2021-08-30 11:47:32 -07:00
Yongqiang Niu
5f48ed2e81 dt-binding: gce: add gce header file for mt8192
Add documentation for the mt8192 gce.

Add gce header file defined the gce hardware event,
subsys number and constant for mt8192.

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-30 00:20:30 -05:00
Konrad Dybcio
920e9b9cd1 dt-bindings: clock: Add SM6350 GCC clock bindings
Add device tree bindings for global clock controller on SM6350 SoC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210820203624.232268-2-konrad.dybcio@somainline.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-28 21:03:03 -07:00
Konrad Dybcio
be5b605d34 clk: qcom: rpmh: Add support for RPMH clocks on SM6350
Add support for RPMH clocks on SM6350 SoCs.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210820203243.230157-3-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-28 21:01:21 -07:00
Iskren Chernev
dce25b3e0b dt-bindings: clk: qcom: gcc-sm6115: Document SM6115 GCC
Add device tree bindings for global clock controller on SM6115 and
SM4250 SoCs (pin and software compatible).

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210805161107.1194521-2-iskren.chernev@gmail.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-28 20:54:20 -07:00
Konrad Dybcio
4d5b4572c4 clk: qcom: Add msm8994 MMCC driver
Add a driver for managing MultiMedia SubSystem clocks on msm8994
and its derivatives.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210618111435.595689-2-konrad.dybcio@somainline.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-26 11:58:14 -07:00
Vladimir Lypak
1b9de19e24 dt-bindings: clock: add Qualcomm MSM8953 GCC driver bindings
Add bindings and compatible to document MSM8953 GCC (Global Clock
Controller) driver.

Signed-off-by: Vladimir Lypak <junak.pub@gmail.com>
Signed-off-by: Adam Skladowski <a_skl39@protonmail.com>
Signed-off-by: Sireesh Kodali <sireeshkodali@protonmail.com>
Link: https://lore.kernel.org/r/Q6uB3NRxqtD8Prsmliv8ZdsTXGeviv7lb2jQ743jr1E@cp4-web-036.plabs.ch
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-26 11:51:18 -07:00
Arnd Bergmann
06779631d1 Reset controller updates for v5.15
Add support for the SC7280 PDC Global and RZ/G2L USB/PHY reset
 controllers, convert UniPhier glue device tree bindings to json-schema
 and remove a leftover mention of ZTE zx2967 from Kconfig.
 -----BEGIN PGP SIGNATURE-----
 
 iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCYSOy1BcccC56YWJlbEBw
 ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwKxPAQDYffSCcsiXIcZqwO8mpBspzw+R
 rWTqcUeszNXJtPY0rwD/VFs7ESt2RijkKPJeP6VV7VvJkmzaRhFDtLB3MdyG1Qk=
 =60wV
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEnXuMACgkQmmx57+YA
 GNmunBAAv8XVaPA47KvXrsZ8Day6GI9j0EyQAYRvm7MkxD35lDBaooniPT/6bGNs
 cfz6oolZPAzBtomErZUnqCADYGNKCta+Egsp836GCiX85M1sooic9gmidJW0oywQ
 98d+BNjNJDF42RmBdLGqsE4UA/lB/1CgiRKtxkeTDgORQ+UKwwC2CZRwIhyr2ku9
 /YsokNOLETSRf7UxERfZVQDoCpCY8rHn9Yk5Ldjf1a3wSNpEFcxY08TtK8wAxw1x
 ZdnIVMbDX9P3Yowh5LayguXUwXX3ZSiJJKeIaqf4FGn+7e0ISyGX2LSRmsLEP1N/
 gi0D3tS/C6GPiIIup92VAVgN60WwxPl7whwpon98ii7krY3LMr9BibqyL9QEkZF7
 W64flH+HUqm6zzZC26d73Ub413Y5ndSBzcq8Q8nrcsj/lPfUv1xzQMKm0WVUymxU
 7hIognQQCcVIdUk3Ht33wJ3MQOs4kgrQ/VdVqvNRlqE3JpWvd9X4L1D3eUXq9TWV
 2nAQoDQC5LmdW8V1HiV4RKmWqQxdGBlIFXscwH8W4TmRLJXGHQbGi9M2sjch3ycr
 RY0INAN3WpjhI/2saJxkGBeP1HmyQnmxNkfYZLbcFAvStXkgCBI5PIaO0flhevFK
 K10jMPajFaojRZpkQTc9WOasyv8IGez0TrVIgA1WlJZE6BL+KoE=
 =/KnZ
 -----END PGP SIGNATURE-----

Merge tag 'reset-for-v5.15' of git://git.pengutronix.de/pza/linux into arm/drivers

Reset controller updates for v5.15

Add support for the SC7280 PDC Global and RZ/G2L USB/PHY reset
controllers, convert UniPhier glue device tree bindings to json-schema
and remove a leftover mention of ZTE zx2967 from Kconfig.

* tag 'reset-for-v5.15' of git://git.pengutronix.de/pza/linux:
  reset: simple: remove ZTE details in Kconfig help
  reset: renesas: Add RZ/G2L usbphy control driver
  dt-bindings: reset: Document RZ/G2L USBPHY Control bindings
  dt-bindings: reset: Convert UniPhier glue reset to json-schema
  reset: qcom: Add PDC Global reset signals for WPSS
  dt-bindings: reset: pdc: Add PDC Global bindings
  dt-bindings: reset: aoss: Add AOSS reset controller binding

Link: https://lore.kernel.org/r/d42a75fc17ce718ef1b3fa4c5d3f5c7fb0bd2bc2.camel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-26 11:29:06 +02:00
Greg Kroah-Hartman
c446e40ed3 interconnect changes for 5.15
Here are changes for the 5.15-rc1 merge window consisting of interconnect
 core and driver updates.
 
 Framework change:
 - Add sanity check to detect if node is already added to provider.
 
 Driver changes:
 - RPMh drivers probe function consolidation
 - Add driver for SC8180x platforms
 - Add support for SC8180x OSM L3
 - Use driver-specific naming in OSM L3
 
 Signed-off-by: Georgi Djakov <djakov@kernel.org>
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJhI7tWAAoJEIDQzArG2BZjRWsQAIPaOLOBYGN7+aGLI0MO4aRx
 u5P7i5QD/EJzSQ6z+MtNkzwgDV4+D6EzWxA2eyIPtHQsbpmift+qdWBVHPZcRFkD
 sKV+B0NqJZSJe2W/RQ8u66yKaj931nbiSfxvCdpCB/Vamrfip8Bv7IO0hRsmFsSe
 ji+UFg7SnCyou1C461visnl7+yGVwDB6e5BS7aXTYJ/3gl5lJ7IGooCwXs6w/EsS
 FBBrvBqGU3ez61y6SYKrTQTI9MQEcioIUULXa0z8OGdAIqjfY3lWOIk6bhJTYFj8
 snjowrGxMP+K7JzR9KgktB/eCivzYAdyMJKJrd6z1sPUS6vrAOLd0OZdHKVF87si
 8s1ed6gUTkEK62Eg1OL1dIL3D6Ivf+UgGolz98hFqr2IxI/WRLGQ5oeuSHefiE8U
 Rni13/vCNeM82mYIxk4e5VScM1PWPUdSPJl/40TgKELt7XvxKTPc0FO2u6mc+nRl
 vsMJpnnVFszas0I40g0eIspWI4NYnukOFARP+2AXTpVuAylbf4YLkKSiwG1MN5TV
 LdralsxcRLvp2ot9IliqmXjam+QJILK7GBpIqWe0jbo6ND4fGcd5ZN48pGmWxot6
 mrNMXfq7cUbsG0aWrHIUZ8bISUEBlBBqqTSzKqVT4RtSZ8862lvQEHx5j72sQLj/
 EYGoCI2F7tqFzs5P+qqm
 =K/bk
 -----END PGP SIGNATURE-----

Merge tag 'icc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next

Georgi writes:

interconnect changes for 5.15

Here are changes for the 5.15-rc1 merge window consisting of interconnect
core and driver updates.

Framework change:
- Add sanity check to detect if node is already added to provider.

Driver changes:
- RPMh drivers probe function consolidation
- Add driver for SC8180x platforms
- Add support for SC8180x OSM L3
- Use driver-specific naming in OSM L3

Signed-off-by: Georgi Djakov <djakov@kernel.org>

* tag 'icc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
  interconnect: qcom: osm-l3: Use driver-specific naming
  interconnect: qcom: osm-l3: Add sc8180x support
  dt-bindings: interconnect: Add SC8180x to OSM L3 DT binding
  interconnect: qcom: Add SC8180x providers
  dt-bindings: interconnect: Add Qualcomm SC8180x DT bindings
  interconnect: Sanity check that node isn't already on list
  interconnect: qcom: icc-rpmh: Consolidate probe functions
2021-08-24 15:33:04 +02:00
Marek Vasut
86842d255b clk: imx8mn: Add M7 core clock
Add missing M7 core clock entry to the iMX8MN clock driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Cc: Abel Vesa <abel.vesa@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Link: https://lore.kernel.org/r/20210819202036.2084782-1-marex@denx.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2021-08-24 16:09:07 +03:00
Zenghui Yu
cc8c996132 dt-bindings: soc: remove obsolete zte zx header
The zte zx platform had been removed in commit 89d4f98ae9 ("ARM: remove
zte zx platform"), so this header is no longer needed.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Jun Nie <jun.nie@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Link: https://lore.kernel.org/r/20210821030924.192-2-yuzenghui@huawei.com
Signed-off-by: Rob Herring <robh@kernel.org>
2021-08-23 13:52:10 -05:00
Zenghui Yu
d014c93515 dt-bindings: clock: remove obsolete zte zx header
The zx296718-clkc driver had been removed in commit bcbe6005eb ("clk:
remove zte zx driver"), so this header is no longer needed.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Jun Nie <jun.nie@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Link: https://lore.kernel.org/r/20210821030924.192-1-yuzenghui@huawei.com
Signed-off-by: Rob Herring <robh@kernel.org>
2021-08-23 13:52:10 -05:00
Christine Zhu
39c5b2f6f2 dt-bindings: reset: mt8195: add toprgu reset-controller header file
Add toprgu reset-controller header file for MT8195 platform.

Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20210726122901.12195-3-Christine.Zhu@mediatek.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2021-08-22 10:28:10 +02:00
周琰杰 (Zhou Yanjie)
f196ae2820 dt-bindings: timer: Add ABIs for new Ingenic SoCs
1.Add OST_CLK_EVENT_TIMER for new XBurst®1 SoCs.
2.Add OST_CLK_EVENT_TIMER0 to OST_CLK_EVENT_TIMER15 for new XBurst®2 SoCs.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1626370605-120775-1-git-send-email-zhouyanjie@wanyeetech.com
2021-08-21 09:58:17 +02:00
Arnd Bergmann
5c785014b6 Qualcomm driver updates for v5.15
This fixes the "shared memory state machine" (SMSM) interrupt logic to
 avoid missing transitions happening while the interrupts are masked.
 
 SM6115 support is added to smd-rpm and rpmpd.
 
 The Qualcomm SCM firmware driver is once again made possible to compile
 and load as a kernel module.
 
 An out-of-bounds error related to the cooling devices of the AOSS driver
 is corrected. The binding is converted to YAML and a generic compatible
 is introduced to reduce the driver churn.
 
 The GENI wrapper gains a helper function used in I2C and SPI for
 switching the serial engine hardware to use the wrapper's DMA-engine.
 
 Lastly it contains a number of cleanups and smaller fixes for rpmhpd,
 socinfo, CPR, mdt_loader and the GENI DT binding.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmEa29wbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FFnMP/A2Od7JYhdjH7sfc3i3B
 0zws88lT7XTo9KSMpLFrQg1Qzp3ELDMfVhS2CpsekZn1g7s6RGnbQrh2Mac9Yh4z
 +7e4YLhoMxEkdbEVvbVRIX4parFWD/KxUdkyXM8gKZntJzOFl6VY5V8aKi+7IO+/
 CdWHvELDVXMe2LkBd3lKE1AlS2MjkohXpFKgRwkY4r2nVXwqYTdkfJvXdGdhECGr
 ld4ZIvIR6ERLmVpGvTxdU5W0z2xsLTbPYDPSv6mPkWqDYSOyXV3zABV1fSkH28ot
 wIoesHyI3vL4/LNIlHn+tcWj1Ou8hSzxZmxfq7cdKbkfwPLCWE5D8+HEO4kmbFiF
 5Dds+oxvKSFpf/wppK7bUSEd9Q+dKsrFt2mdWy/sYRe1EaEv5sFBgE0rV3+c6ykL
 tptUEFlaB2si7PKSpKje8czHn4Akuc6BwT6xovZZ72K8CNz9D71etSkoNLLXa54d
 bJibw2eNTT1EOACC/FPBO9AS11Icm6wszn/dcaSwaSPGQ6cR3lvAwHqzDFMGHp+x
 L+iojgnZoHykFhQjGuGrI3yTHOpp0MCNxRoN7DlFwm7KLKVHqeqg+xHXtV9sJer8
 iAhY/uepLRxc1oC5Z+Ejx1gABmKycXtzKQ9ecwTclrk66ampWQBlv5+Bxd5w/hux
 ZR96mJPmpk1WKOX3FAgdeaaP
 =88qN
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEdDA4ACgkQmmx57+YA
 GNmAmw//WfdprWl2SJGfyojhDeeUq6ZeNesMFBabFss7Ar++szhyFSu3bqlyH6WC
 ZgPOZOJakKQq2EGKNm7RuEgeR8sEUs9czetNO8AqVy1szlhqnUKhG0OO+uLqRLQn
 Hvf1fc+uG3xeaFP0/Q/4fuG+GL1fnmXIJWl0nZFUGfWyQ3mxxm5fLq1DM27KAzP1
 eKMqtCh3F0qHMWZTJd084LO2XXyUTVVBbXAQKX/IQmH6+BK3Q2YMToo/919HCnZs
 XfgcdKuB/fOfi1n+PgGNODdTJ/Uy10WkSALZHlzKfr77AUCs9+RWxdkogCmACJBs
 IhNoZ/6D6a6kCIEuaEjHtNsMAVoG0bYpaB9vFLhJgF4wfdCd+DuOXkCy9B7vI4/8
 7/SKArKYrG1sPlhDGFaWZjWEFBCGycDDsHQ4T2ecZ5d3f+Kuimgx7NLYhKRHPI+9
 8QVJwNbIGrNXjwIn6S0AeqDLoXIzMmAbNvuX1lFz0OyEkbgDYPSuUPmKYoKh0VL5
 +aTPYANbKxfF7nIPxfN580yjQGZmJmctyhkqnavEB6HdNySO2/oM5F2uGRVdVKnv
 5HaPLqWZf2PffjAg+bU3O3bBlYRdIpEaKaa1eHFIMTgK7nlcvFESWWtwg+IBKdqY
 JI3Kkg5PP3jxqxybzgFPE298vI1G6/so2A12HBi0dl28XheK+wM=
 =dS58
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.15

This fixes the "shared memory state machine" (SMSM) interrupt logic to
avoid missing transitions happening while the interrupts are masked.

SM6115 support is added to smd-rpm and rpmpd.

The Qualcomm SCM firmware driver is once again made possible to compile
and load as a kernel module.

An out-of-bounds error related to the cooling devices of the AOSS driver
is corrected. The binding is converted to YAML and a generic compatible
is introduced to reduce the driver churn.

The GENI wrapper gains a helper function used in I2C and SPI for
switching the serial engine hardware to use the wrapper's DMA-engine.

Lastly it contains a number of cleanups and smaller fixes for rpmhpd,
socinfo, CPR, mdt_loader and the GENI DT binding.

* tag 'qcom-drivers-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: smsm: Fix missed interrupts if state changes while masked
  soc: qcom: smsm: Implement support for get_irqchip_state
  soc: qcom: mdt_loader: be more informative on errors
  dt-bindings: qcom: geni-se: document iommus
  soc: qcom: smd-rpm: Add SM6115 compatible
  soc: qcom: geni: Add support for gpi dma
  soc: qcom: geni: move GENI_IF_DISABLE_RO to common header
  PM: AVS: qcom-cpr: Use nvmem_cell_read_variable_le_u32()
  drivers: soc: qcom: rpmpd: Add SM6115 RPM Power Domains
  dt-bindings: power: rpmpd: Add SM6115 to rpmpd binding
  dt-bindings: soc: qcom: smd-rpm: Add SM6115 compatible
  soc: qcom: aoss: Fix the out of bound usage of cooling_devs
  firmware: qcom_scm: Allow qcom_scm driver to be loadable as a permenent module
  soc: qcom: socinfo: Don't print anything if nothing found
  soc: qcom: rpmhpd: Use corner in power_off
  soc: qcom: aoss: Add generic compatible
  dt-bindings: soc: qcom: aoss: Convert to YAML
  dt-bindings: soc: qcom: aoss: Add SC8180X and generic compatible
  firmware: qcom_scm: remove a duplicative condition
  firmware: qcom_scm: Mark string array const

Link: https://lore.kernel.org/r/20210816214840.581244-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-18 15:33:02 +02:00
Dmitry Osipenko
3e81bd7dfb dt-bindings: power: supply: smb347-charger: Document USB VBUS regulator
SMB347 can supply power to USB VBUS, which is required by OTG-cable
devices that want to switch USB port into the host mode. Add USB VBUS
regulator properties.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2021-08-16 17:56:20 +02:00
Greg Kroah-Hartman
f805ef1ce5 First set of new IIO and counter device support, cleanups and features for 5.15
Usual mix of cleanups and new device support.
 
 Counter
 ======
 
 Cleanups and refactoring:
 * treewide
   - Ensure attempts to set invalid modes result in -EINVAL return.
   - Rename counter_count_function to counter_function as the middle count
     is redundant.
   - Standardize error returns when limits are exceeded.
 * 104-quad:
   - Document the lock.
   - Return an error if attempt to set the ceiling value in a mode that
     doesn't support it.
 * intel-qep
   - Drop unused bitops.h include
 
 IIO
 ===
 
 New device support
 * bma255
   - Add support fo the bosch,bmc156_accel which oddly only exposes the INT2
     interrupt pin and not INT1. Patch set includes enabling use of INT2.
 * ingenic_adc
   - Add support for JZ4760 and similar and update bindings
   - Add support for JZ4760B and update bindings
 * rockchip_saradc
   - Add support for rk3568 ADC (separate channel array as more channels)
 * sgp40 gas sensor used to measure air quality
   - New driver including binding and ABI documentation.
 
 Bindings
 --------
 
 * Add missing bindings for many DACs where the binding was effectively
   implicit due to fallback probe methods in I2C and SPI.
   adi,ad5064
   adi,ad5360
   adi,ad5380
   adi,ad5421
   adi,ad5449
   adi,ad5504
   adi,ad5624r
   adi,ad5686 / adi,ad5696
   adi,ad5761
   adi,ad5764
   adi,ad5791
   adi,ad8801
   capella,cm3323 (also add explicit of_device_id table)
   microchip,mcp4922
 * bosch,bma255
   - Interrupt type in example was opposite of what the device expects.
     It's possible that a particular board had an inverter, but we
     definitely don't want the example to suggest this would be normal.
   - Add interrupt-names to allow for cases where only INT2 is connected.
   - Sort compatibles
   - Merge in very similar bosch,bma180 binding.
 
 New feature
 -----------
 
 * Devices only allowed to provide either extended_name or a label for given
   channel. If extend_name is used (generally discouraged but can't be
   removed as it would be a userspaece ABI change), then the label sysfs
   attribute will provide the extended_name. This allows some userspace
   parser simplications and hardening.
 * hid-sensors-pres
   - Add a timestamp channel (either from hardware, or locally filled).
 * vcnl3020
   - Add periodic sensor mode used to provide IIO events.
 
 Cleanups / minor fixes
 ----------------------
 
 * core/buffers
   - Avoid unnecessary zeroing of bitmaps that are immediately overwritten.
   - Move a sanity check earlier to simplify error path.
 * Quite a few cases of refactors to use devm_* for all of probe and drop
   remove
   - adjd_s311
   - adxl345
   - bma220
   - da280
   - dmard10
   - ds311
   - max5481
   - max5821
   - rfd77402
   - tcs3414
   - tmp006
 * ad5624r
   - Fix incorrect handling of a regulator that was preventing use of
     internal regulators.
 * adjd_s311
   - Allocate a buffer as part of iio_priv() structure as maximum size
     is small enough, no significant advantage in making it flexible sized.
 * bma220
   - Make handling of suspend and resume closer to the probe() wrt to the
     rather odd interface, that suspend mode is entered by reading a register.
 * ep93xx
   - Prepare clock before using (part of conversion to CCF)
 * fsl-imx25-gcq
   - Use local device pointer.
   - Adjust handling of platform_get_irq() to not check for 0 as an error.
     The function is documented as never returning it.
 * hid-sensors
   - Use devm_kmemdup() consistently across all drivers to simplify channel
     structure allocation management.
 * meson-saradc
   - Drop BL30 integration on G12A and newer SoCs as not used.
   - Whitespace fixes.
 * mpu6050
   - Add per device type startup times. This avoids an issue with having
     to dsicard initial data from gyroscopes when they were still stabilizing.
 * rfd77402
   - Change from passing private data, to passing i2c_client where only
     that is needed, reducing back and forth in pm functions.
 * si1145
   - Drop pointless continue
 * st-sensors
   - Cleanup of includes to remove unused and add missing headers that are used.
   - Use some devm functions to simplify probe() and remove() - gets us part way
     towards a fully device managed driver.
 * sx9310
   - Switch from of to generic properties to enable ACPI bindings.
 * vcnl3020
   - Add DMA safe buffer for bulk transfers.
   - Drop use of iio_claim_direct() in a driver that has no mode changes.
     A local lock is more appropriate.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAmEX9x4RHGppYzIzQGtl
 cm5lbC5vcmcACgkQVIU0mcT0FohFFg//ezTrpdh7w2F4iTmMfWHks3GKloah3U0p
 DnuhfrW6w0uEsHCtuHE3ogL+5LssHgoRpBuIU6gXr0yNFxsfqWjeJQ34eTCOa5HK
 G532ecgexDF6LPIuvZi/4iv8xPFdjbFN2nQCkikNE9Ko7mcpdJP5xJL7Xa5htzm9
 r76ugJn7p1u0sZmcStWzIX/cZl2QI/5/NqZz/F2x2fWh8WKEZPns/SmqSIcsaPTu
 XHg4D8HnauRS1qDiO5XJlY0sPbwyjC3sOsziq0JcIbnp3+McF2Kypu3BrizJLl4Z
 vL0+iUvoYqt3OetALECxXuCFu0hDjJrqs2EWdEpXoc4A0rNh7Jhnc86Qb+s4Sath
 KvMyGf1qDc3rX2C4ADXdlq/YompQuhsYc1gmeGGG3YCDbfvnEPIPdwIU0stXlWy/
 0+f4Wifa0ABw5upyXly+AwWMWCpnl8XsPTEb7WiKpItviNktyssPTwbCggjITW8x
 17YbH2B0Rx5xIlVIinGEQXVELuA4gOjwBBjpFQCT6Z07tBHkbPpwS5fJeoHTjBmM
 ZAV3x54UUo7RIKVrFF/szsVwXRBJGu5cYWuCAzaA6Z37agxBrJShxbmBE7nJiB1n
 /x4oqywXL6RjfN1HSrJvd6SjHBv3oK98CNryD9V0F3ppzIZvYb/cAzHOI922iEQR
 tcXSUf4CQik=
 =cDKa
 -----END PGP SIGNATURE-----

Merge tag 'iio-for-5.15a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

First set of new IIO and counter device support, cleanups and features for 5.15

Usual mix of cleanups and new device support.

Counter
======

Cleanups and refactoring:
* treewide
  - Ensure attempts to set invalid modes result in -EINVAL return.
  - Rename counter_count_function to counter_function as the middle count
    is redundant.
  - Standardize error returns when limits are exceeded.
* 104-quad:
  - Document the lock.
  - Return an error if attempt to set the ceiling value in a mode that
    doesn't support it.
* intel-qep
  - Drop unused bitops.h include

IIO
===

New device support
* bma255
  - Add support fo the bosch,bmc156_accel which oddly only exposes the INT2
    interrupt pin and not INT1. Patch set includes enabling use of INT2.
* ingenic_adc
  - Add support for JZ4760 and similar and update bindings
  - Add support for JZ4760B and update bindings
* rockchip_saradc
  - Add support for rk3568 ADC (separate channel array as more channels)
* sgp40 gas sensor used to measure air quality
  - New driver including binding and ABI documentation.

Bindings
--------

* Add missing bindings for many DACs where the binding was effectively
  implicit due to fallback probe methods in I2C and SPI.
  adi,ad5064
  adi,ad5360
  adi,ad5380
  adi,ad5421
  adi,ad5449
  adi,ad5504
  adi,ad5624r
  adi,ad5686 / adi,ad5696
  adi,ad5761
  adi,ad5764
  adi,ad5791
  adi,ad8801
  capella,cm3323 (also add explicit of_device_id table)
  microchip,mcp4922
* bosch,bma255
  - Interrupt type in example was opposite of what the device expects.
    It's possible that a particular board had an inverter, but we
    definitely don't want the example to suggest this would be normal.
  - Add interrupt-names to allow for cases where only INT2 is connected.
  - Sort compatibles
  - Merge in very similar bosch,bma180 binding.

New feature
-----------

* Devices only allowed to provide either extended_name or a label for given
  channel. If extend_name is used (generally discouraged but can't be
  removed as it would be a userspaece ABI change), then the label sysfs
  attribute will provide the extended_name. This allows some userspace
  parser simplications and hardening.
* hid-sensors-pres
  - Add a timestamp channel (either from hardware, or locally filled).
* vcnl3020
  - Add periodic sensor mode used to provide IIO events.

Cleanups / minor fixes
----------------------

* core/buffers
  - Avoid unnecessary zeroing of bitmaps that are immediately overwritten.
  - Move a sanity check earlier to simplify error path.
* Quite a few cases of refactors to use devm_* for all of probe and drop
  remove
  - adjd_s311
  - adxl345
  - bma220
  - da280
  - dmard10
  - ds311
  - max5481
  - max5821
  - rfd77402
  - tcs3414
  - tmp006
* ad5624r
  - Fix incorrect handling of a regulator that was preventing use of
    internal regulators.
* adjd_s311
  - Allocate a buffer as part of iio_priv() structure as maximum size
    is small enough, no significant advantage in making it flexible sized.
* bma220
  - Make handling of suspend and resume closer to the probe() wrt to the
    rather odd interface, that suspend mode is entered by reading a register.
* ep93xx
  - Prepare clock before using (part of conversion to CCF)
* fsl-imx25-gcq
  - Use local device pointer.
  - Adjust handling of platform_get_irq() to not check for 0 as an error.
    The function is documented as never returning it.
* hid-sensors
  - Use devm_kmemdup() consistently across all drivers to simplify channel
    structure allocation management.
* meson-saradc
  - Drop BL30 integration on G12A and newer SoCs as not used.
  - Whitespace fixes.
* mpu6050
  - Add per device type startup times. This avoids an issue with having
    to dsicard initial data from gyroscopes when they were still stabilizing.
* rfd77402
  - Change from passing private data, to passing i2c_client where only
    that is needed, reducing back and forth in pm functions.
* si1145
  - Drop pointless continue
* st-sensors
  - Cleanup of includes to remove unused and add missing headers that are used.
  - Use some devm functions to simplify probe() and remove() - gets us part way
    towards a fully device managed driver.
* sx9310
  - Switch from of to generic properties to enable ACPI bindings.
* vcnl3020
  - Add DMA safe buffer for bulk transfers.
  - Drop use of iio_claim_direct() in a driver that has no mode changes.
    A local lock is more appropriate.

* tag 'iio-for-5.15a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (77 commits)
  counter: 104-quad-8: Describe member 'lock' in 'quad8'
  iio: hid-sensor-press: Add timestamp channel
  counter: Rename counter_count_function to counter_function
  counter: Rename counter_signal_value to counter_signal_level
  counter: Standardize to ERANGE for limit exceeded errors
  counter: Return error code on invalid modes
  counter: 104-quad-8: Return error when invalid mode during ceiling_write
  iio: accel: bmc150: Add support for BMC156
  iio: accel: bmc150: Make it possible to configure INT2 instead of INT1
  dt-bindings: iio: accel: bma255: Add bosch,bmc156_accel
  dt-bindings: iio: accel: bma255: Add interrupt-names
  iio: light: cm3323: Add of_device_id table
  dt-bindings: Add bindings for Capella cm3323 Ambient Light Sensor
  iio: chemical: Add driver support for sgp40
  dt-bindings: iio: chemical: Add trivial DT binding for sgp40
  iio: ep93xx: Prepare clock before using it
  iio: adc: fsl-imx25-gcq: adjust irq check to match docs and simplify code
  iio: dac: max5821: convert device register to device managed function
  dt-bindings: iio/adc: ingenic: add the JZ4760(B) socs to the sadc Documentation
  iio/adc: ingenic: add JZ4760B support to the sadc driver
  ...
2021-08-15 08:32:07 +02:00